# Chapter 6: From Digital-to-Analog and Back Again

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2 horizontal (series) resistor you get a total of 2 again. However, the next (to the left) 2 resistance to ground again produces an equivalent total resistance of. Continuing farther to the left, we find that the effective resistance to ground is at every dot on the top line! When connected to a supply voltage, the ladder acts like a series of voltage dividers that reduces the voltage by an additional factor of 2 at each -2 junction. V IN decreases by half at each connection point along the top rail. Thus each output voltage is related to the input voltage by a power of two. We can generate an analog voltage by adding together the voltages represented by the various stages in the ladder. If we only sum outputs based on a simple a binary representation we can produce a DAC. Note that the current through each 2 leg also reduces by a factor of 2 from left to right. This means that one can use these legs to generate a voltage signal or a current signal depending on what your particular equipment needs. Usually, current signals are faster, since they drive low impedance devices, and a lower means a faster C time constant. Finally, the impedance to ground at each -2 junction always has the same value of. Voltage Mode We will use the TLC bit DAC, which can operate in either a voltage mode or a current mode. In either case, the DAC uses the binary input bits to control switches that force the output current through one of two output lines. Usually, one line (typically OUT2) is tied to ground. In voltage mode, the output is simply given by V OUT =V EF D/256, Where V EF is connected to OUT1, D is the input binary number, and the output voltage occurs at EF. Figure 2: TLC7524 functional diagram

3 This essentially uses the -2 voltage divider with active loads to generate the digitally controlled voltage. The voltage mode is simple to connect, but the output cannot drive much current, since it has high output impedance. Current Mode In the current mode, one uses the output current in one of the two OUT legs. Typically, one connects these outputs to an op-amp to achieve a voltage-level output with low output impedance. The speed of the conversion process will then be limited by the response time of the op-amp. You may observe the inherent speed of the DAC by measuring the width of the current pulses along OUT1. In this configuration, the inverting amplifier changes the output sign, so that V OUT = V EF D/256. In order to get a positive output, you must use a negative V EF. emember that you must also supply power for the op-amp. Figure 3: DAC in current mode, with an op-amp follower. II. Analog to Digital Converters (ADC) Even before the days of computer-controlled equipment, computers routinely processed data from experiments. Of course, this means that the data must first be translated from its natural analog condition into a digitized signal appropriate for a computer. Data acquisition systems, which are primarily Analog to Digital Converters (ADC), serve this role. Because this is such an important function these converters come in a variety of types using several different digitization techniques. The primary measures of an ADC are is speed and its accuracy (quoted in number of output bits). Often these are complementary, so that an 8-bit converter is usually faster than a 12-bit converter. When you are designing a system, you might also consider cost, complexity, output mode (parallel or serial data). Some ADCs have a Sample and Hold circuit at the front end that captures the voltage signal so that the converter can take its time to digitize

4 One common ADC uses a clock to progressively approximate the input signal. Essentially, it sums the output of a DAC with the target signal. On the each clock tick, it sets increasing lower significant digits by checking the value of a voltage comparator that is fed by the target voltage and the output of the DAC. This ADC method is called successive approximation. Another technique converts the voltage to a frequency (using a voltage-controlled oscillator) and counts the frequency. Yet another method charges a capacitor with a constant current source until the capacitor s voltage is higher than the input voltage, while counting clock pulses. The fastest ADCs (parallel encoded or flash ADCs shown in figure 4) compare the input voltage to a set of 2 n voltages and determine the lowest voltage greater than the input. This requires lots of comparators, but it is very fast. These ADCs can digitize data at rates of several GHz. The fastest ones, of course, are the most expensive. V EF V in 3-bit encoder bit-0 bit-1 bit-2 V EF V in 3-bit encoder bit-0 bit-1 bit-2 Figure 4: 3-bit flash ADC. The resistor network provides a series of reference voltages for the comparators. All the comparators above the input voltage go high, and the encoder converts the comparator outputs to a 3-bit binary number. We will use the ADC0820 and TLC5510, which are flash ADCs. In order to keep the number of comparators small, they hold the input voltage, and then convert it in two steps. First, They convert the upper four bits by comparing the voltage to 15 voltages - 4 -

5 from an -2 ladder. Next, they convert the digitized value back into an analog value (reusing the -2 ladder) and subtract this from the input to generate the smaller, difference voltage. Finally, they use a second set of 15 comparators to measure the result against 16 lower voltages. The entire process takes less than 800 ns, when operating off the internal timing of the ADC0820, and less than 150 ns for TLC5510. In the case of the ADC0820, you can run it somewhat faster with some clever timing (W-D) mode, but we will opt for simplicity. In the D mode, the conversion starts when the W# line goes low. When the conversion is complete, the INT# line goes low, and the data have been latched into the output buffers. The output buffers will be put into a high Z state when W# goes low, until the INT# line goes low. No Design Exercise this week - 5 -

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