Microelectronics Students Group. Wi-Rex. Design of an Integrated Circuit for a Wireless Receiver

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1 Microelectronics Students Group Wi-Rex Design of an Integrated Circuit for a Wireless Receiver D. Oliveira, M. Pina, C. Duarte, V. G. Tavares, and P. Guedes de Oliveira February 17, 2011 Microelectronics Students Group DEEC - Departamento de Engenharia Electrotécnica e de Computadores FEUP - Faculdade de Engenharia, Universidade do Porto Rua Dr. Roberto Frias, s/n, Porto, Portugal Room i325, Telephone: Ext 3230 web: usgroup.eu February 17, /17

2 Outline 1 Introduction 2 Project Description 3 Development 4 Results 5 Conclusions February 17, /17

3 Introduction The Wi-Rex project was proposed by the Microelectronics Students Group and aimed to: Attract students interested in learning about Integrated Circuit (IC) design. Allow students to work in a research and development environment. Acquire experience on areas not thoroughly covered in courses. February 17, /17

4 Introduction Several students from the first to the last year of Master in Electrical and Computers Engineering answered to the call. A heterogeneous design team was made possible: Possibility of assigning tasks according to the students experience. Knowledge sharing between the more experienced students and the younger ones. In addition, two students from the Electrical and Computers Engineering Doctoral Program were also enrolled in this project. February 17, /17

5 Project Description Wi-Rex Design of an Integrated Circuit for a Wireless Receiver: Receiver for radio-frequency (RF) communications. Design using a 350-nm CMOS technology GHz of central frequency the same as Wi-Fi or Bluetooth. Intermediate Frequency (IF) architecture 2-MHz. February 17, /17

6 Project Description Receiver s Block Diagram Antenna Integrated Circuit I Filter RF Input 2.45-GHz LNA RF-buffer Mixers Q 2-MHz Complex Filter Saturators Demodulator Output Polyphase Filter Frequency Synthesizer XTAL PFD Charge Pump Loop Filter Buffer VCO GHz to GHz N P/P+1 2 SCL February 17, /17

7 Project Description The receiver mostly comprises the following blocks: Low Noise Amplifier (LNA). Gilbert Mixers. Complex IF filter 6 th order. Saturators. Digital Demodulator. Frequency Synthesizer: Phase Frequency Detector. Charge Pump. Loop Filter. Voltage Controlled Oscillator (VCO). Dual-Modulus Prescaler. February 17, /17

8 Project Development First Steps Assemble teams and assign tasks. Laboratory setup. Configuration of the Computer Aided Design (CAD) tools. Network infrastructure setup. Teach the CAD tools basics to the new students. February 17, /17

9 Project Development Just after these necessary first steps its possible to advance to the circuit design stage: Research existing implementations for each receiver block. Circuits schematic implementation and validation. Layout circuit design. Post-Layout validation. February 17, /17

10 Project Description Receiver s Block Diagram IC Division Antenna Second Integrated Circuit I Filter RF Input 2.45-GHz LNA RF-buffer Mixers Q 2-MHz Complex Filter Saturators Demodulator Output Polyphase Filter First Integrated Circuit XTAL PFD Charge Pump Loop Filter Buffer VCO GHz to GHz N P/P+1 2 SCL February 17, /17

11 Results First IC Phase Frequency Detector. Charge Pump. Loop Filter. VCO. Dual-Modulus Prescaler. Extra varactor bank VCO fine tuning. February 17, /17

12 Results Second IC LNA. Two Mixers. Complex Filter. Two Saturators. Digital Demodulator. February 17, /17

13 Results Conferences Results of the project were presented in some conferences: EuroCon 2011: P. Coke, C. Duarte, A. Cardoso, V. G. Tavares, and P. Guedes de Oliveira, Network Infrastructure for Academic IC CAD Environments, International Conference on Computer as a Tool EUROCON2011, Lisbon, Portugal, April, 2011 (accepted; to be published); CDNLive Munich 2011: C. Duarte, A. Dias, D. Oliveira, M. Pina, P. Coke, V. G. Tavares, and P. Guedes de Oliveira, IC Design Activities in the Microelectronics Students Group, in Proceedings of the CDNLive 2011!, Cadence Design Systems, Munich, May, 2011 (accepted; to be published); PAEE 2009: C. Duarte, D. Oliveira, A. Dias, M. Pina, R. Pereira, B. Silva, J. Almeida, and L. Malheiro, New Project Approaches in Advanced Microelectronics: The Students Perspective, in Project Approaches in Engineering Education (PAEE 09), Guimarães, Portugal, Jul 2009, pp SIICUSP 2009: A. Dias, C. Duarte, M. Pina, M. Caetano, D. Oliveira, V. G. Tavares, and P. Guedes de Oliveira, Sintetizador de Frequências em CMOS 0.35-um (CMOS 0.35-um Frequency Synthesizer), in 17 o Simpósio Internacional de Iniciação Científica da Universidade de São Paulo (SIICUSP 09), São Carlos, Brazil, 9-11 Nov 2009, February 17, /17

14 Results Oral Communications - Part 1 And also oral communications in: IJUP 2010: L. Malheiro, P. Coke, C. Duarte, V. Grade Tavares, and P. Guedes de Oliveira, Polyphase filter with continuous parametric tuning, in 3rd Meeting of Young Researchers of the University of Porto (IJUP 10), Fev 2010, pp H. Cavadas, T. Sapage, D. Oliveira, M. Pina, C. Duarte, V. Grade Tavares, and P. Guedes de Oliveira, Digital Sigma Delta 1st Order Modulator, in 3rd Meeting of Young Researchers of the University of Porto (IJUP 10), Fev 2010, pp. 171 D. Mendes, R. Pereira, D. Oliveira, M. Pina, C. Duarte, V. Grade Tavares, and P. Guedes de Oliveira, Filter and Hold for PLL Applications, in 3rd Meeting of Young Researchers of the University of Porto (IJUP 10), Fev 2010, pp P. Coke, C. Duarte, V. Grade Tavares, and P. Guedes de Oliveira, Network based security for academic IC CAD environments, in 3rd Meeting of Young Researchers of the University of Porto (IJUP 10), Fev 2010, pp February 17, /17

15 Results Oral Communications - Part 2 IJUP 2009: A. Dias, C. Duarte, V. Grade Tavares, and P. Guedes de Oliveira, Dual-Modulus Prescaler for the 2.4-GHz ISM Band, in 2nd Meeting of Young Researchers of the University of Porto (IJUP 09), Jan 2009, pp. 9. R. Pereira, B. Silva, C. Duarte, V. Grade Tavares, and P. Guedes de Oliveira, Bias Circuits Insensitive to PVT Variations, in 2nd Meeting of Young Researchers of the University of Porto (IJUP 09), Jan 2009, pp. 26. M. Caetano, C. Duarte, V. Grade Tavares, and P. Guedes de Oliveira, CMOS Circuits for a RF-PLL, in 2nd Meeting of Young Researchers of the University of Porto (IJUP 09), Jan 2009, pp. 7. P. Coke, T. Ressurreição, T. Sapage, C. Duarte, V. Grade Tavares, and P. Guedes de Oliveira, Analog Quadricorrelator for Low-IF FSK Demodulation, in 2nd Meeting of Young Researchers of the University of Porto (IJUP 09), Jan 2009, pp. 12. M. Pina, C. Duarte, V. Grade Tavares, and P. Guedes de Oliveira, Fully Integrated RF Voltage-Controlled Oscillator, in 2nd Meeting of Young Researchers of the University of Porto (IJUP 09), Jan 2009, pp. 10. M. Reis, D. Oliveira, C. Duarte, V. Grade Tavares, and P. Guedes de Oliveira, Design of a CMOS Down-Converter for Wireless Applications, in 2nd Meeting of Young Researchers of the University of Porto (IJUP 09), Jan 2009, pp. 8. P. Ferreira, H. Cavadas, C. Duarte, V. Grade Tavares, and P. Guedes de Oliveira, A Flash ADC in 0.35-um CMOS, in 2nd Meeting of Young Researchers of the University of Porto (IJUP 09), Jan 2009, pp. 11. O. Pereira, A. Correia, C. Duarte, V. Grade Tavares, and P. Guedes de Oliveira, A 2.45-GHz CMOS Low-Noise Amplifier, in 2nd Meeting of Young Researchers of the University of Porto (IJUP 09), Jan 2009, pp. 6. February 17, /17

16 Conclusions Two ICs were designed and fabricated. The project managed to enroll students from different course years. Provided experience in research, and with industry-standard IC design tools. Conference Publications. Several oral communications. As future work, the testing of both ICs may provide data to correct eventual design flaws. After that it is possible to integrate all circuits into a single IC. February 17, /17

17 Thank you. DEEC - Departamento de Engenharia Electrotécnica e de Computadores FEUP - Faculdade de Engenharia, Universidade do Porto Rua Dr. Roberto Frias, s/n, Porto, Portugal Room i325, Telephone: Ext: 3230 web: usgroup.eu February 17, /17

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