Development of the electromagnetic calorimeter waveform digitizers for the Fermilab Muon g-2 experiment

Transcription

1 Development of the electromagnetic calorimeter waveform digitizers for the Fermilab g-2 experiment 1 on behalf of the Fermilab E989 g-2 Collaboration European Physical Society Conference on High Energy Physics - Vienna () 1 antoine.chapelain@cornell.edu

2 Fermilab E989 g-2 experiment See G. Venanzoni talk on g-2 measured magnetic moment Dirac anomalous moment Magnetic storage ring muon spin precesses: BNL E821 result PhysRevD ~3.5σ difference with the Standard Model (SM) prediction. FNAL E989 goal TDR 0.14 ppm total uncertainty 5σ difference with the SM if measured central value and theory both remain the same., 2

3 Electromagnetic Čerenkov calorimetry Indirect measurement of ωa using decay positron given V-A interaction. Calorimetry goal : measured the positron arrival time (100 ps accuracy) and energy (better than 5% resolution at 2 GeV). Calorimeter design: 54 (6x9 array) lead fluoride (PbF2) crystals (25x25x140 mm3). Crystals read-out by Silicon Photomultiplier (SiPM) (active area 12x12 mm2) with 57, μm pixels (monolithic 16-channel Hamamatsu MPPC). Need waveform digitizer () for the SiPM analog pulses., 3

4 Waveform digitizer requirement design pileup Pileup event with two positrons hitting the same calorimeter within Δt=5 ns. e+ e+ Other requirement: blinded experimental clock (digitization clock)., 4

5 Waveform digitizer μtca interface Advanced Mezzanine Card (AMC) and μtca (provides power, packaging, cooling and connectivity) standards. Custom AMC13 (Boston University CMS group) provides the primary experimental interface to the waveform digitizers: CERN TTC protocol : 40+ε MHz experimental clock, triggering, controls. Parallel data transfer DAQ through 12x5 Gb/s serial link on the backplane., 5

6 Waveform digitizer system architecture, 6

7 Rev1 prototype Waveform digitizer board Flash Memory (256 Mb) ADC (12-bit, 800 MSPS) DDR3 SDRAM (1 Gb) Micron N25Q256A TI ADS5401 Micron MT41J64M16 Clock Synthesizer TI LMK04906, Master FPGA Kintex 7K160T Channel FPGA Kintex 7K70T 7

8 Modularity Rev1 prototype Power supply: separate power supply board for the generation of internal voltage rails from the μtca crate supply. Analog Front End (AFE): DC-coupling avoid rate- dependent baseline. Digital offet use full ADC range (1 Vpp). Bandwidth filtering reduce noise. Power supply, AFE 8

9 Clocking Reference frequency 40+ε MHz delivered from the μtca backplane (CERN TTC ). On-board clock synthesizer: dual PLL, internal VCO. 6 independent output clock channels with configurable delay: 6th channel will be used for monitoring., 9

10 Triggering Trigger delivered by the AMC13 (CERN TTC). Independent triggering of each channel. Trigger and clock can be delivered from an external front panel input on the., 10 10

11 Performances intrinsic noise Rev0 prototype Digitized sinewave fit residuals digitized samples least-square fit σ 1mV, 11 11

12 Performances Rev0 prototype frequency up-conversion: TI LMK04906 Fit: digitized pulses, 12 12

13 Status ~330 (~1600 channels), 13 13

14 Status More on g-2 today ( ) at 17:35 in HS21. See G. Venanzoni talk on g-2, 14 14

15 Thanks!

16 Additional materials

17 Firmware design, 17 17

18 Performances in fringe magnetic field Sinewaves offset on purpose for clarity., 18 18

19 V-A decay and wiggle plot μ spin e spin μ+ e+ Rest Frame: highest energy e+ Large boost in the lab frame μ lab momentum ν, ν μ spin e spin e+ μ+ ν Rest Frame: lowest energy e+ Small boost in the lab frame ν μ lab momentum Selecting highly boosted e+: more likely to be produced when muon spin oriented with muon lab momentum (because of +1 helicity) => rate of high energy e+ varies with the muon spin precession frequency., 19 19

20 Channel ADC-FPGA, 20 20

21 Clock systematic, 21 21

22 Clock systematic, 22 22

23 TTC signal Biphase mark encoding 1 transition at half the bit time. 0 transition at the full bit time., 23 23