Portable Time Interval Counter with Picosecond Precision

Transcription

1 Portable Time Interval Counter with Picosecond Precision R. SZPLET, Z. JACHNA, K. ROZYC, J. KALISZ Department of Electronic Engineering Military University of Technology Gen. S. Kaliskiego 2, Warsaw 49 POLAND {rszplet, zjachna, krozyc, Abstract: - This paper presents the design, architecture, and operation of a precision time interval and frequency counter made as a small, portable instrument with USB interface. Thanks to the use of advanced time interpolators designed in a CMOS chip, the precision (standard deviation) below 35 ps was obtained at measured time interval from 0 to 200 ms. The frequency can be measured up to 3.5 GHz. The dedicated control software creates a user-friendly and versatile graphic interface in Windows environment. Key-Words: - time interval counter, time digitizer, time-to-digital converter, time interpolation, two-stage interpolation 1 Introduction The precision time interval counters (TIC) are usually designed and manufactured in form of desktop instruments [1] or computer boards [2, 3]. In modern measurement and test systems frequently a portable TIC is needed, which may conveniently be used with a notebook or netbook. We present such a solution. The design of precision TICs traditionally has been based on the Nutt interpolation method and time-todigital conversion using analog charging a capacitor [4]. In the modern designs a prevalent solution is the use of the digital coding lines, integrated in the CMOS ASIC [5] or FPGA [6] chips. In the following section 2 we present the architecture of a portable TIC controlled via a USB interface by a notebook. The TIC contains a programmed FPGA device which integrates two precise time-to-digital converters (TDCs), a set of counters, and the control circuitry. In section 3 we describe the specialized operation modes of the counter, including a high-rate frequency sampling, measurement of Allan deviation (ADEV), and measurement of Time-Interval Error (TIE). The test results of TIC are described in section 4. 2 Counter design Figure 1 shows the block diagram of the TIC. The main timing inputs for Time-Interval (TI) measurement are A (Start) and B (Stop). The fast comparators (FC) allow to select the required threshold level of the input pulses. The voltage levels are set by the corresponding Digitalto-Analog Converters (DAC) and can be adjusted manually on the virtual desktop or automatically by the software procedure. The inputs can also accept both Start and Stop pulses appearing consecutively in a common mode on a single input. The standardized pulses from the comparator outputs are fed to the interpolation time counter integrated in a FPGA device. The counter can measure the time intervals in the range from 0 to 4400 seconds, or measure the frequency of input signals up to 200 MHz. To increase that range a fast frequency divider enlarges the maximum frequency range to 3.5 GHz at the F input. The counter chip was designed in a similar way to that described previously [6]. An external integrated VHF synthesizer provides a 250 MHz reference clock with low jitter. The new design resulted in both high time resolution (about 25 ps) and high precision (standard deviation of TI measurements is less than 35 ps at time interval measured from 0 to 200 ms). The chip contains also the FIFO memory, two correction look-up tables (LUTs) and a dedicated microcontroller. The on-board calibration generator is used during the calibration routine to compensate the input time offset between the channels A and B, and to identify the transfer characteristics of two two-stage interpolators contained in the counter chip. The calibration pulses are applied through the solid-state relays to the inputs A and B simultaneously. Two look-up tables for on-the-fly correction of the nonlinearity of two relevant TDCs are also created in the chip. The Start Enable state is generated internally. To enable the Stop pulse (at the A or B input), an internal programmable counter can be utilized to set the required disabling time (after the leading edge of the Start pulse) over a range (1 999) 20 units, where the unit is selected as ns, µs, or ms. To obtain high measurement rate a FIFO memory is used to minimize the dead time between successive measurements performed in the serial mode. ISSN: ISBN:

2 Proceedings of the 9th WSEAS Int. Conference on INSTRUMENTATION, MEASUREMENT, CIRCUITS and SYSTEMS Figure 2 shows a simple desktop test system, e.g. for an R&D engineer s workbench. The TIC is connected to the notebook by a USB cable, and the counter inputs may be connected to the device-under-test (DUT) using coaxial cables. The internal view of the TIC is shown in Fig. 3. The box, containing the TIC, has small dimensions: 140 mm in length, 70 mm in width, and 17 mm in height. The power supply for the counter box is provided by the used USB 2.0 interface. Fig. 3 Internal view of the TIC The control of the counter is accomplished by a dedicated controller in the counter chip and by the computer software. Figure 4 shows a screen snapshot of the virtual front panel of the counter. Fig. 1 Simplified block diagram of the counter The TIC contains a 10 MHz TCXO as a reference clock. An external 10 MHz clock (for example atomic clock) may also be used to further improve the long-term stability and accuracy of the counter. Fig. 4 Example of the virtual front panel of the TIC, when the consecutive samples are processed. The preset number of samples (of size 1000) is 100, the last processed sample (with results shown) has the number 38. Note the progress illustrated by the horizontal broken line in the bottom of the display panel. The threshold of the input comparator can be set manually or can be preset on the fixed TTL level (+1.5 V) or a selected CMOS level (+1.25V, V or +2.5 V). Fig. 2 A desktop test system with the TIC ISSN: ISBN:

3 The best threshold level (in the middle of the amplitude) can also be adjusted automatically (Auto). In the field Session one can choose a Single measurement or a Sample of measurements with selectable Size. The Sample Size may be preset from 1 up to M. The consecutive samples may be repeated x times (preset as Repeat x) from 1 up to K. The data obtained from the sample are calculated and displayed: the mean value (the main result) and the statistical data (Min, Max minimum and maximum measurement result in the sample, and StdDev standard deviation or sigma value) shown in the bottom left corner of the display panel. Averaging is accomplished by execution of measurements in a declared sample. For a selected sample size n, the standard deviation of the resulting mean value is StdDev/ n. Thus, if StdDev = 50 ps and n = 100, then the standard deviation of the mean value is 5 ps. In the Repeat mode, when measuring the consecutive small samples, one can discover and determine the non-stationary changes of the mean value over time, for example, its time drift. The resulting moving average values allow to smooth the sample data to better observe the changes of the measured quantity over time. Filtering is an option selected in software to calculate the mean value with better accuracy in presence of measurement data with outliers, that is, with some data located far on the tails of the distribution or beyond the true distribution of data. The filtering of measurement data can be beneficial, for example, when the measurements are performed in a noisy environment, or when the input signals are distorted by some noise. When the data are not distorted, then the mean value calculated by the Standard estimation is the same as that calculated With filtering. 3 Measurement modes The measurement modes may be selected by clicking the predefined virtual keys (Fig. 4). In the Frequency mode the inputs A and B can be used for measurements up to 200 MHz, while the input F accepts signals from 100 MHz up to 3.5 GHz. The signal frequency f s is measured with the use of the reciprocal method by measuring the time interval T consisting of a known integer number n of signal periods T s (T = nt s ), calculating the duration of a single period (T s = T / n), and calculating its reciprocal (f s = 1/T s ). 3.1 Frequency sampling mode This mode allows for observation how the measured frequency varies in time. Thanks to the short dead time of the counter, the sampling can be performed with an internally generated rate (from 100 ksa/s to 2 MSa/s). It allows for discovering a frequency modulation (needed or not) of the measured signal, as shows Fig. 5. Fig. 5 Frequency modulation discovered in the Sampling mode 3.2 Measurement of Allan deviation (ADEV) The Allan deviation σy ( τ ) of a periodic input signal may be calculated using a set of n samples, or successively measured frequency interval τ k= 1 f k averaged over the ( fk+ 1 fk ) n σy ( τ) = ( τ ) ( τ ) (1) f 2( n 1) where f is the nominal frequency of the tested signal [7]. During the sampling interval τ the time duration T p of a train of the counted number p of periods T of the tested signal is measured. Thus, for a k th sample f k = p k / T pk. For a given k two adjacent frequency samples are needed to compute the result. Therefore the Allan deviation is also called the two-sample deviation. ISSN: ISBN:

4 Fig. 6 Measurement of frequency samples to calculate the Allan deviation Figure 6 illustrates the method used for measuring the Allan deviation. The upper dot line presents an example of a random walk behavior of the instantaneous frequency f of the tested signal. We can assume that the frequency f = 1/T, where the period T is represented by the width of a single dot on the figure. The lower dashed line is a train of consecutive samples of frequency averaged in intervals of duration τ. 3.3 Measurement of frequency wander Wander usually results from the frequency offset or changes in cable delay due to temperature variation and can lead to data slips in communication systems. To guarantee network synchronization quality, the wander should be kept within the secure limits defined in respective standards. An important parameter characterizing the wander is the Time Interval Error (TIE) [8]. The maximum value of TIE (MTIE), computed from an array of TIE data, can characterize the frequency offsets and phase transients of a tested signal to obtain a clear view of quality of relevant electronic apparatus or systems. The TIC offers possibility of precise measurement of TIE and MTIE. When pressing the TIE key on the control panel in the basic Frequency mode, one enters the TIE measurement mode, which allows for testing the frequency stability of a signal obtained, for example, from a quartz generator. TIE is a measure of period difference of two signals: the tested signal and a reference signal assumed to have an ideal, or absolutely accurate, precise, and stable period. TIE is defined using the time error function. The time error (TE) of a clock, with respect to a frequency standard, is the difference between the time of that clock and the reference clock time TE(t) = T(t) T ref (t) (2) Fig. 7 Virtual front panel of the TIC operating in the ALLAN DEVIATION mode Figure 7 shows a screen snapshot in the ADEV mode. The Observation Interval is approximately equal to nτ. When n = and τ = 0.1 s, the resulting observation interval would last over 27 hours. To Repeat m ( ) times the observation interval one may write in the number m (default 1), thus specifying the Measurement Session of approximate length mnτ. where T(t) is the time function of a clock, describing the clock waveform in the time domain. Referring to Fig. 8, the sampling interval τ 0 is specified as follows. It begins with the START Enable signal generated internally to allow measurement of the first TE equal to the time delay D 1 between the nearest zero-crossing of the tested signal (of frequency f t ) and that of the reference signal (of frequency f r ). Since the interval τ 0 is generated by the counter asynchronously with reference to the tested signal, the time lag from beginning of the sampling interval to the START moment (t 1 ) is randomly variable within the range (0 1)T t. That measurement is repeated in the end of the interval τ 0 and the second TE equal to the delay D 2 is measured. The TIE sample is defined over the sampling interval τ 0 as the difference D 2 D 1 measured in both ends of the synchronized sampling interval τ 0s = t 2 t 1. The worst-case difference between the interval τ 0 and τ 0s is ±T t. We can observe a train of TE samples (D 1, D 2,...) and a train of TIE samples of the form ISSN: ISBN:

5 measurement period T. For example (Fig. 10), the array of N TE samples collected within an observation interval of duration τ = nτ 0, may be searched by software to find the minimum value TE min and the maximum value TE max. Then MTIE(τ 0,τ) = TE max TE min (5) The TIC calculates the magnitude of MTIE separately for consecutive constant observation intervals τ specified within the period T and then the largest TIE magnitude is selected as a final result shown on display for a given T. Fig. 8 Measurement of Time Interval Error TIE 1 (τ 0 ) = D(t 2 ) D(t 1 ) = D 2 D 1 TIE 2 (τ 0 ) = D(t 3 ) D(t 2 ) = D 3 D 2 (3)... The result of TIE measurement over the observation interval τ is the root-mean-square value TIE rms (τ) calculated from a finite number N of TE samples collected within that interval. When using the number n = N 1 of the TIE(τ 0 ) samples TIE rms (τ 0,τ) = n 1 2 (TIE i ) (4) n = i 1 This is shown on the display panel after collecting data for a specified observation interval τ (Fig. 9). Fig. 9 Virtual panel of the TIC operating in the TIE mode The maximum time interval error (MTIE) is defined as the maximum peak-to-peak variation of TE in the all possible observation intervals τ = nτ 0 within a Fig. 10 Measurement of MTIE 4 Test results The standard uncertainty (standard deviation, precision) of time interval measurement depends mainly on (1) the quantization step or resolution (LSB Least Significant Bit), (2) the nonlinearity of two Time-to-Digital Converters contained in the FPGA device on the board, (3) the used frequency reference clock (TCXO in the TIC or an external generator), and of course (4) the jitter of the measured time interval itself. The quantization contribution is relatively small, because the time intervals measured by each embedded interpolator have a uniform probability distribution of the quantization error within the range (0, LSB), where LSB 25 ps. This is true when the input START and STOP pulses are asynchronous or are not statistically correlated in time with the reference clock of the counter board. Such a condition is usually met in typical applications. Then the quantization uncertainty caused by a single interpolator is expressed by the standard deviation of the related uniform distribution, or s qs = LSB / LSB. When the measured intervals are not ideally constant but are randomly distributed within LSB, the quantization uncertainty created by two interpolators contained in the counter can be roughly ISSN: ISBN:

6 approximated as s q = 2 s qs 0.41 LSB 10.3 ps. When the intervals are constant, the standard deviation can reach the maximum value s q max = 0.5 LSB = 12.5 ps and the average standard deviation is s q av = π LSB/ LSB 9.8 ps. We may accept the approximated formula s q 0.4 LSB and then s q 10 ps. TIC by nonlinearity compensation with the aid of two look-up tables containing the calibration results in the counter chip. The data obtained from a measurement sample may be presented graphically in the form of a statistical distribution (Fig. 12). A more detailed description and technical data of the TIC are also available [10]. Fig. 11 Precision (standard measurement uncertainty) of the TIC operating in the Time Interval mode Figure 11 shows a typical plot of precision of the time intervals measured by the TIC. The measurements were performed using the precision Time-Interval Generator T5300U (Vigo System) [9, 10] as a source of the reference time intervals. This generator also adds its jitter to the observed result, but that contribution appeared smallest compared to other commercial delay generators used in this test. The two gray points in the figure show the data obtained when the 1-second intervals were produced by the pulses generated at the 1- PPS output of a Rubidium clock generator, and measured by the TIC every second pulse in the Common Mode (Input A). Fig. 12 Example of the statistical distribution of the measured time interval A significant contribution to the standard measurement uncertainty of the time counter is caused by the nonlinearity of two interpolators contained in the FPGA device. In order to lower this uncertainty the influence of interpolator nonlinearity on the counter accuracy should be minimized. It is accomplished in the 5 Conclusion We presented the architecture and specialized operation modes of a small, portable, and precise time interval counter. The precision and flexibility of the counter make it feasible to utilize in advanced test and measurement systems in telecom, industry, and research applications. Acknowledgements This work was supported by the Polish Ministry of Science and Higher Education under Contracts Nos. 0503/R/T02/2007/03 and 2984/B/T02/2007/33. References: [1] [2] R. Szplet, J. Kalisz, Z. Jachna, K. RóŜyc: A 45 ps time-interval counter board with a PCI interface, Proc. 39 th Annual Precise Time and Time Interval Meeting, PTTI 2007, Long Beach, USA, pp [3] R. Szplet, Z. Jachna, J. Kalisz, K. RóŜyc: A Computer Board For Precise and Fast Time and Frequency Measurement, Proc. 22 nd European Frequency and Time Forum, EFTF 2008, France [4] J. Kalisz: Review of methods for time interval measurements with picosecond resolution, Metrologia, Vol. 41 (2004), No. 1, pp [5] A. Mantyniemi, T. Rahkonen, J. Kostamovaara: A nonlinearity-corrected CMOS time digitizer IC with 20 ps single-shot precision, IEEE International Symposium on Circuits and Systems, ISCAS 2002, vol.1, pp. I-513 I-516 [6] R. Szplet, J. Kalisz, Z. Jachna: A 45 ps time digitizer with a two-phase clock and dual-edge two-stage interpolation in a field programmable gate array device, Measurement Science and Technology, 20 (2009) (11pp) [7] [8] ITU-T Recommendation G.810, Definitions and terminology for synchronization networks, 1996 [9] J. Kalisz, A. Poniecki, K. RóŜyc: A simple, precise, and low jitter delay/gate generator, Review of Scientific Instruments, Vol. 74 (2003), No. 7, pp [10] ISSN: ISBN: