Wafer Manufacturing. Reading Assignments: Plummer, Chap 3.1~3.4

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1 Wafer Manufacturing Reading Assignments: Plummer, Chap 3.1~3.4 1

2 Periodic Table Roman letters give valence of the Elements 2

3 Why Silicon? First transistor, Shockley, Bardeen, Brattain1947 Made by Germanium First IC, T.I. Jack Kilby 1958 Abundant, cheap 26% of earth s crust vs. 1.8ppm of Germanium Stable dielectric for gate dielectric and doping mask Silicon dioxide is very stable, strong dielectric, and it is easy to grow in thermal process. Perfect interface with Silicon. Germanium oxide is not stable at >800 o C and water soluble. Large band gap Wide operation temperature and doping range. Higher breakdown voltage. 3

4 Structure of Solids Amorphous (no short/long-range order) Poly-crystalline (short-range order, typically, 1nm - 50μm range) Crystalline (long-range order, irregularity treated as defects, faults, stacked faults or line faults) Grain/domain Grain boundary Amorphous Polycrystalline Crystal 4

5 Crystal Structures (Crystallography) Example: Simple Cubic (SC) Na + Cla 1 a 3 a 2 a1 a2 a3 : primitive translation vectors Space lattice (SC) Basis (one atom) Crystal Structure There are total 14 distinct Bravais lattices. Example: Face-Centered Cubic (FCC) NaCl 5

6 Simple Cubic Crystal 6

7 Diamond Crystal Structure 7

8 Diamond Crystal Structure Diamond lattice cell (C, Si, Ge, etc.) Zincblende lattice cell (GaAs, AlAs, GaP, ZnS, etc.) Diamond (covalent, Si, Ge, C, etc.) and Zinc-blend (ionic, GaAs, InP, etc.) consist of 2 interleaved FCC with 1/4 diagonal offset 8

9 Crystal Planes/Direction Direction [001] z 2 3 x Direction [100] Plane (233) y Indexing Procedure for Planes 1. Record where the plane intercepts the axes in the unit of the unit cell length. 3, 2, 2 2. Invert the intercept values 1 / 3, ½, ½ 3. Convert to the smallest possible set of whole numbers 2, 3, 3 4. Enclose the whole-number set in parentheses (233) 9

10 Crystal Planes face atom in FCC corner atom in FCC (100) (110) (111) (200) (100) 1 10

11 Use of Crystal Orientation Electrical anisotropy: (100) has the highest mobility, also scattering rates are slightly different Mechanical anisotropy: different surface has different modulus components (later) Chemical anisotropy: e.x., KOH will not etch (111), Etch rate (110)>(100)>(111) V-groove etch on (100) plane. Angles: (100) vs. (110): 45, 90 ; (100) vs. (111): ; (110) vs. (111): 35.26, 90 or Important for strain engineering <110> Newer wafers (8 and 12 ) now use a groove to mark the orientation, instead of a cut to save some area for test structures 11

12 Wafer Flat Wafer flats in 4 and 6 silicon wafers Newer wafers (8 and 12 ) now use a groove to mark the orientation, instead of a cut to save some area for test structures. Manufacturers Data of incoming wafers: orientation, thickness, doping type, resistivity. 12

13 Defects in Crystals 0D 2D 0D 1D 3D 13

14 Commercial Silicon Wafer 200mm 300mm 100mm 150mm 150mm 200mm 300mm 450mm 14

15 Starting Material Cost 300mm bare silicon ~ $100/pcs 200mm bare silicon ~ $40/pcs 200mm ASP ~ $1000/pcs 15

16 Silicon Purification Heat (2000 C) MGS: EGS: SiO 2 + C Si + CO 2 Sand Carbon MGS Carbon Dioxide MGS: Metallurgical Grade Silicon, 98% pure, Major impurity Al and Fe Hydrochloride Reactor, 300 C Condenser Si + HCl TCS Filters Silicon Powder TCS: Trichlorosilane SiHCl 3 Purifier Pure TCS with % Heat (1100 C) SiHCl 3 + H 2 Si + 3HCl TCS Hydrogen EGS Hydrochloride EGS: Electronic Grade Silicon, % pure, impurity /cm 3 16

17 Czochralski (CZ) Crystal Growth Single Crystal Silicon Seed Quartz Crucible Single Crystal silicon Ingot Molten Silicon 1415 C Heating Coils Graphite Crucible Most common. Use in the large-diameter wafer manufacturing. The ingot diameter is determined by the pulling speed. The dislocation due to the thermal stress is terminated at the neck region. Impurities comes from crucibles (O; /cm 3 ) and susceptors (C; /cm 3 )

18 Czochralski (CZ) Crystal Growth Source: 18

19 Floating (FZ) Crystal Growth Heating Coils Movement Poly Si Rod Molten Silicon Heating Coils Single Crystal Silicon Seed Crystal Local melting. No crucible needed. Low impurity. High resistive wafer possible. Hard to scale up. 19

20 Wafer Finishing Flat, Notch Wafer Sawing Orientation Notch Saw Blade Coolant Crystal Ingot Ingot Movement Flat, 150 mm and smaller Notch, 200 mm and larger Diamond Coating Wafer Wafer Rounding Wafer movement Wafer Surface Flatten Pressure Slurry Wafer Holder Wafer Before Edge Rounding Wafer After Edge Rounding Polishing Pad 20

21 Surface Flatten After Wafer Sawing After Edge Rounding After Lapping Polish away 50μm (DS) After Etch Etch-off 20-25μm (DS) After CMP Polish away 25μm (SS) 76 μm 914 μm 76 μm 914 μm 12.5 μm 814 μm <2.5 μm 750 μm Virtually Defect Free 725 μm 21

22 Resistivity and Mobility t Four Point Probe Sheet resistance : R s (Ω/ )= ρ(ω.cm) / t (cm) J drift = (qp μp +qn μn )F=σ F ρ = 1 qnμ + qpμ n p 22

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