AN-6005 Synchronous buck MOSFET loss calculations with Excel model



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www.fairchildsemi.com Synchronous buck MOSFET loss calculations with Excel model Jon Klein Power Management Applications Abstract The synchronous buck circuit is in widespread use to provide point of use high current, low voltage power for CPU s, chipsets, peripherals etc. Typically used to convert from a 1 or 5 bulk supply, they provide outputs as low as.7 for low voltage CPUs made in sub-micron technologies. The majority of the power lost in the conversion process is due to losses in the power MOSFET switches. The profiles of loss for the High-Side and Low-Side MOSFET are quite different. These low output voltage converters have low duty cycles, concentrating the majority of the conduction loss in the low-side MOSFET. IN PWM CONTROLLER High-Side Q1 NODE L1 D1 Low-Side Q OUT Figure 1. Synchronous Buck output stage For the examples in the following discussion, we will be analyzing losses for the following synchronous buck converter: System Parameters IN 1 OUT 1.5 I OUT 15 A F 3 khz Table 1. Example Synchronous Buck A spreadsheet to aid in the estimation of synchronous buck losses is available on Fairchild's web site at : https://www.fairchildsemi.com/design/designtools/switching-loss-calculation-tool/ Operation of the spreadsheet is described in the Appendix at the end of this document. High-Side Losses: The power loss in any MOSFET is the combination of the switching losses and the MOSFET s conduction losses. P = P P (1) MOSFET COND Q1 (Figure 1) bears the brunt of the switching losses, since it swings the full input voltage with full current through it. In low duty cycle converters (for example: 1 IN to 1.8 OUT ) switching losses tend to dominate. High-Side Conduction Losses: Calculating high-side conduction loss is straightforward as the conduction losses are just the I R losses in the MOSFET times the MOSFET s duty cycle: OUT P COND = IOUT RDS(ON) () R DS(ON) is @ the maximum operating MOSFET junction temperature (T J(MAX) ). The maximum operating junction temperature is equation can be calculated by using an iterative technique. Since R DS(ON) rises with T J and T J rises with P D (dissipated power) and P D is largely being determined by I x R DS(ON). The spreadsheet calculator iterates the die temperature and accounts for the MOSFET's positive R DS(ON) temperature coefficient. Iteration continues in the "DieTemp" custom function until the die temperature has stabilized to within.1 C. High-Side Switching Losses: The switching time is broken up into 5 periods (t1-t5) as illustrated in Figure 3. The top drawing in Figure 3 shows the voltage across the MOSFET and the current through it. The bottom timing graph represents GS as a function of time. The shape of this graph is identical to the shape of the Q G curve contained in MOSFET datasheets, which assumes the gate is being driven with a constant current. The Q G IN 1.. 11/1/14

Synchronous Buck Loss Calculation notations indicate which QG is being charged during the corresponding time period. DS DRIE (DD) I D GS SP TH R DRIER HDR G S C RSS R C GS IN Figure. Drive Equivalent Circuit Q GS = C GS C RSS Q G() C RSS Q GD t1 t t3 t4 D C OSS Switching losses are in Shaded section Figure 3. High-Side Switching losses and Q G 4.5 The switching interval begins when the high-side MOSFET driver turns on and begins to supply current to Q1 s gate to charge its input capacitance. There are no switching losses until GS reaches the MOSFET s TH. therefore P t1 =. When GS reaches TH, the input capacitance ( ) is being charged and I D (the MOSFET s drain current) is rising linearly until it reaches the current in L1 (I L ) which is presumed to be I OUT. During this period (t) the MOSFET is sustaining the entire input voltage across it, therefore, the energy in the MOSFET during t is: IN IOUT Et = t (3) Now, we enter t3. At this point, I OUT is flowing through Q1, and the DS begins to fall. Now, all of the gate current will be going to recharge C GD. C GD is similar to the Miller capacitance of bipolar transistors, so t3 could be thought of as Miller time. t5 During this time the current is constant (at I OUT ) and the voltage is falling fairly linearly from IN to, therefore: IN IOUT Et 3 = t3 (4) During t4 and t5, the MOSFET is just fully enhancing the channel to obtain its rated R DS(ON) at a rated GS. The losses during this time are very small compared to t and t3, when the MOSFET is simultaneously sustaining voltage and conducting current, so we can safely ignore them in the analysis. The switching loss for any given edge is just the power that occurs in each switching interval, multipied by the duty cycle of the switching interval: I P ( t t3)( F ) IN OUT = (5) Now, all we need to determine are t and t3. Each period is determined by how long it takes the gate driver to deliver all of the charge required to move through that time period: Q G(x) t x = I (6) DRIER Most of the switching interval is spent in t3, which occurs at a voltage we refer to as SP, or the switching point voltage. While this is not specifically specified in most MOSFET datasheets, it can be read from the Gate Charge graph, or approximated using the following equation: IOUT SP TH (7) GM G M is the MOSFET s transconductance, and TH is its typical gate threshold voltage. With SP known, the gate current can be determined by Ohm s law on the circuit in Figure : DD - SP IDRIER(L H) = (8A) R R I DRIER(H L) = R DRIER(PULL-UP) SP DRIER(PULL-DOWN) R (8B) The rising time (L-H) and falling times (H-L) are treated separately, since I DRIER can be different for each edge. The GS excursion during t is from TH to SP. Approximating this as SP simplifies the calculation considerably and introduces no significant error. This approximation also allows us to use the Q G() term to represent the gate charge for a MOSFET to move through the switching interval. A few 1.. 11/1/14

Synchronous Buck Loss Calculation MOSFET manufacturers specify Q G() on their data sheets. For those that don't, it can be approximated by: QG () QGD (9) so the switching times therefore are: QG() ts (L H) = (1A) I DRIER(L-H) QG() ts (H L) = IDRIER(H-L) The switching loss discussion above can be summarized as: P ( F )( t t ) (1B) IN X IOUT = S(L-H) S(H L) (1C) There are several additional losses that are typically much smaller than the aforementioned losses. Although their proportional impact on efficiency is low, they can be significant because of the dissipation occurs (for example, driver dissipation). They are listed in order of importance: 1. The power to charge the gate: P = Q X X F (11A) G DD Note that P is the power from the DD supply required to drive a MOSFET gate. It is independent of the driver's output resistance and includes both the rising and falling edges. P is distributed between R DRIER, R, and R DAMPING propoprtional to their resistances. Dissipation in the driver for the rising edge is: P RDRIER(PULL-UP) PDR(L-H) = (11B) (RTOTAL ) R TOTAL = R DRIER R R DAMPING (11C) Similarly, dissipation in the driver for the falling edge is: P RDRIER(PULL-DOWN) PDR(H-L) = (11D) (R ) TOTAL For an output stage (Driver MOSFET) with the following parameters: P 5 mw R DRIER (PULL-UP) 5 Ω R DRIER (PULL-DOWN) Ω R DAMPING Ω R 1.5 Ω Driver dissipation calculates to : 5 * 5 PDR(H- L) = = 147mW (11E) (8.5) 5 * PDR(L -H) = = 91mW (11F) (5.5) PDRIER = PDR(H-L) PDR(L-H) = 38mW (11G). The power to charge the MOSFET s output capacitance: Coss IN F PCOSS (11H) C OSS is the MOSFETs output capacitance, (C DS C DG ). 3. If an external schottky is used across Q, the Schottky s capacitance needs to be charged during the high-side MOSFET s turn-on: CSCHOTTKY IN F PC(SCHOTTKY) = (1A) If a Schottky diode is not used: 4. Reverse recover power for Q s body diode: P = Q F (1B) QRR RR IN Q RR is the body diode s reverse recovery charge. If the MOSFET contains an integrated body diode (like SyncFET ), the Q RR figure in the datasheet is actually Q OSS, or the charge required by the MOSFET s C OSS. If a SyncFET is used, then set Q RR to in the companion spreadsheet. Low-Side Losses Low-side losses (P LS ) are also comprised of conduction losses and switching losses. P LS = P P COND (13) Switching losses are negligible, since Q switches on and off with only a diode drop across it, however for completeness we will include the analysis. Conduction losses for Q are given by: P COND ( 1 D ) X IOUT X RDS(ON) = (14) R DS(ON) is the R DS(ON) of the MOSFET at the anticipated operating junction temperature and OUT D = is the duty cycle for the converter. IN The junction temperature (T J ) of the MOSFET can be calculated if the junction to ambient thermal resistance (θ JA ) and maximum ambient temperature are known. 1.. 11/1/14 3

Synchronous Buck Loss Calculation T = T (P θ ) (15) J A LS JA P COND dominates P LS. Since R DS(ON) determines P COND, and is a function of T J, either an iterative calculation can be used, or T J can be assumed to be some maximum number determined by the design goals. The calculations in the accompanying spreadsheet use T A and θ JA iteratively to determine the low-side operating T J at full current, assuming a MOSFET R DS(ON) temperature coefficient of.4%/ C, which is typical for the MOSFETs used in this application. Low-side Switching Losses I D I OUT DRIER t1 t t3 I OUT x R DS(ON) DS.6 the R DS(ON) is typically 11% of the specified R DS(ON). The rising edge transition times for the low-side (t and t3 in Figure 4) can now be calculated from the RC equations. t R = K R (RDRIER R ) CISS (17A) = DRIE K DRIE R ln ln (17B) DRIE SP DRIE TH t3 R = K (R R ) (17C) 3R DRIER CISS = DRIE K DRIE 3R ln ln DRIE.9SPEC DRIE SP (17D) and is the MOSFET s input capacitance (C GS C GD ) when DS is near. If the MOSFET datasheet has no graph of capacitance vs. DS, use 1.5 times the typical value, which is usually given with ½ of the rated DS across the MOSFET. The turn-off losses are the same, but in reverse, so the switching waveforms are: GS SP.9 x SPEC TH I D I x R DS(ON) t DS.6 Figure 4. Low-Side turn-on switching loss waveforms I t3 t t1 Low-side switching losses for each edge can be calculated in a similar fashion to high-side switching losses: P (LS) F IOUT 1.1 RDS(ON) t F t3 IOUT Fsw (16) but instead of IN as in eq. 3, we use F, the schottky diode drop (approximated as.6) in the equation. Also, there is almost no Miller effect for the low-side MOSFET, since DS is increasing (becoming less negative) as we turn the device on, the gate driver is not having to supply charge to C GD. The voltage collapse for Q is caused by the R DS(ON) going from.6 @ GS = SP, to 9% of SPEC, the gate voltage I OUT GS TH SP DRIER.9 x SPEC t Figure 5. Low-Side turn-off switching loss waveforms The falling edge transition times for the low-side (t3 and t in Figure 5) can now be calculated from the RC equations: t3 F = K (R R ) (18A) 3F DRIER CISS for the highest specified R DS(ON). At 9% of SPEC 4 1.. 11/1/14

Synchronous Buck Loss Calculation.9 K3 F = ln SPEC SP (18B) t F = K F (RDRIER R ) CISS (18C) SP K F = ln (18D) TH Dead-Time (Diode Conduction) Losses The dead-time is the amount of time that both MOSFETs are off. During this time the diode (body diode or parallel schottky diode) is in forward conduction. It's power loss is: P = t F I (19) DIODE DEADTIME F OUT t DEADTIME = t DEADTIME(R) t DEADTIME(F), which are the deadtimes associated before the Node (Figure 1) rises, after Q turns off, and after Node falls, before Q turns on, respectively. To determine t DEADTIME, we need to consider how the driver controls the MOSFET gate drives. Most drivers use "adaptive dead-time circuits, which wait for the voltage of the opposite MOSFET to reach an "off" voltage before beginning to charge its own MOSFET. Most drivers add a fixed delay to prevent shoot-through, especially on the low to high transition. HDR H.S. MOSFET tth () ILDR This approximation holds, since prior to reaching threshold, the gate voltage is low enough that I LDR can be approximated with a constant current of I LDR TH DRIER (1) R R DRIER and typically QG(TH). The diode's total on-time on the falling edge is then: ( R R ) DRIER tdeadtime(f) tdelay(f) TH DRIER () On the rising edge, t DELAY(R) is usually much longer to allow the low-side MOSFET s gate to discharge completely. This is necessary since charge is coupled into the low-side gate during the rising edge of the node. The peak of the resultant voltage spike at the low-side gate is the sum of the amplitude of the injected spike and the voltage the gate has discharged to when the node begins to rise. Sufficient delay is necessary to avoid having the resultant peak rise significantly above the low-side s TH, turning on both MOSFETs, and inducing shoot-through losses. 4nS R DRIER 1 LDR R Damping G R C GS C GD GS 6 5 4 3 LS MOSFET NODE OLTAGE 14 1 1 8 6 Figure 6. Typical Adaptive Gate drive (low-high transition) For the t DEADTIME(F) the diode will be conducting the full load current from the time the switch node falls, until the Low-side MOSFET reaches threshold. This "deadtime" consists of portions: 1. t DELAY(F) : The driver s built in delay time from detection of 1 GS at the high-side MOSFET gate until beginning of low-side MOSFET turnon, plus. t TH : the time for the driver to charge the lowside MOSFET's gate to reach threshold ( TH ). t TH can be approximated by: 1-4 6 8 t (ns) Figure 7. Coupled voltage spike on Low-side MOSFET gate from node rising edge The other component of deadtime on the rising edge is the time it takes for the high-side MOSFET s gate to charge to SP. This is typically less than 1% of t DELAY(R) so we will ignore it and set: t t (3) DEADTIME(R) DELAY(R) 4 1.. 11/1/14 5

Synchronous Buck Loss Calculation Summary of results A spreadsheet which contains MOSFET parameters is used to compute the losses for our example circuit (Table 1) using a 5 gate drive with 6Ω pull-up and Ω pull-down strength. High-Side Low-Side MOSFET FDD6644 FDB6676 Total Switching Loss 1.9.31 1.4 W Conduction Loss.1 1.15 1.36 W Other Losses.6 W Total Losses 1.3 1.46 3. W Output Power.5 W Efficiency 88% Table. Results for 15A example (Table 1) It s instructive to review the results in order to observe a few key points: Switching losses for the low-side MOSFET are only 15% of low-side MOSFET s total losses. Unless the switching frequency is very high (above 1 Mhz.), the loss contribution due to diode conduction (deadtime loss) is minimal. High-side losses are dominated by switching losses since the duty cycle is low. 6 1.. 11/1/14

Synchronous Buck Loss Calculation Appendix: Using the efficiency and loss calculation spreadsheet tool The spreadsheet is avaiable at the following : https://www.fairchildsemi.com/design/design-tools/switching-loss-calculation-tool/ The spreadsheet implements the loss calculations described in this app note. To see the sheet in action press the "Run" button on the "EfficiencySummary" sheet. The controller/driver database models several Fairchild products driver products. A listing of these is found in the ControllerDriver tab. These detailed instructions can also be found in the " General Instructions" tab of the spreadsheet: Notes: DieTemp function Be sure to turn off Macro Protection in Excel to allow the custom functions and macros in this sheet to run. For Excel, this is done through "Tools Macro Security". Set the level to "low". In Excel 97, you can do this through "Tools Options. In the "General" tab, the "Macro irus Protection" box should not be checked. RDS(ON) is a function of die temperature, and the die temperature is a function of Power Dissipation which is in turn dependent on RDS(ON). To solve for dissipation or die temperature, the conduction loss calculations in this spreadsheet use an iterative calculation method to arrive at the die temperature and dissipation. Tabs Definitions EfficiencyChart LossChart ControllerDriver MOSFETDatabase EfficiencySummary Output Function / Description Provides guidance on what MOSFET parametric data to enter in the "MOSFETDatabase" tab. This sheet is a hotlink destination from some of the column headings in the MOSFETDatabase table. Plots efficiency data from the table in EfficiencySummary tab. Plots power loss data from the table in EfficiencySummary tab. Database for the IC Controllers. Fairchild's portable PWM controllers are featured in this database. Any controller can be added by using the "Add" button and filling in the appropriate fields. Database for the MOSFETs. Many popular Fairchild MOSFETs are featured in this database. Any MOSFET can be added by using the "Add" button and filling in the appropriate fields. The main sheet the system requirements and MOSFET choices can be entered, and the data is stored for graphing. To run the graphing routine, push the "RUN" button at the top of the sheet. The calculations contained in the "Synchronous buck MOSFET loss calculations" app note are programmed into this sheet. The EfficiencySummary macro uses this sheet as its calculator. If a particular operating point needs to be examined in more detail, then use this sheet, and enter the parameters by hand. Be sure to save a copy of this workbook before overwriting formulas in "Output" tab. Cells are color coded as follows: Indicates user input parameters Indicates calculated values that can be overwritten with selected values if desired. These fields default to the calculated value directly above them. These fields are written into, or contain formulae that were input on the "EfficiencySummary" sheet. Macro Security Note: Switching Loss Calculation Design Tool excel file uses macros extensively. For the spreadsheet to operate properly, check the Always trust macros from this source box if a security warning appears, then click the Enable Macros button.. This is only required the first time you run a Fairchild spreadsheet tool with macros. 1.. 11/1/14 7