Slots on Ground Fillings of Multi-layer Printed Circuit Board for Suppressing Indirect Crosstalk between Digital Clock Line and RF Signal Line in Mixed Mode Mobile Systems Jun So Pak School of Electrical Engineering, Division of Electrical Engineering & Computer Science, KAIST, Daejeon, Gawon Kim School of Electrical Engineering, Division of Electrical Engineering & Computer Science, KAIST, Daejeon, Frank Hong Advanced CAE Lab, R&D Center, Business, SAMSUNG ELECTRONICS, Suwon, Austin Kim Advanced CAE Lab, R&D Center, Business, SAMSUNG ELECTRONICS, Suwon, Joungho Kim School of Electrical Engineering, Division of Electrical Engineering & Computer Science, KAIST, Daejeon, Abstract In this paper, slots on ground fillings of multi-layer printed circuit board is proposed for suppressing indirect crosstalk between digital clock line and RF signal line in mixed mode mobile systems, and their suppressing efficiency is evaluated by using 2 dimensional finite element method and a series of test vehicles including various slot structures and ground vias on ground fillings. Ground vias mitigate the indirect crosstalk by from 37 db at 800 MHz to 15 db at 1200 MHz, and the proposed slots and ground vias on ground fillings suppress the indirect crosstalk by from 57 db at 800 MHz to 29 db at 1200 MHz. Keywords ground filling; printed circuit board; crosstalk; clock; RF signal; mixed mode; mobile system I. INTRODUCTION Nowadays, a mobile system is a mixed mode system, which means digital signal processing chips e.g. microprocessor unit (MPU) and memory modules, and RF signal processing chips e.g. low noise amplifier (LNA) and mixer are located on a single main board. In order words, a printed circuit board (PCB) for mobile system includes a large number of digital functions e.g. voice recorder, digital camera, music player, video player, and etc, and RF functions e.g. DCS, GSM, PCS, UMTS, and other radio communication standards. [1] As well known, digital functions make high frequency harmonics up to RF function frequency bandwidth and they especially digital clocks give digital harmonic noise to RF function parts. [2] The digital noise is lowering RF sensitivity of mobile system because an unwanted digital harmonics in RF signal bandwidth increase noise level of RF signal and decrease signal to noise ratio (SNR). Digital harmonic noise is usually explained by simultaneous switching noise (SSN). [3-4] However, current multi-layer PCB for mixed mode mobile system has sufficient number of decoupling capacitors on its power distribution networks (PDN) and SSN effects are being mitigated. [4] Another digital harmonic noise coupling to RF function part occurs by means of direct crosstalk e.g. near-end crosstalk (NEXT) and far-end crosstalk (FEXT) by inductive and capacitive couplings between two routed metal patterns on PCB, but it is blocked in design stage of multi-layer PCB by physically separating digital function part and RF function part. In other words, it is difficult for direct crosstalk between digital lines and RF lines to be shown as a degradation of RF sensitivity. Consequently, it seems that there is no RF sensitivity degradation problem by digital noise in multi-layer PCB of mixed mode mobile systems. However, many makers of mixed mode mobile system strive to get better RF sensitivity because there is another digital harmonic noise coupling path i.e. indirect crosstalk between digital clock lines and RF lines through ground fillings of multi-layer PCB. Indirect crosstalk occurs by not by inductive and capacitive couplings. Another requirement of mixed mode mobile system is a tiny size. Therefore, PCB has to have multi-layer structure with densely routed signal lines to support a large number of system functions. But, to reduce manufacturing cost, the makers also want to reduce number of PCB layers or keep small number of them while to increase number of embedded system functions in multi-layer PCB up to almost same as personal computer. These needs make multi-layer PCB for mixed mode mobile system have only one or two ground layers and even no power plane in order to give more routing spaces for signal interconnection lines between the increased number of factions, and include larger area of ground fillings on signal layers to 978-1-4244-1699-8/08/$25.00 2008 IEEE
compensate lack of ground layers, which make signal interconnection line electrically stable. Figure 1. Slots on ground fillings for mitigating indirect crosstalk between digital function part and RF function part by cutting digital noise coupling path or parallel plate wave guide formed by ground fillings on signal layers and ground layer. Ground fillings are very necessary structures for ground points or component ground pads on surface layer of multilayer PCB to easily access to ground layers, to mitigate direct crosstalk between two adjacent signal lines, and to guarantee sufficient ground area for protecting mobile systems from electrostatic discharge (ESD). Mechanically, ground filling is helpful to stabilize manufacturing process of multi-layer PCB by minimizing void area on signal layers. On the other hand, a smaller number of ground layers and a larger area of ground fillings on signal layers in multi-layer PCB raise ground impedances of return current paths of digital clock lines when compared with that of no ground filling case. Ground fillings and ground layer form parallel plate wave guide like as power/ground plane in multi-layer PCB (Fig. 1 (a)). [5] Therefore, the ground impedance of digital clock lines is regarded as plane impedance at the point where digital clock lines meet ground fillings. Plane impedance includes resonance phenomena, input impedance, and transfer impedance (Fig. 2). With regard to signal integrity (SI) of digital clock line, the raised ground impedance due to ground fillings of multi-layer PCB is not critical because digital line is designed with very short length (under 40 mm), terminated by relatively large on-chip input capacitor (~ 10 pf), supports relatively slow digital signal speed (under 100 MHz system clock), and supported by a large number of ground vias on ground fillings (Fig. 1) e.g. blind ground via and through hole ground via are used connecting ground fillings and ground layer, and reducing ground impedance or plane impedance. However, the induced digital noise with high frequency harmonics at ground fillings can be coupled to RF signal line through plane structure formed by ground fillings and ground layer as shown in Fig.1 (a). This is the meaning of the indirect coupling. The coupled digital noise may be larger than the received RF signal and degrades RF sensitivity of mixed mode mobile system. So the indirect crosstalks through ground fillings need to be suppressed. Even though a large number of ground vias is used and reduces ground impedance, there are limitations due to inductance of ground via and lack of spaces for sufficient number of ground via as shown in current commercial high density multi-layer PCB. Consequently, a new method to additionally suppress indirect crosstalk between digital clock line and RF signal line is needed under keeping changes of current multi-layer PCB design minimized because there are many needs for ground fillings as mentioned before. To get additional suppression of the indirect crosstalk through ground fillings, we have proposed slots on ground fillings between digital function part and RF function part as shown in Fig. 1 (b). A slot structure is usually used for SSN noise isolation between two different power networks. [6] As previously mentioned, digital and RF function parts are separated in design stage of multi-layer PCB, and many ground vias are located for electrically isolation between two parts. However, using ground vias on ground fillings are very restricted by densely routed signal interconnection lines on signal layers. To get ground impedance suppression effects of ground via, ground vias uniformly spread over all ground fillings, but that is very difficult work in practical multi-layer PCB design. That means there is no way to suppress indirect crosstalk through ground fillings by adding any components on multi-layer PCB. So we have physically divided single ground filling combining two ground points of digital clock and RF signal lines into tow ground fillings, one is for ground point of digital clock line and the other is for that of RF signal line; this is the proposed slots on ground fillings. Fig. 1 (a) shows the case of single ground filling and Fig. 1 (b) shows that of two ground fillings after applying the proposed slots on ground fillings of signal layers. Then there is no electrical connection supported by parallel plate wave guide between two parts and there is no indirect crosstalk through ground fillings theoretically. In respect of electrical net assignment, two ground fillings are still same ground net combined by ground layer (Layer 4) and there is no electrical design problem. (Fig. 1 (b)) In this paper, we have thoroughly investigated the indirect crosstalk mechanism between digital clock line and RF line caused by ground fillings on signal layers and ground layer. In order to explain and evaluate the indirect crosstalk, we have used 2-dimensional finite element method (2-D FEM) and a series of test vehicles with changes of ground filling structure e.g. without and with the proposed slots and their positions, and ground via types e.g. blind ground via and through hole ground via. The test vehicles have been designed based on layer information of a commercial multi-layer PCB for a currently developed WCDMA mobile phone. The amount of indirect crosstalk from digital clock line to RF line becomes larger as ground filling area is larger and number of ground vias is smaller. Then we could confirm that ground fillings and ground layer act as parallel wave guide, induce plane impedance, increase ground impedances of digital clock line and RF signal line, and raise indirect crosstalk from digital clock line to RF signal line. They are a main source of RF sensitivity degradation of current mixed mode mobile systems. Finally, we have showed the proposed slots on ground fillings are very excellent method for suppressing the indirect crosstalk and give the additional reduction of the indirect crosstalk even when a
multi-layer PCB is designed with no change of current PCB design methods. And we also proposed the method how to apply the proposed slots on multi-layer PCB. Without compliance of the proposed application method of the proposed slots on ground fillings, no additional suppression of the indirect crosstalk is obtained. Finally, through the experiments, we could confirm that the proposed slots on ground fillings give additional reductions of the indirect crosstalk even when ground vias are used in ground fillings by from 14 db to 20 db in the bandwidth of from 800 MHz to 1200 MHz. II. INDIRECT CROSSTALK THROUGH GROUND FILLINGS A. Mechanism of Indirect Crosstalk through Ground Fillings As mentioned in chapter I, ground fillings on signal layers and ground layer form parallel plate wave guide. Fig. 1 shows 3 pairs of parallel plate wave guides composed with 3 ground fillings (layer1, layer2, and layer3) and 1 ground layer (layer4). Therefore, all positions on ground fillings have plane impedance or ground impedance. If a signal line (upper PCB interconnection line in Fig. 2) is designed on layer1 and connected to digital clock Tx on the same layer1, digital clock return current ( Ir ) of digital clock current ( Is ) flows from ground filling on layer2 to ground filling on layer1 because a return current follows closest ground fillings from the signal line. Namely, when Ir arrives at the signal point (upper circled white colored S) of digital clock Tx, Ir is transited from ground filling on layer2 to ground filling on layer1. And then, Ir meets a discontinuity between two ground fillings on layer1 and layer2. This discontinuity is explained by plane impedance (ground impedance; Z11 ), and induces an unwanted noise voltage V1 ( coupled digital clock harmonics = Ir Z11 ) including digital clock harmonic at the ground point (upper circled gray colored G) or between two ground fillings of layer1 and layer2. And let another signal line (lower PCB interconnection line in Fig. 2) connected to RF Rx and antenna, and its return current paths are on the ground fillings of layer1 and layer2, V1 is transferred to the grounding point (lower circled gray colored G) of RF Rx, and adds transferred digital clock harmonics ( V2 ) to received RF signal return current ( Ir RF ). V2 is related to transfer impedance ( Z21 ) of the two grounding points of digital clock Tx and RF Rx and calculated by Ir Z21. Consequently, the received RF signal ( V RX ) at RF Rx is distorted by V2 like as V RF + V2. If V2 is larger than available noise voltage level of RF Rx, mobile system can not support a communication. For example, if a mobile system uses 50 MHz digital clock with 2 nano second (ns) rising time and 950 MHz RF carrier frequency, the 19 th harmonic frequency of 50 MHz digital clock exactly coincides with 950 MHz RF carrier frequency. The voltage of the 19 th harmonic is 10 mv (= 36 dbm) in lossless case. If the mobile system receives 110 dbm (= 1 uv) RF signal through antenna, an available indirect crosstalk level must be under 80 db (= 20 log 10 [1uV/10mV]). Since 80 db is calculated when V RF and V2 are same, the available indirect crosstalk level must be lowered far away from 80 db in practical case. B. Evaluation of Indirect Crosstalk through Ground Fillings To evaluate indirect crosstalk through ground fillings on signal layers, we have designed a series of test vehicles and compared amount of their indirect crosstalk. Fig. 3 shows the stack up (Fr-4 insulator; ε r = 4.3) and the typical design of the test vehicles. layer1, layer2, and layer3 are assigned to signal layer and layer4 is to ground layer. All test vehicles have the same stack up, the same size ground layer (40 mm 60 mm), one digital clock line from digital Tx port to digital Rx port, and one RF signal line from RF Rx port to antenna port. The evaluations, which are coupling ratio between digital Tx port and RF Rx port, are obtained by using 2 dimensional finite element method (2-D FEM). First, we have evaluated and compared the indirect crosstalks of 4 test vehicles. All test vehicles have ground layer on Layer 4. 1 st test vehicle has no ground fillings on 4 signal layers, 2 nd one has ground fillings on all signal layers without any ground vias except for 3 through hole ground vias for ground net assignment of all ground fillings, 3 rd one has ground fillings on all signal layers and 300 blind ground vias connect all ground fillings to ground layer, and 4 th one has ground fillings on all signal layers and 300 through hole ground vias are used for grounding all ground fillings. The blind and through hole ground vias of 3 rd and 4 th test vehicles have 300 um diameter and 2.5 mm distance from each other. 3 types of blind ground vias were alternatively used. One connects layer1 and layer2, another does layer2 and layer3, and the other does layer3 and layer4. All ground fillings of layer1, layer2, and layer3 have been designed with same shape. All ground fillings have digital chip cutout (void) area and RF chip cutout (void) area in order to consider BGA ball pads and very densely routed signal lines under the chips in practical multi-layer PCB. Figure 2. Mechanism of indirec crosstalk through ground fillings and ground layer. Ground fillings and ground layer form paraller plate wave guide and make ground impedances (Z11, Z22) and transfer impedance (Z21). The impedances induce digital clock harmonic noise, transfer the induced noisd to RF signal, and degrade RF sensitivity of RF Rx chip.
function part and cut the path of indirect crosstalk as shown in Fig. 1 and a typical design of Fig. 3. Slots isolate two return current paths of digital clock line and RF signal line and strongly suppress transfer impedance ( Z21 ) between two ground points of digital Rx port and RF Rx port. Figure 3. PCB stack up (up and left) and a typical design of the test vehicles. PCB has 4 layers and Fr-4 insulated (dielectric constant = 4.3). All test vehicles have one digital clock line (upper bound of slots), RF signal line (lower bound of slots), and ground layer without any cutouts. The evaluated indirect crosstalk of the 1 st test vehicle without ground fillings and slots is not shown in Fig. 4 because ground fillings is the main source of indirect crosstalk between digital clock line and RF signal line and there is no indirect crosstalk. The indirect crosstalk of the 2 nd test vehicle shows very high level in all frequency range. As mentioned before, ground fillings and ground layer lead to phenomena of parallel plate wave guide and cause very high ground impedance at digital Tx port and RF Rx port (Fig. 3). So (a) line of Fig. 4 shows the resonances and the very high indirect crosstalk. The indirect crosstalk of the 3 rd test vehicle is suppressed by 90 db at 1 GHz ((b) line of Fig. 4). This suppression comes from 300 blind ground vias, which reduce ground impedance between digital Tx port and RF Rx port. The indirect crosstalk of the 4 th test vehicle ((c) line of Fig. 4) shows the 40 db additional suppression compared with (b) line of Fig. 4 at 1 GHz. The 40dB additional suppression is achieved by 300 through hole ground vias because single through hole ground via acts as 3 blind ground vias and it can reduce ground impedance more effectively by means of reducing inductance of ground vias. It is well known that multi-connected vias have small inductance. III. SLOTS ON GROUND FILLINGS In the chapter II, we could know that the indirect crosstalk between digital clock line and RF signal line is caused by ground fillings on signal layers and the usage of a large number of ground vias on ground fillings is very helpful to reduce the amount of indirect crosstalk by reducing ground impedance. However, when a designed multi-layer PCB does not show a sufficient RF sensitivity level even though it has a large number of ground vias on ground fillings, the additional suppression method of indirect crosstalk is needed. It is very difficult to improve RF sensitivity by adding a few number of ground vias on ground fillings to the already designed multilayer PCB. So we have proposed slots on ground fillings of signal layers as shown in Fig. 3. The proposed slots on ground fillings are located between digital function part and RF Figure 4. Comparison of indirect crosstalks of from 2 nd to 4 th test vehicles. The solid line (a) is the indirect crosstalk of the 2 nd test vehicle. The dot dashed line (b) is the indirect crosstalk of the 3 rd test vehicle. The dashed line (c) is the indirect crosstalk of the 4 th test vehicle. The results in this figure were obtained by using 2-D FEM. Figure 5. Comparison of indirect crosstalks of 3 test vehicles ((b)-(d)) with application of the proposed slots on ground fillings. The solid line (a) is the indirect crosstalk of the 2 nd test vehicle used in chapter II-B. The dotted line (b) is the amount of the indirect crosstalk of the 5 th test vehicle, that of 6 th is the dot dashed line (c), and that of 7 th is the long dashed line (d). The results in this figure were obtained by using 2-D FEM. A. Evaluation of Slots on Ground Fillings To evaluate effects of the proposed slots on ground fillings of signal layers, we have additionally designed three test vehicles with changes of slot condition and ground via condition. The 5 th test vehicle has the same structures as the 2 nd test vehicle used in chapter II-B, but includes the proposed slots on ground fillings. All ground fillings divided by the slots are independently connected to ground layer (layer4) using three through hole ground vias. The 6 th one has the proposed slots on ground fillings and same structures (i.e. 300 blind ground vias are used on ground fillings) as the 3 rd test vehicle
of chapter II-B. The 7 th one includes the proposed slots on ground fillings and follows the structure of the 4 th test vehicle of chapter II-B (i.e. 300 through hole ground vias are applied to ground fillings). The indirect crosstalk levels of three test vehicles are calculated using 2-D FEM and compared in Fig. 5. As shown in Fig. 5, the proposed slots on ground fillings can suppress the indirect crosstalk by 60 db at 1 GHz without help of ground vias on ground fillings (see the lines (a) and (b)). When 300 blind ground vias are combined into ground fillings, the amount of the indirect crosstalk is more suppressed. Moreover, when the line (c) of Fig. 5 and the line (b) of Fig. 4 are compared, we could know that the 60 db suppression effect of the proposed slots on ground fillings is kept under application of a large number of ground via. The line (d) of Fig. 5 also shows the maintained 60 db suppression effect of the proposed slots on ground fillings. Consequently, the proposed slots on ground fillings always give the additional 60 db suppression of the indirect crosstalk. These two comparisons of before and after application of the proposed slots on ground fillings mean that the proposed slots on ground fillings are the only method to strongly suppress the indirect crosstalk through ground fillings between digital clock line and RF signal line without adding any components to the designed multi-layer PCB. B. Experiments of Effects of Slots on Ground Fillings Until now, we have investigated and evaluated the indirect crosstalk through ground fillings and the proposed slots on ground fillings by using 2-D FEM. To confirm the previously evaluated results, we have measured the indirect crosstalk by using the manufactured 4 test vehicles. Three of them are the cases (a) (w/o ground via and w/o slots) and (c) (w/ through hole ground via and w/o slot) of Fig. 4, and the case (d) (w/ through hole ground via and w/ slot) of Fig. 5. The last one was designed that slots are not combined with RF chip cutout i.e. without cutout effect (Fig. 3, Table I). And a pulse pattern generator (PPG) was connected to digital Tx port to excite digital clock line using 50 MHz clock with 1.8 V P-P swing and 100 pico second (ps) rising time, and a spectrum analyzer with 10 khz resolution bandwidth and 120 dbm reference level was connected to RF Rx port to measure the indirect crosstalk. The connections of two equipments and the test vehicles are supported by two 250 um pitch GS and SG type microprobes and probe stations. Digital Rx port and antenna port were terminated with 50 Ω chip type registers. (see Fig. 3 to know the exact port positions) Table I compares the measured amount of indirect crosstalks. The measurement bandwidth is from 800 MHz to 1200 MHz. The indirect crosstalk appears at the frequencies of digital clock harmonics (1 st column of table I). Even numbered clock harmonics must disappear based on fourier transform of half duty cycle of clock signal, but they appears at the measurement due to unstable duty cycle of clock signal but still smaller value than those of adjacent two odd harmonics. The suppressed indirect crosstalk by through hole ground vias and the proposed slots on ground fillings are confirmed by comparing 2 nd and 3 rd columns of table I ( 1 ) and comparing 3 rd and 4 th columns of table I ( 2 ). The values of 1 and 2 in dashed line boxes are differences of two adjacent columns and the suppression efficiencies of through hole ground via and the proposed slots on ground fillings respectively. But the measured suppression efficiencies are smaller than the evaluated suppression efficiencies shown in Figs. 4 and 5. The main reason of these discrepancies between the measurements and the evaluations is direct coupling between two microprobes. When two microprobes are connected to two equipments and separated with the same distance as that of digital Tx port and RF Rx port without connection to the test vehicle, the measured coupled digital harmonics values between two microprobes are 93 dbm at 850 MHz, 99 dbm at 950 MHz, and 97 dbm at 1050MHz. These mean that already large amount coupling occurs through the direct coupling between two microprobes because there are impedance mismatching between microprobe and two digital clock and RF signal lines, and exposed signal and ground pins of microprobe. In the experiments, we have confirmed that through hole ground vias mitigate the indirect crosstalk by from 37 db at 800 MHz to 15 db at 1200 MHz, and the proposed slots and ground vias on ground fillings suppress the indirect crosstalk by from 57 db at 800 MHz to 29 db at 1200 MHz. We also know that the suppression efficiency is lowering as clock harmonic frequency is growing as shown in Figs. 4 and 5 because the higher frequency gives the higher inductance of through hole ground via and the higher fringing capacitance at slot structure. The 4 th column shows the measured indirect crosstalk of the last test vehicle (w/ through hole ground via and w/ slots but w/o cutout effect) and the almost same values as those of the 2 nd column. This is because the slots without cutout effect cannot isolate two ground points of digital Rx port and RF Rx port. To get the suppression effect of the proposed slots on ground fillings, the slot structure has to be designed combining RF chip cutout. TABLE I. THE AMOUNT OF INDIRECT CROSSTALK OBTAINED BY EXPERIMENTS IV. CONCLUSION In this paper, we have investigated the indirect crosstalk between digital clock line and RF signal line induced by
ground fillings of signal layers. Since ground fillings and ground layer form parallel plate wave guide and raise ground impedance of digital clock lines reaching surface layer, the digital clock harmonic noise in high frequency range is induced at ground fillings, and it is transferred to RF signal line through ground fillings by means of transfer impedance. Consequently, when the frequency of the transferred digital clock harmonic noise coincides with the frequency of RF function frequency, the degradation of RF sensitivity of mixed mode mobile system appears. We have evaluated the indirect crosstalk a series of test vehicles by using 2 dimensional finite element method (2-D FEM) when conventional multi-layer PCB design methods are applied. Through evaluations, we have confirmed that the indirect crosstalk is mainly caused by ground fillings of signal layers and ground layer, and it can be mitigated by using a large number of through hole ground vias and blind ground vias. For getting more mitigated indirect crosstalk, through hole signal via is more effective. And then, we have proposed the slots on ground fillings to get additional suppression of indirect crosstalk. The proposed slots on ground fillings are dividing single ground fillings combining two ground points of digital clock line ( digital Rx port ) and RF signal line ( RF Rx port ) into two ground fillings, one is for digital clock line and the other is for RF signal line. Then the proposed slots on ground fillings reduce transfer impedance between two ground points and strongly suppress the indirect crosstalk between digital clock line and RF signal line through ground fillings. In the evaluation of the proposed slots on ground fillings, they give the 60 db additional suppression of the indirect crosstalk irrespective of ground via condition. Finally, we have confirmed the suppression effectiveness of the proposed slots on ground fillings through the experiments with the designed and manufactured test vehicles. Even though the measured effectiveness of the proposed slots on ground fillings is smaller than that of the evaluation, we could confirm that the proposed slots on ground fillings give additional suppression of the indirect crosstalk than the through hole ground vias do, and the proposed slots on ground fillings are very efficient method to suppress the indirect crosstalk between digital clock line and RF signal line through ground fillings even there is no need of additional manufacturing cost. ACKNOWLEDGMENT This work was supported by the IT R&D program of MIC/IITA [2005-S-118-02, Development of High-Performance and Smallest SiP Technology] and the Brain Korea 21 project [the School of Information Technology, KAIST in 2008]. REFERENCES [1] Harri Holma, and Antti Toskala, WCDMA for UMTS. West Sussex, England: John Wiley & Sons, Ltd, 2000. [2] William J. Dally, and John W. Poulton, Digital Systems Engineering. Cambridge, UK: Cambridge Univeristiy, 1998. [3] Jongbae Park, Hyungsoo Kim, Youchul Jeong, Jingook Kim, Jun So Pak, Dong Gun Kam, and Joungho Kim Modeling and Measurement of Simultaneous Switching Noise Coupling through Signal Via Transition, IEEE Trans. on Advanced Packaging, vol. 29, no. 3, pp. 548-559, Aug. 2006. [4] Madhavan Swaminathan, and A. Ege Engin, Power Integrity Modeling and Design for Semiconductors and Systems. Boston, MA: Prentice Hall, 2008. [5] Jun So Pak, Hyungsoo Kim, Junwoo Lee, and Joungho Kim, Modeling and measurement of radiated field emission from a power/ground plane cavity edge excited by a through-hole signal via based on a balanced TLM and via coupling model, IEEE Trans. on Advanced Packaging, vol. 30, no. 1, pp. 73-85, Feb. 2007. [6] Youchul Jeong, Albert Chee W. Lu, Lai L. Wai, Wei Fan, Boon.K. Lok, Hyunjeong Park, and Joungho Kim, Hybrid Analytical Modeling Method for Split Power Bus in Multi-layered Package, IEEE Transactions on Electromagnetic Compatibility, vol. 48, no.1, pp. 82-94, Feb. 2006.