Effective Power/Ground Plane Decoupling for PCB
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1 Effective Power/Ground Plane Decoupling for PCB Dr. Bruce Archambeault IBM Distinguished Engineer IEEE Fellow IBM Research Triangle Park, NC IEEE October 2007
2 Power Plane Noise Control Ground Bounce October 2007 Dr. Bruce Archambeault 2
3 Power/Ground-Reference Plane Noise Must consider TWO Major Factors EMC -- Reduce noise along edge of board from IC somewhere else Functionality -- Provide IC with sufficient charge Decoupling strategies are FULL of Myths Consider the physics Don t forget Inductance! October 2007 Dr. Bruce Archambeault 3
4 Source of Power/Ground-Reference Plane Noise Power requirements from IC during switching Critical Net currents routed through via October 2007 Dr. Bruce Archambeault 4
5 Power Bus Spectrum Clock Driver IDT74FCT807 October 2007 Dr. Bruce Archambeault 5
6 Noise Injected between Planes Due to Critical Net Through Via 20 cm I/O Pin/Via Signal Via FR4 r =4.2 Loss tan= cm October 2007 Dr. Bruce Archambeault 6
7 Transfer Function from Via to I/O Pin Transfer Function From Via-to-Via 20x30cm Board mil Seperation 10 mil Seperation 15 mil Seperation 25 mil Seperation 35 mil Seperation -20 Transfer Function (db) E+08 1.E+09 1.E+10 Frequency (Hz) October 2007 Dr. Bruce Archambeault 7
8 Decoupling Must be Analyzed in Different Ways for Different Functions EMC Resonance big concern Requires STEADY-STATE analysis Frequency Domain Transfer function analysis Eliminate noise along edge of board due to ASIC/IC located far away October 2007 Dr. Bruce Archambeault 8
9 Decoupling Must be Analyzed in Different Ways for Different Functions Provide Charge to ASIC/IC Requires TRANSIENT analysis Charge will NOT travel from far corners of the board fast enough Local decoupling capacitors dominate Impedance at ASIC/IC pins important October 2007 Dr. Bruce Archambeault 9
10 Steady-State Analysis Measurements and Simulations Test Board with Decoupling capacitors every 1 square October 2007 Dr. Bruce Archambeault 10
11 Test Board Ports #1 #2 #3 #4 # #6 #7 #8 #9 #10 #11 #12 #13 #14 # Figure 1 October 2007 Dr. Bruce Archambeault 11
12 S21 Used for Decoupling Goodness Ratio of Power out to power in Better Indicator of EMI noise transmission across board Also used to validate simulations October 2007 Dr. Bruce Archambeault 12
13 Measured S21 for 12" x 10" PC Board Between Power/Ground Planes with No Decoupling Capacitors (Measured Center to Corner) Board Capacitance Dominates -30 S21 (db) Physical Board Size Resonances Dominate E E E E E E E E E E E+09 Frequency (Hz) October 2007 Dr. Bruce Archambeault 13
14 Test Board Decoupling Capacitor Placement for uf Caps Possible Cap Location Populated Cap Locations October 2007 Dr. Bruce Archambeault 14
15 Test Board Decoupling Capacitor Placement for uf Caps Possible Cap Location Populated Cap Locations October 2007 Dr. Bruce Archambeault 15
16 0 Measured S21 for 12" x 10" PC Board Between Power/Ground Planes with Various Amounts of Decoupling Capacitors (Measured Center to Corner) S21 (db) No Caps 25 Caps 50 Caps 99 Caps E E E E E E E E E E+09 Frequency (Hz) October 2007 Dr. Bruce Archambeault 16
17 S21 Between Port #8 and Port #1 on Test Board With Various Amounts of.01 uf Decoupling Capacitors 0 No Caps Caps 51 Caps Caps S21 (db) E E E E E E E E E E+09 Frequency (Hz) October 2007 Dr. Bruce Archambeault 17
18 10000 Cap Impedance 0.01uF 22pF 0.01uF in parallel with 22pF 1000 Z (Ohms) E E E E E+10 Freq (Hz) October 2007 Dr. Bruce Archambeault 18
19 Test Board Decoupling Capacitor Placement for 41 22pf Caps (In Addition to 99.01uf Caps) Possible Cap Location Populated Cap Locations October 2007 Dr. Bruce Archambeault 19
20 S21 Between Port #8 and Port #1 on Test Board With uf Decoupling Capacitors and Various Amounts of 22pf Capacitors Added 0-10 S21 (db) pf Caps 17 22pf Caps 21 22pf Caps 33 22pf Caps 41 22pf Caps 99 22pf Caps 99 Caps E E E E E E E E E E+09 Frequency (Hz) October 2007 Dr. Bruce Archambeault 20
21 Measured Comparison of Multiple and Single Value Decoupling Capacitor Strategies S21 Transfer Function (db) No Caps uf Caps 0.01 uf and 330 pf Caps E E E E E E E E E E+09 Frequency (Hz) October 2007 Dr. Bruce Archambeault 21
22 0.0 Comparison of Model and Measured Data for 10" x 12" Board 99 caps -- alternating.01uf and 330pF S21 (db) CIAO -.01uF & 330 pf Measured E E E E E E E E E E E+09 Frequency (Hz) October 2007 Dr. Bruce Archambeault 22
23 0 S21 Transfer Function for Different Value Capacitors Center-to-Corner 10" x 12" Board S21 (db) uF caps uF caps uF caps 99 Caps (0.01uF and 330pF) 99 2nh shorts E E E E E E E E E E E+09 Frequency (Hz) October 2007 Dr. Bruce Archambeault 23
24 Voltage 350 MHz.01uF and 330pF Case (Source in Center) October 2007 Dr. Bruce Archambeault 24
25 Voltage 750 MHz.01uF and 330pF Case (Source in Center) October 2007 Dr. Bruce Archambeault 25
26 Voltage 950 MHz.01uF and 330pF Case (Source in Center) October 2007 Dr. Bruce Archambeault 26
27 Decoupling Capacitor Mounting Keep as to planes as close to capacitor pads as possible Inductance Depends on Loop AREA Via Separation Height above Planes October 2007 Dr. Bruce Archambeault 27
28 Decoupling Capacitor Mounting Keep as to planes as close to capacitor pads as possible IC IC Connection Inductance Loop Capacitor Capacitor Connection Inductance Loop Plane Inductance Loop October 2007 Dr. Bruce Archambeault 28
29 Via Configuration Can Change Inductance SMT Capacitor The Good The Bad The Ugly Via Capacitor Pads Best Better Really Ugly October 2007 Dr. Bruce Archambeault 29
30 Comparison of Decoupling Capacitor Impedance 100 mil Between Vias & 10 mil to Planes pF 0.01uF Impedance (ohms) uF 1.0uF E E E E E+10 Frequency (Hz) October 2007 Dr. Bruce Archambeault 30
31 Comparison of Decoupling Capacitor Via Separation Distance Effects Via Separation 0.1 uf Capacitor 10 mils Via Seperation (mils) Inductance (nh) 1 GHz (ohms) October 2007 Dr. Bruce Archambeault 31
32 Example Connection Inductance Values Spacing between Vias *10mil Complex Formula (20 mils to plane) 3.0 nh Simple rect loop (20 mils to plane) 3.1 nh Complex Formula (10 mils to plane) 2 nh Simple rect loop (10 mils to plane) 1.38 nh *100mil 4.1 nh 4.3 nh 3 nh 2.0 nh *160mil 5.1 nh 5.1 nh 3.5 nh 2.5 nh *10mil 2.3 nh 1.74 nh 1.1 nh 0.8 nh *100mil 3.3 nh 3.15 nh 2.1 nh 1.5 nh *160mil 4.2 nh 4.3 nh 2.4 nh 2.07 nh Sources for complex formula: Knighten, James L., Bruce Archambeault, Jun Fan, Samuel Connor, James L. Drewniak, PDN Design Strategies: II. Ceramic SMT Decoupling Capacitors Does Location Matter?, IEEE EMC Society Newsletter, Issue No. x, Winter 2006, pp ( Fan, Jun, Wei Cui, James L. Drewniak, Thomas Van Doren, and James L. Knighten, Estimating the Noise Mitigating Effect of Local Decoupling in Printed Circuit Boards, IEEE Trans. on Advanced Packaging, Vol. 25, No. 2, May 2002, pp October 2007 Dr. Bruce Archambeault 32
33 Transient Analysis (Time Limited) Provide charge to ASIC/IC Inductance dominates impedance Loop area 1 st order effect Traditional analysis not accurate enough October 2007 Dr. Bruce Archambeault 33
34 Current in IC During Logic Transitions (CMOS) IC driver V DC V CC switch Z 0, v p IC load C L GND V CC V CC IC driver charge IC load IC driver discharge IC load Z 0, v p V CC Z 0, v p 0 V shoot-thru current GND logic 0-1 shootthru current GND logic 1-0 October 2007 Dr. Bruce Archambeault 34
35 Typical PCB Power Delivery SMT capacitors GND V CC GND V CC DC/DC converter (Power source) GND IC load electrolytic capacitor V CC GND GND IC driver V CC GND V CC V CC October 2007 Dr. Bruce Archambeault 35
36 Equivalent Circuit for Power Current Delivery to IC L ps connector and wiring capacitor leads via interconnect L trace PCB wiring V DC L bulk L via C planes IC load switch C bulk C SMT DC/DC converter electrolytic capacitors SMT capacitors V CC /GND plane October 2007 Dr. Bruce Archambeault 36
37 Traditional Analysis #1 Use impedance of capacitors in parallel ESR 1 ESR 2 ESR 3 ESR 4 ESL 1 ESL 2 ESL 3 ESL 4 1uF 0. 1uF 0.01uF.001uF Impedance to IC power/gnd pins No Effect of Distance Between Capacitors and IC Included! October 2007 Dr. Bruce Archambeault 37
38 1000 Traditional Impedance Calculation for Four Decoupling Capacitor Values Impedance (ohms) uF.01uF.001uF.0001uF All in Parallel E E E+09 Frequency (Hz) October 2007 Dr. Bruce Archambeault 38
39 Traditional Analysis #2 Calculate loop area Traditional loop Inductance formulas Which loop area? Which size conductor ESR 1 ESR 2 ESR 3 ESR 4 ESL 1 +L d1 ESL 2 +L d2 ESL 3 +L d3 ESL 4 +L d4 Impedance to IC power/gnd pins 1uF 0. 1uF 0.01uF.001uF Over Estimates L and Ignores Distributed Capacitance October 2007 Dr. Bruce Archambeault 39
40 More Accurate Model Includes Distributed Capacitance Intentional Decoupling Capacitors IC Power Pin Distributed capacitors October 2007 Dr. Bruce Archambeault 40
41 Distributed Capacitance Schematic Intentional Capacitor Distributed Capacitance ESR Loop L Capacitance Note: L increases as distance from source increases Source October 2007 Dr. Bruce Archambeault 41
42 Effect of Distributed Capacitance Can NOT be calculated/estimated using traditional capacitance equation Displacement current amplitude changes with position and distance from the source October 2007 Dr. Bruce Archambeault 42
43 Displacement Current 500 MHz mils from Source October 2007 Dr. Bruce Archambeault 43
44 Need to Find the Real Effect of Decoupling Capacitor Distance Perfect decoupling capacitor is a via between planes FDTD simulation to find the effect of shorting via distance from source Vary spacing between planes, distance to via, frequency, etc October 2007 Dr. Bruce Archambeault 44
45 100 Impedance of Shorting Via vs. Frequency Four Via Case (20 mil Seperation Between Plates) 10 Impedance (ohms) 1 20mils 50mils 70mils 90mils 120mils 40mils 60mils 80mils 100mils 130mils 140mils 150mils 160mils 180mils 200mils 220mils 240mils 250mils 350mils 450mils E+08 1.E+09 1.E+10 Frequency (Hz) October 2007 Dr. Bruce Archambeault 45
46 Impedance Result Linear with frequency (on log scale) Looks like an inductance only! Consider this inductance an Apparent Inductance Apparent inductance is constant with frequency October 2007 Dr. Bruce Archambeault 46
47 Apparent Inductance for One Shorting Via Case 20 mil Plate Separation Inductance (nh) mils 110mils 120mils 200mils 250mils 350mils 450mils 0 1.E+08 1.E+09 1.E+1 Frequency (Hz) October 2007 Dr. Bruce Archambeault 47
48 Formulas to Predict Apparent Inductance L L L L one via two via three via four via = (0.1336s = (0.1307s = (0.1242s = (0.1192s ) Ln( dist) + ( s ) Ln( dist) + ( s ) Ln( dist) + ( s ) Ln( dist) + ( s s = separation between plates (mils/10) dist = distance to via ) ) ) ) October 2007 Dr. Bruce Archambeault 48
49 True Impedance for Decoupling Capacitor IC Capacitor Power Gnd LIC Lapparent Lcap Lapparent ESR Lcap + LIC Source Nominal Capacitance October 2007 Dr. Bruce Archambeault 49
50 Impedance Calculation with Apparent Inductance for Four Decoupling Capacitor Values 10 Cap Value Distance to Cap from IC Case 1 Case 2 Case uf 800mils 1200mils 1500mils 0.01 uf 600mils 900mils 1100mils 0.001uF 400mils 700mils 800mils uF 200mils 400mils 400mils Case1 Case2 Case3 Traditional Calculation 1 Impedance (ohms) E+07 1.E+08 1.E+09 Frequency (Hz) October 2007 Dr. Bruce Archambeault 50
51 Effect of Distributed Capacitance Can NOT be calculated/estimated using traditional capacitance equation Displacement current amplitude changes with position and distance from the source Following examples use cavity resonance technique (EZ-PowerPlane) Frequency Domain to compare to measurements Time Domain using SPICE circuit from cavity resonance analysis October 2007 Dr. Bruce Archambeault 51
52 Parameters for Comparison to Measurements Dielectric thickness = 35 mils Dielectric constant = 4.5, Loss tan = 0.02 Copper conductivity = 5.8 e7 S/m October 2007 Dr. Bruce Archambeault 52
53 0 Measured vs Model (MoM) S21 for 12" x 10" PC Power/gnd with 25.01uF caps Position 8-to-1 No Caps - Measured -10 EZ-PP No Caps -20 S21 (db) E E E E+10 Frequency (Hz) October 2007 Dr. Bruce Archambeault 53
54 0.0 Measured vs Model (EZ-PP) S21 for 12" x 10" PC Power/gnd with 25.01uF caps Position 8-to S21 (db) Measured EZ-PP 25 caps E E E E+10 Frequency (Hz) October 2007 Dr. Bruce Archambeault 54
55 Measured vs Model (EZ-PP) S21 for 12" x 10" PC Power/gnd with 95.01uF caps Position 8-to S21 (db) Caps - Measured 95 Caps - EZ-PP E E E E+10 Frequency (Hz) October 2007 Dr. Bruce Archambeault 55
56 Impedance at Port #1 Single 0.01 uf Capacitor at Various Distances (35mil Dielectric) Impedance (dbohms) no caps 300 mils 500 mils 700 mils 1000 mils E E E E+10 October 2007 Dr. Bruce Frequency Archambeault (Hz) 56
57 2 Z11 Phase Comparison as Capacitor distance Varies for 35 mils FR4 ESL = 0.5nH Phase (rad) mils 200 mils 300 mils 400 mils 1000 mils 2000 mils E E E E+09 Frequency (Hz) October 2007 Dr. Bruce Archambeault 57
58 Impedance at Port #1 Single 0.01 uf Capacitor at Various Distances (10mil Dielectric) Impedance (dbohms) no caps 300 mils 500 mils 700 mils 1000 mils E E E E+10 October 2007 Dr. Bruce Frequency Archambeault (Hz) 58
59 Cavity Resonance (EZ-PowerPlane) Equivalent Circuit for HSPICE Port i Lij Port j Lii Ljj Nmni C0 Lmn Gmn Nmnj Port n N01i C0 L01 G01 N01j N00i C0 G00 N00j October 2007 Dr. Bruce Archambeault 59
60 Impedance Comparison (EZ-PP vs HSPICE) at Port #1 Single 0.01 uf Capacitor at Various Distances (10mil Dielectric) Impedance (dbohms) mils 300 mils (HSPICE) 1000 mils 1000 mils (HSPICE) E E E E+10 October 2007 Dr. Bruce Frequency Archambeault (Hz) 60
61 1.2 Current Source Pulse for Simulated IC Power/GND 750 ps Rise/Fall Current (amps) Time (ns) October 2007 Dr. Bruce Archambeault 61
62 2 Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp) Single Capacitor (with 2 nh) at Various Distances (Fullwave Simulation) 1.5 Level (volts) ps Rise, 35 mil 10mils 750ps Rise, 35 mil planes, 400mils 750ps Rise, 35 mil 800mils 750ps Rise, 35 mil 1200mils 750ps Rise, 35 mil 1600mils Time (ns) October 2007 Dr. Bruce Archambeault 62
63 50 Time Domain Current through Capacitor From Simulated IC Power/GND (1 amp) Single Capacitor (with 2nH) at Various Distances 0-50 Current (milliamps) ps Rise, 35 mil 10mils 750ps Rise, 35 mil 400mils 750ps Rise, 35 mil 800mils 750ps Rise, 35 mil 1200mils 750ps Rise, 35 mil 1600mils Time (ns) October 2007 Dr. Bruce Archambeault 63
64 Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp) Single Capacitor (with No L) at Various Distances 750ps Rise, 35 mil 10mils 750ps Rise, 35 mil 400mils 750ps Rise, 35 mil 800mils 750ps Rise, 35 mil 1200mils 750ps Rise, 35 mil 1600mils 0.5 Level (volts) Time (ns) October 2007 Dr. Bruce Archambeault 64
65 400 Time Domain Current through Capacitor From Simulated IC Power/GND (1 amp) Single Capacitor (with no L) at Various Distances Current (milliamps) ps Rise, 35 mil 10mils 750ps Rise, 35 mil 10mils 750ps Rise, 35 mil 800mils 750ps Rise, 35 mil 1200mils 750ps Rise, 35 mil 1600mils Time (ns) October 2007 Dr. Bruce Archambeault 65
66 0.6 Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp) Single Capacitor with Various Capacitor Connection Inductance Level (volts) ps Rise, 10 mil planes, 400mils 750ps Rise, 10 mil planes, (2nH) 400mils 750ps Rise, 10 mil planes, (1nH) 400mils Time (ns) October 2007 Dr. Bruce Archambeault 66
67 2 Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp) Single Capacitor with Various Capacitor Connection Inductance ps Rise, 10 mil planes, 400mils 750ps Rise, 10 mil planes, (2nH) 400mils 750ps Rise, 35 mil 400mils 750ps Rise, 35 mil planes,(2nh) 400mils Level (volts) Time (ns) October 2007 Dr. Bruce Archambeault 67
68 Maximum Time Domain Noise Voltage Across Simulated IC Power/GND Pin Single Capacitor at Various Distances (Fullwave Simulation) Voltage (volts) ps Rise, 10 mil planes,1uf, 2 nh 750 ps Rise, 10 mil planes,1uf, 1 nh 750 ps Rise, 10 mil planes,1uf, 0.5 nh 750 ps Rise, 10 mil planes,1uf, No L Distance (mils) October 2007 Dr. Bruce Archambeault 68
69 Maximum Time Domain Noise Voltage Across Simulated IC Power/GND Pin Single Capacitor at Various Distances (Fullwave Simulation) Voltage (volts) ns Rise, 10 mil planes,1uf, 2 nh 1 ns Rise, 10 mil planes,1uf, 1 nh 1 ns Rise, 10 mil planes,1uf, 0.5 nh 1 ns Rise, 10 mil planes,1uf, No L Distance (mils) October 2007 Dr. Bruce Archambeault 69
70 1.8 Maximum Time Domain Noise Voltage Across Simulated IC Power/GND Pin Single Capacitor at Various Distances (Fullwave Simulation) Voltage (volts) ps Rise, 35 mil planes,1uf, 2 nh 750 ps Rise, 35 mil planes,1uf, 1 nh 750 ps Rise, 35 mil planes,1uf, 0.5 nh 750 ps Rise, 35 mil planes,1uf, No L Distance (mils) October 2007 Dr. Bruce Archambeault 70
71 Maximum Time Domain Noise Voltage Across Simulated IC Power/GND Pin Single Capacitor at Various Distances (Fullwave Simulation) Voltage (volts) ns Rise, 35 mil planes,1uf, 2 nh 1 ns Rise, 35 mil planes,1uf, No L 1 ns Rise, 35 mil planes,1uf, 0.5 nh 1 ns Rise, 35 mil planes,1uf, 1 nh Distance (mils) October 2007 Dr. Bruce Archambeault 71
72 Maximum Voltage vs Distance to Capacitor for 1 ns Rise/fall time 0.01 uf Capacitor with 0.5 nh ESL and 30 mohm ESR 1.4 Maximum Voltage at source (volts) mil FR4 10 mil FR4 2 mil FR4 1 mil FR4 0.5 mil FR Distance From Capacitor (mils) October 2007 Dr. Bruce Archambeault 72
73 So Far Frequency domain simulations not optimum for charge delivery decoupling calculations (phase not considered) Time domain simulations using single pulse of current indicate limited capacitor location effect Connection inductance of capacitor much higher than inductance between planes Charge delivered only from the planes October 2007 Dr. Bruce Archambeault 73
74 Charge Depletion IC draws charge from planes Capacitors will re-charge planes Location does matter! October 2007 Dr. Bruce Archambeault 74
75 Model for Plane Recharge Investigations ε r = 4.5 b = 10 Port2 (4,5) Port3 (4,4.95) Cdec (4.05,5) Port1 (8,7) d = 35 mil a = 12 Vdc I input Decoupling Capacitor : C = 1uF ESR = 30mOhm ESL = 0.5nH DC voltage used to charge the power plane Port 2 represents IC current draw October 2007 Dr. Bruce Archambeault 75
76 Charge Between Planes vs.. Charge Drawn by IC Board total charge : C*V = 3.5nF*3.3V = 11nC Pulse charge 5A peak : I*dt/2 = (1ns*5A)/2=2.5nC October 2007 Dr. Bruce Archambeault 76
77 Triangular pulses (5 Amps Peak) October 2007 Dr. Bruce Archambeault 77
78 Noise Voltage from Inductive Effect of Current Draw (a) (b) Current pulses too small to see charge depletion effects in this time scale October 2007 Dr. Bruce Archambeault 78
79 Charge Depletion Voltage Drop V plane [V] L s = 1nH L s = 10 nh L s = 50 nh Time [ns] October 2007 Dr. Bruce Archambeault 79
80 Charge Depletion vs. Capacitor Distance October 2007 Dr. Bruce Archambeault 80
81 Charge Depletion for 400 mils for Various Connection Inductance October 2007 Dr. Bruce Archambeault 81
82 Effect of Multiple Capacitors While Keeping Total Capacitance Constant The decap locations are 800mils, 1200mils, 2700mils from the power pin (power-ground pins at IC center) C=1uF ESL=0.5nH ESR=1Ω Decap Port1 (8,7) (Ls 50nH) 10 1 inch Ground pin Port2 (4,5) (power pin) εr =4.5 October 2007 Dr. Bruce Archambeault 82 12
83 Effect of Multiple Capacitors While Keeping Total Capacitance Constant The decap locations are 800mils, 1200mils, 2700mils from the power pin (power-ground pins at IC center) C=0.5uF ESL=0.5nH ESR=1Ω Decap Port1 (8,7) (Ls 50nH) 10 1 inch Ground pin Port2 (4,5) (power pin) εr =4.5 October 2007 Dr. Bruce Archambeault 83 12
84 Effect of Multiple Capacitors While Keeping Total Capacitance Constant The decap locations are 800mils, 1200mils, 2700mils from the power pin (power-ground pins at IC center) C=0.25uF ESL=0.5nH ESR=1Ω Decap Port1 (8,7) (Ls 50nH) 10 1 inch Ground pin Port2 (4,5) (power pin) εr =4.5 October 2007 Dr. Bruce Archambeault 84 12
85 Constant Capacitance 800 mil Distance October 2007 Dr. Bruce Archambeault 85
86 Constant Capacitance 800 mil Distance October 2007 Dr. Bruce Archambeault 86
87 Constant Capacitance 1200 mil Distance October 2007 Dr. Bruce Archambeault 87
88 Constant Capacitance 1200 mil Distance October 2007 Dr. Bruce Archambeault 88
89 Constant Capacitance 2700 mil Distance October 2007 Dr. Bruce Archambeault 89
90 Constant Capacitance 2700 mil Distance October 2007 Dr. Bruce Archambeault 90
91 Example #1 Low Cap Connection Inductance IC Cap PWR GND PCB October 2007 Dr. Bruce Archambeault 91
92 Example #2 High Cap Connection Inductance IC Cap PWR GND PCB October 2007 Dr. Bruce Archambeault 92
93 Example #1 Hi Cap Connection Inductance IC Cap PCB PWR GND October 2007 Dr. Bruce Archambeault 93
94 Example #1 Lower Cap Connection Inductance IC PCB PWR GND Cap October 2007 Dr. Bruce Archambeault 94
95 Mutual Inductance Helps Reduce Path Inductance Do s Don ts J. L Knighten, B. Archambeault, J. Fan, et. al., PDN Design Strategies: II. Ceramic SMT Decoupling Capacitors Does Location Matter?, IEEE EMC Society Newsletter, Issue No. 207, Winter 2006, pp October 2007 Dr. Bruce Archambeault 95
96 Effect of Capacitor Value?? Need enough charge to supply need Depends on connection inductance Charge = C*V October 2007 Dr. Bruce Archambeault 96
97 0.6 Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp) Single Capacitor (with No L) with Various Capacitor Values ps Rise, 10 mil planes, (0.0 nh) 400mils 750ps Rise, 10 mil 400mils 750ps Rise, 10 mil planes, 400mils Level (volts) Time (ns) October 2007 Dr. Bruce Archambeault 97
98 0.6 Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp) Single Capacitor (with 0.5 nh Connection L) with Various Capacitor Values ps Rise, 10 mil planes, (0.5nH) 400mils 750ps Rise, 10 mil planes, (0.5nH) mils 750ps Rise, 10 mil planes, (0.5nH) mils Level (volts) Time (ns) October 2007 Dr. Bruce Archambeault 98
99 0.6 Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp) Single Capacitor (with 1 nh Connection L) with Various Capacitor Values ps Rise, 10 mil planes, (1nH) 400mils 750ps Rise, 10 mil planes, (1nH) 400mils 750ps Rise, 10 mil planes, (1nH) 400mils 750ps Rise, 10 mil planes, (1nH) 400mils Level (volts) Time (ns) October 2007 Dr. Bruce Archambeault 99
100 Noise Voltage is INDEPENDENT of Amount of Capacitance! Dist=400 mils ESR=30mOhms ESL=0.5nH As long as there is enough charge October 2007 Dr. Bruce Archambeault 100
101 Decoupling Summary (1) EMC Frequency Domain analysis Steady-state conditions resonances Transfer function across the board Measurements and simulations agree well Distance of capacitors from ASIC load does not change steady-state impedance October 2007 Dr. Bruce Archambeault 101
102 Decoupling Summary (2) Charge Delivery Time-Limited analysis Using equivalent SPICE circuit from simulations Current from capacitors change significantly as capacitor moves further away from ASIC Noise at ASIC pins increase significantly as capacitor moves further away from ASIC Steady-state frequency domain analysis not sufficient for charge delivery design of decoupling capacitors October 2007 Dr. Bruce Archambeault 102
103 Decoupling Summary (3) Recharge the planes Location of Capacitor does matter! Effect more significant for thick dielectrics Connection Inductance is important Value of capacitance not important More capacitors is better than larger/fewer capacitors October 2007 Dr. Bruce Archambeault 103
104 IEEE October 2007 Dr. Bruce Archambeault 104
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