Current-Mode Vs. Voltage-Mode Control In Synchronous Buck Converters by Brian Lynch, Texas Instruments Incorporated For the past twenty years, feedback current-mode control (CMC) has been the method of choice for many high-performance power supply applications. But is it the optimum choice for all power supplies? Here we discuss the pros and cons of CMC Vs. voltagemode control (VMC) as applied to general purpose dc-dc synchronous buck converters. The choice of whether to implement CMC or VMC as the feedback control method in a synchronous buck dc-dc converter is based on a number of considerations. While the perceived advantage of CMC is better feedback loop response, today s high-frequency VMC controlled converters closely rival their CMC counterparts. Fig. 1 illustrates the difference in feedback loop performance for a 3.3-V to 1.8-V dc-dc converter with a 1-A output using CMC and VMC and operating at 6 khz. Since the conversion ratio is above 5% duty cycle, a small amount of slope compensation is added to the CMC loop. In textbook fashion the CMC control-to-output gain is higher at low frequencies and has a zero gain crossover frequency much higher than the VMC counterpart has. Gain (db) 25 2 15 1 5-5 -1-15 -2 18 9 - -9-25 -18 1 1 1 1 1 CMC Gain VMC Gain CMC Phase VMC Phase Fig. 1: CMC And VMC Control-To-Output Loop Gain/Phase The difference can be narrowed (see Fig. 2) by using Type 3 compensation around the VMC error amplifier when the overall loop performance matches that of a CMC system, albeit at the expense of requiring a higher-bandwidth amplifier.
Gain (db) 8 7 6 5 4 3 2 1-1 18 9 - -9-2 -18 1 1 1 1 1 VMC Gain CMC Gain VMC Phase CMC Phase Fig. 2: CMC And VMC Closed-Loop Gain/Phase Notice that near the L-C pole frequency the CMC closed-loop phase response is more smooth than the closed-loop phase response of the VMC system, due to L-C resonance combined with the HF pole-then-zero of the Type 3 compensation (see Fig. 3.) Ringing in the output voltage during load transients will be less damped than with the CMC system. Gain (db) 8 7 6 5 4 3 2 1-1 18 9 - -9-2 1 1 1 1 1-18 VMC E/A Gain CMC E/A Gain VMC E/A Phase CMC E/A Phase Fig. 3 Error-Amplifier Gain And Phase
Converters with a wide input-voltage range must compensate for open-loop gain variation by selecting compensation components either for worst-case (high-input voltage) or by including a gain-compensating circuit. With VMC, since converter gain is dependent on the input voltage and the PWM ramp amplitude, input-voltage feed-forward is used. Conversely, peak CMC directly provides input-voltage gain compensation by the change in inductor slope during the switch ON time. While in practice this compensation is not as effective as pure voltage feed-forward, it is nonetheless free in CMC. From a signal path standpoint in VMC, a load current change must first have an effect on the output voltage before the voltage amplifier can react and make a correction. CMC on the other hand senses a change in load current directly so the voltage amplifier does not need to react in order for the loop to make a correction. This cause-and-then-react approach makes VMC slower to respond than CMC with very high-speed load transients. One key differentiator in applying either of the two control methods is current sensing. CMC requires accurate current sensing for control loop stability, and relatively large voltage levels are required to ensure that a good SNR is maintained at light loads. This voltage level with the load current at full load can result in significant power loss. To reduce the power loss, a smaller sense element may be used. However, to increase the sensed signal to a useable level requires a high bandwidth current-sense amplifier. In most applications, a small amount of slope compensation is also required to ensure loop stability. Generally this is accomplished by summing in a small amount of signal from an oscillator ramp into the measured current signal. Output voltage regulation is independent of current with VMC, so relatively crude current sensing may be acceptable since it is only necessary for output overload protection. This can save considerable circuit complexity and reduce circuit power loss. A B SW1 Lout Vin Cin SW2 D Cout E ILoad C Fig. 4: Alternate Points To Measure Current - With Different Tradeoffs In location A (see Fig. 4), average input current is monitored. While this is useful for controlling inrush current, it is not a very useful place for current mode control. When
used for current limit protection, input power is limited instead of output fault current and therefore this method implements a power limiting approach to fault protection. To keep the power limiting constant with input-voltage variation, additional circuitry is required to reduce the limiting threshold level with increasing input voltage. Location B, in series with the upper MOSFET switch (or it may be the RdsON of the switch itself while the MOSFET is ON) is a popular location for current sensing when peak current mode control is implemented. Since slope information is available, ac feedback information is available for the control loop. A drawback at narrow pulse widths (due to high input-to-output conversion ratios or high operating frequency) is that the amount of useable slope information can become virtually non-existent due to circuit ringing and blanking time intervals. The ON impedance of a MOSFET can be used as a sense element with no penalty in power loss or circuit cost; however component variance, RdsON temperature coefficient and the ringing seen at the switch node can all affect feedback loop performance. If this approach is used, then slope compensation must be added for duty cycles of greater than 5%. Current measured at Location C is also peak current, but it is the peak current measured during the OFF time of the upper switch instead of the ON time as is the case in B. In this way CMC applies the same OFF time current information to the feedback loop so long as leading edge PWM is the control technique, instead of the more commonly used trailing edge PWM when slope compensation must be added for duty cycles of less than 5% Current measured in location D is the output current directly and is therefore the most attractive from a feedback standpoint. Here average dc output current as well as ac slope information is available and so any change in the output load current is quickly translated into a feedback response. Unfortunately, since the current is mostly dc at this point, current sensing at this location is also more dissipative than at the first three. A low value resistor may be used as a sense element at the expense of low current noise immunity, or the dc resistance of the inductor may be used, at the expense of additional filtering. Location E carries dc load current information and cannot be used for CMC, but it can be used for applications requiring a slow current sharing loop. There is a similar power loss issue as in D. However, since no high frequency control information is required, then filtering may be applied and light load SNR is not an issue. For general purpose single output dc-dc converters, the overall advantage goes with VMC. The feedback network, even with a Type 3 compensation network around the voltage-error amplifier, is relatively simple to compensate. In many ways it is simpler than compensating a current loop, plus a voltage loop, plus adding slope compensation. This, along with the improved noise immunity at light loads, makes VMC attractive from a circuit performance standpoint. From a customer point of view, having features such as slope compensation or input voltage feed-forward internally added by an IC vendor is both a plus and a minus. On the plus side the customer does not have to add any components. On the minus side whatever
manner the IC vendor chooses to implement the feature is the manner the customer is stuck with. Perhaps for a specific approach the manner is acceptable, but what of the corners of operation where the customer has to work around the built-in feature? A good parallel to this is internal feedback compensation Vs. external compensation. In some cases, it can reduce component count; however, it also severely limits the selection of the operating frequency, the filter inductor, and the output capacitors. The best compromise is to have a feature included in the IC with the means for a customer to adjust its effect. From an implementation standpoint the current sensing requirements of CMC require higher accuracy than those of VMC, so higher power loss or circuit complexity is likely. For most general purpose applications, where only basic current overload protection is required, low-value/low-cost sensing elements are used without worrying about noise sensitivity at light loads. If tight tolerance in overload protection is a requirement, then either VMC or CMC can be designed to meet that need equally. About the author Brian Lynch is systems team leader, Dc-Dc Control Products, for Texas Instruments. brian_lynch@ti.com