Accurate Point-of-Load Voltage Regulation Using Simple Adaptive Loop Feedback

Transcription

1 APPLCATON NOTE AN:04 Accurate Point-of-Load oltage egulation Using imple Adaptive Loop eedback Maurizio alato Principal Engineer August 009 Contents Page ntroduction ntroduction 1 Adaptive Loop egulation Concept 1 PM-AL Block Diagram DC et Point Calculation 4 Considerations 8 Accurate point-of-load (POL) voltage control is essential for highly dynamic electronic loads. Adaptive loop is a technique for efficient, feed-forward compensation of isolated power management systems based on PM egulator and TM oltage Transformer combinations. This application note describes the design methodology for optimal DC set point compensation of PM and TM combinations[a], including small arrays of two identical TMs driven by one PM. or your reference, an Adaptive Loop Calculator is available at: Adaptive Loop egulation Concept Adaptive loop is a model-based, positive-feedback compensation technique that can easily complement negative feedback, voltage mode regulation. igure 1 shows the conceptual block diagram. Adaptive Loop with Half-Chip TMs 9 PM output voltage solation barrier Design Example with Chip Customer Boards 13 oltage loop Conclusion 17 Appendix A 18 nput power line PM actorized bus K TM Output power line LOAD igure 1 Adaptive loop oltage drop model PM output current TM temperature Adaptive loop regulation conceptual diagram While the local voltage feedback loop maintains regulation at the PM output, the adaptive loop (AL) provides compensation for the voltage drops that occur from the PM output to the actual load. As stated before, AL is based on a model that requires TM temperature and factorized bus current as inputs. The resistive behavior of power lines (factorized bus and output line) as well as the TM, enables accurate modeling of their voltage drops. Note: The calculations represented in this application note apply to 4, 36 and 48 input PMs. Though the same methodology applies to 8 input ML-COT PMs, care should be taken to apply the correct values. or further assistance, please contact a ield Applications Engineer via your local Technical upport Center. AN:04 vicorpower.com Applications Engineering: Page 1

2 Major benefits of this approach are: No signals need to be transmitted across TM s isolation barrier impler circuit, lower component count egulation accuracy is affected by the accuracy of this model; this application note explains how to optimize the model for a given system, and how to estimate the obtained accuracy. tandard regulation techniques are based on direct observation and integral error compensation of POL voltage, and the steady state error (compared to the reference) is therefore forced to be zero. AL only asymptotically approaches the zero error state, therefore widening the total distribution of the POL voltage. PM-AL Block Diagram igure shows the functional block diagram for a full-chip PM-AL regulator (e.g. P045048T3AL). The and C pins provide for local voltage feedback loop setting, while the and pins provide for settings and connections of the downstream system model. igure PM-AL functional block diagram N OUT 5 µ M1 D1 5 µ kω M M3 PC Enable Modulator Type compensation - G G oft start and reference kω C18 0. µ E 1.4 C P Error amplifier L 100 µa 100 kω AL -OUT / - H 9, 5 ma max nst. curr. protection 10 ms 14 start pulse generator Q6 Average current protection G -N 10 mω Adaptive loop -OUT n summary: Local oltage eedback Loop: E, through 18, provides a reference voltage source on the C pin. This is routed to the non-inverting input of the error amplifier, through the gain stage G1. The factorized bus (OUT) voltage is fed back to the inverting input of the error amplifier through 16. C and provide for the connection of the external resistor dividers. AN:04 vicorpower.com Applications Engineering: Page

3 Adaptive Loop Circuit: The voltage controlled current source has variable gain, controlled by the resistance connected between and signal ground (G) pins. The current injected on the line by the variable gain transconductance amplifier is: directly proportional to the voltage across the sense resistor inversely proportional to the resistor connected between and G according to the following relationship: Equation 1 AL -OUT where is the factorized bus (PM output) current and -OUT is the voltage drop across. The pin voltage is added to the reference pin voltage C through the gain stage G. A PM and TM system is considered, as shown in the block diagram in igure 3. The system PCB adds further voltage drops from the PM output to the load: the factorized bus resistance,, and the output line resistance, O, which are assumed to be constant and equally divided on the positive and negative trace / wire. n order to account for them, these resistances must be estimated or measured. igure 3 actorized Power Architecture (PA ) system with adaptive loop control block diagram N 5 µ 5 µ kω OUT 1 / N TM OUT O / OUT Modulator Type compensation Error amplifier - PM G G kω 1.4 ref 0. µ C18 C C PNL / OUT K LOAD AL * / G AL -N 10 mω -OUT / AL -N PTC -OUT O / t is important to correctly identify the total voltage drop parameters, which are, OUT and O in this specific case. Their compensation model must therefore be resistive, and temperature dependent. uch a model is easy to implement, thanks to: The PTC resistor embedded in the TM module, which will change its value according to the TM temperature. resistor, which allows precise match of PTC to TM OUT temperature characteristic. AN:04 vicorpower.com Applications Engineering: Page 3

4 The parallel of and PTC resistors, in series with / and resistors constitutes the voltage drop model. The AL circuitry forces a scaled version of the PM output current ( AL ) in the line, which then merges with the factorized bus current on its return path (as shown in igure 4). igure 4 oltage drop model for the considered system Modeled voltage drop AL / caled PM output current TM temperature 10 mω -OUT / AL -N PTC The voltage obtained on the pin, with some scale factor, is the model of the total voltage drop in the system. DC et Point Calculation The necessary inputs to the procedure are shown in Table 1. Table 1 Adaptive loop calculation procedure inputs tandard ull-chip Characteristics OUT_5 ( OUT_AMB in datasheet): 5 C output resistance OUT_100 ( OUT_HOT in datasheet): 100 C output resistance K: transformer ratio -NT : TM pin internal resistance T _COE : internal resistor temperature coefficient P NL : no load power dissipation at nominal input voltage Power ystem Characteristics _NOM : nominal factorized bus voltage at no load OUT : maximum system (TM) output current : factorized bus (PM to TM) total resistance O : output bus (TM to point load) total resistance AN:04 vicorpower.com Applications Engineering: Page 4

5 The inputs listed in Table 1 can be found in each individual TM s datasheet; see the Adaptive Loop Calculator tool for more information: With reference to igure 3: A. Calculate the maximum voltage drop (at 5ºC and 100ºC) due to TM output resistance OUT. Equation ΔOUT _ 5 OUT _ 5 OUT Equation 3 ΔOUT _ 100 OUT _ 100 OUT B. Calculate the maximum current flowing on the factorized bus. Equation 4 K OUT P NL _ NOM Although the no load power (P NL ) required by the TM is input voltage dependent, the variation has only a minor influence on the AL compensation, and will therefore be neglected in the following steps. C. Calculate the total PM output voltage increase that will compensate all the drops (factorized bus resistance, TM output resistance and output bus resistance). Equation 5 Equation 6 Δ OUT _ 5 O OUT Δ _ 5 ( ) Δ K OUT _100 O OUT Δ _100 ( ) K AN:04 vicorpower.com Applications Engineering: Page 5

6 D. Calculate the total temperature coefficient of the power circuit and the resistor needed to match it. The PTC resistor and the TM OUT resistance are subject to the same temperature, but they have different rates of change, as shown in igure 5. igure 5 OUT and PTC vs. TM internal temperature OUT OUT_100 PTC PTC_100 OUT_5 PTC_ T TM [ºC] n order for the model to precisely match the voltage drop over temperature, its slope must match the system slope. The resistor in parallel to PTC can be calculated in order to meet this condition. Equation 7 Δ TOT Δ Δ _ 100 _ 5 PTC _ 100 PTC _ 100 PTC _ 5 PTC _ 5 (1 Δ TOT ) Δ TOT PTC _ 5 PTC _ 5 PTC _ 100 PTC _100 There is an important reason for choosing a parallel rather than a series resistor to match the system temperature coefficient. At start-up, the PM issues a 14, 10ms pulse on the line to synchronously start the TM. A series resistor would cause significant amplitude change on this signal, avoided by the parallel arrangement. However, the designer should exercise judgment and avoid extreme cases, where the temperature dependency might be so low as to cause the value to fall below 00Ω (which would cause overload during the 14, 10ms startup pulse). E. Calculate the maximum pin voltage for the given system at 5ºC (100ºC should provide the same value, given the temperature dependency has been taken care of through, [7]): C _ MAX _ 5 PTC _ 5 AL ( AL) PTC _ 5 Equation 8 PTC _ 5 ( ) _ MN PTC _ 5 _ MN AN:04 vicorpower.com Applications Engineering: Page 6

7 Minimum allowable value for current products is 0Ω.. Calculate the needed (if any) C trim that allows enough AL dynamic range under the worst case: C_MAX_5 andδ _100 (this will allow enough design margin). The voltage on, through the gain stage G, is summed to the reference voltage C in order to compensate for the voltage drop. Because the voltage dynamic range is set, C might be reduced in order to match the relative changes of factorized bus and adaptive loop compensation. Equation 9 Δ _ 100 _ NOM G G C _ MAX _ 5 1 C C G Δ G1 C _ MAX _ 5 _100 _ NOM G 1 and G gains are and respectively. f C ref 1.4, the external resistor to be connected on C will be easily calculated as following: Equation 10 C 18 ref C C The absolute minimum value for C is 0.5, because of the characteristic of the internal error amplifier. The minimum resistance value for C is therefore 550Ω. G. Calculate the voltage feedback divider resistor needed to set the nominal output voltage. Equation 11 _ NOM 16 G1 C G 1 16 _ NOM C G 1 C defines the gain on the voltage feedback, which accommodates for the chosen reference voltage C. t is recommended to calculate its value using the C voltage obtained with a standardized value resistor as C. Moreover, if a standard value resistor is not available to match (within 0.%) the calculated value, it is strongly recommended to use a parallel configuration. H. Calculate the resistor that allows AL to compensate for the drops (5ºC or 100ºC will give the same result, because of ). AN:04 vicorpower.com Applications Engineering: Page 7

8 irst, substitute the line voltage at full current (room temperature): Equation 1 C _ 5 PTC _ 5 PTC _ 5 into the expression for the related factorized bus increase: Δ 16 _ 5 G _ 5 PTC _ 5 16 G PTC _ 5 Then solve for : Equation 13 G 16 Δ _ 5 16 G PTC _ 5 PTC _ 5 Considerations n order to improve regulation accuracy, the following guidelines should be followed: Discrepancy between the model and the system will directly affect regulation accuracy. ystem characterization is strongly recommended during the design phase, specifically factorized bus ( ) and output line ( O ) resistances. tatistical distribution of components values plays also a key role on accuracy distribution. To this end, Monte Carlo (or similar) analysis and optimization is strongly encouraged. t should include all the components directly affecting regulation, i.e. setting resistors, model resistors and component characteristics. Any extra component designed in the system, i.e. filter inductors, connectors, etc., should also be included if affected by variability. While the impact of and on voltage may be neglected in a few cases, it normally affects accuracy distribution. n order to evaluate it, both resistors should be included in the analysis. AN:04 vicorpower.com Applications Engineering: Page 8

9 Adaptive Loop with Half-Chip TMs The major difference between full and half-chip TMs is the absence of temperature feedback. While the full-chip TMs implement a PTC resistor, the half-chip modules use a simple precision resistor, as shown in igure 6. igure 6 Adaptive loop regulation concept without temperature feedback PM output voltage oltage loop solation barrier nput power line PM actorized bus K TM Output power line LOAD Adaptive loop oltage drop model PM output current TM resistor D The absence of temperature feedback slightly degrades the regulation accuracy; however, the half-chip units have tighter parameter distributions, which partially compensate for the reduced model accuracy. The control configuration in this case is shown in igure 7. igure 7 Adaptive loop control with half-chip TM N 5 µ 5 µ Type compensation Modulator - Error amplifier PM G OUT kω 1 G C C kω 0. µ 1.4 C18 ref / N Half- Chip TM P NL / OUT K OUT O / OUT LOAD AL * / G AL -N 10 mω -OUT / AL -N -OUT O / The voltage drop model also differs with the one for the full-chip version (igure 3), resulting in the simpler one shown in igure 8. AN:04 vicorpower.com Applications Engineering: Page 9

10 igure 8 oltage drop model in systems with half-chip TMs Modeled voltage drop AL / caled PM output current 10 mω -OUT / AL -N Having explained the differences, it is now possible to revise the design procedure in this specific case. Table shows the necessary inputs. Table Adaptive loop calculation procedure inputs for half-chip TMs tandard ull-chip Characteristics OUT_5 ( OUT_AMB in datasheet): 5 C output resistance OUT_100 ( OUT_HOT in datasheet): 100 C output resistance K: transformer ratio ( -NT in datasheet): TM pin internal resistance P NL : no load power dissipation at nominal input voltage Power ystem Characteristics _NOM : nominal factorized bus voltage at no load OUT : maximum system (TM) output current : factorized bus (PM to TM) total resistance O : output bus (TM to point load) total resistance The inputs listed in Table can be found in each individual TM s datasheet; see the Adaptive Loop Calculator tool for more information: AN:04 vicorpower.com Applications Engineering: Page 10

11 or sake of clarity, only the steps that differ from the procedure already explained for the full-chip TMs are reported. tep(s): A., B., C.: unchanged D. Calculate the total temperature coefficient of the power circuit at the estimated TM working temperature. The TM OUT resistance is temperature dependent, as shown in igure 9. igure 9 Half-chip TM OUT vs. module internal temperature OUT OUT_100 OUT_ T TM [ºC] n order for the model to match the system voltage drop better, the TM operating temperature should be estimated. n cases where temperature is unknown, a conservative approach would be to assume the module will operate at half of its temperature range, for example 75ºC: Equation 14 Δ _ 75 Δ _ 5 Δ _ 100 Δ 75 _ 5 50 Linear interpolation used in [14] is acceptable in this case, as OUT temperature dependency is linear. E. Calculate the maximum pin voltage for the given system. Equation 15 C _ MAX AL ( AL) ( ) _ MN _ MN., G.: unchanged AN:04 vicorpower.com Applications Engineering: Page 11

12 AN:04 vicorpower.com Applications Engineering: Page 1 H. Calculate the resistor that allows AL to compensate for the drops. irst, substitute the line voltage at full current (ambient temperature): into the expression for the related factorized bus increase: Then solve for : C Δ C G 16 _ 75 G 16 G G Δ 16 _ Equation 16 Equation 17

13 Design Example with Chip Customer Boards ystem requirements: nput: Output: 5, 36A, 180W Chip selection: PM : P048048T4AL (due to the wide range input voltage and the power level). TM : T040 (due to output voltage and current requirements). Corresponding customer boards are P048048T4AL-CB and T040-CB respectively. They come with a connector which routes factorized bus and line, as explained in the User Guide UG:003. igure 10 shows the two selected boards once connected. igure 10 PM and TM customer boards irst, collect the characteristics from the TM s data sheet and from Table : OUT_5 : 5.76mΩ OUT_100 : 6.73mΩ K: 1/8 PTC_5 : 1000Ω PTC_100 : 1000 ( ) 193Ω P NL :.7W AN:04 vicorpower.com Applications Engineering: Page 13

14 econd, calculate or measure the power system characteristics: _NOM : OUT /K 40 OUT : 36A and O : these values are strictly related to the board traces or cables used to route power. A convenient way to obtain these values is to identify the current paths of interest, as shown in igure 11. igure 11 actorized bus current path (long-dash red) and output current path (shortdash blue) Then, a simple DC impedance measurement from terminal to terminal will provide and O values. n this particular case: 10mΩ O 80µΩ t is now possible to apply the proposed procedure. A. Calculate the maximum voltage drop (at 5ºC and 100ºC) due to TM output resistance, OUT. Δ OUT _ 5 OUT _ 5 OUT Δ OUT _ 100 OUT _100 OUT B. Calculate the maximum current flowing on the factorized bus. PNL 1.7 K OUT _ NOM A AN:04 vicorpower.com Applications Engineering: Page 14

15 C. Calculate the total PM output voltage increase that will compensate all the drops (factorized bus resistance, TM output resistance and output bus resistance). ΔOUT _ 5 O OUT μ 36 Δ _ 5 ( ) (10 m 10 m) K 1 8 ΔOUT _100 O OUT μ 36 Δ _ 100 ( ) (10 m 10 m) K 1 8 D. Calculate the total temperature coefficient of the power circuit and the resistor needed to match it. Δ TOT Δ Δ _100 _ PTC _ 5 PTC _ (1 ΔTOT ) ( ) 1513 Ω Δ TOT PTC _ 5 PTC _100 The value is greater than 00Ω, therefore valid. The nearest available 1% resistor value chosen for is 1500Ω. E. Calculate the maximum pin voltage for the given system at 5ºC. rom the PM-AL data sheet, _MN 0Ω: C _ MAX _ 5 PTC _ 5 ( ) _ MN PTC _ 5 _ MN m 10 m ( m ) 10 m Calculate the needed (if any) C trim that allows enough AL dynamic range under the worst case: C_MAX_5 and Δ _100. G _ Δ G1 MAX _ 5 C 1. 1 _ _ NOM As C ref 1.4, C must be installed: C k 93. Ω k 18 C 3 ref C AN:04 vicorpower.com Applications Engineering: Page 15

16 C is greater than 550Ω, therefore acceptable. The closest 1% tolerance value is chosen, C 93.1kΩ, which provides for an obtained C 1.1 G. Calculate the voltage feedback divider resistor needed to set the nominal output voltage. C 1.1 G k 574 Ω G _ NOM 1 C The closest standard value would be 550Ω, which is almost 1% off the target. n order to gain accuracy, the highest standard value is chosen, 610Ω, and a parallel resistor is used in order to closely match the required value: 1 610Ω and 187kΩ H. Calculate resistor that allows AL to compensate for the drops. G 16 Δ _ 5 PTC PTC 16 G _ 5 _ k 574 1k 1.5 k 10 m m m 574 1k 1.5 k 3. 5 Ω 93.1 k m m The nearest standard value is chosen, 3.7Ω. The design is now complete, the calculated resistors: C 93.1kΩ, 1 610Ω, 187kΩ, 1500Ω and 3.7Ω can be implemented in the two customer boards and regulation accuracy verified. AN:04 vicorpower.com Applications Engineering: Page 16

17 Conclusion This procedure highlights the adaptive loop regulation concept and the design procedure to achieve good voltage regulation for a simple PM /TM combination. Monte Carlo analysis shows that 1% regulation accuracy over line, load and temperature can be statistically achieved 8% (or greater) of the time. igure 1 shows accuracy distribution for the design example previously illustrated. igure 1 Accuracy distribution over line, load and temperature for the design example Probability distribution function 100% 80% 60% 40% 0% 100% 80% 60% 40% 0% Cumulative distribution function 0% 0% -4% -3% -% -1% 0% 1% % 3% 4% The same design concepts are directly applicable to arrays of Chips if proper modeling applied. t is recommended to contact Chip Application Engineering for any array involving or more PMs and 3 or more TMs. or your reference, an Adaptive Loop Calculator is available at: AN:04 vicorpower.com Applications Engineering: Page 17

18 Appendix A Changes applicable to ML-COT versions of Chips. ML-COT TM : parameters and modeling of ML-COT TMs are identical to the commercial counterparts with the same K factor. The AL design procedure can be applied directly. ML-COT PM : parameters and modeling of MP08036M1AL are identical to the commercial parts as with the only exception of 16 which changes to 69.8kΩ, as shown in the figure below. N OUT 5 µ M1 D1 5 µ kω M M3 PC Enable Modulator Type compensation - G G oft start and reference kω C18 0. µ E 1.4 C P Error amplifier L 100 µa 100 kω AL -OUT / - H 9, 5 ma max nst. curr. protection 10 ms 14 start pulse generator Q6 Average current protection G -N 10 mω Adaptive loop -OUT or your reference, an Adaptive Loop Calculator for ML-COT products is available at: nformation furnished by icor is believed to be accurate and reliable. However, no responsibility is assumed by icor for its use. icor components are not designed to be used in applications, such as life support systems, wherein a failure or malfunction could result in injury or death. All sales are subject to icor s Terms and Conditions of ale, which are available upon request. pecifications are subject to change without notice. ev /16 vicorpower.com Applications Engineering: Page 18