# Understanding Power Impedance Supply for Optimum Decoupling

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3 as described. This is why the hit and miss nature of power supply decoupling is often misunderstood. It depends more on the choice of capacitor type and construction than on the capacitor value. Proper Power Supply Decoupling The goal in decoupling is to reduce the high frequency impedance of the power supply without turning the power supply into a giant power oscillator. Once the maximum desired impedance at the frequency(s) desired is established from the known system load transients, the power supply can be examined to see if it meets the requirement by itself. Most well designed commercial power supplies will sufficiently provide low output impedance for 99% of all applications. However, if your supply/load combination needs improvement, the following design steps can be taken to improve the output impedance of the power supply: 1. Determine the power supply s output impedance curve. 2. Determine the maximum desired output impedance over the range of frequencies that your load will be exhibiting. 3. Determine which network in Figure 6 will give the desired output impedance. 4. Determine the component values for the damping network. 5. fter the addition of the damping network, the output impedance should be verified to see if any resonant peaks are present. Figure 6B. This circuit can be used for the lowest high frequency output impedance. minimum, F should be chosen to be anywhere from 0.1 to 0.7 of the no R d crossing frequency. To have the resulting circuit be critically damped or better, the break frequency should be less than 0.4. The circuit in Figure 6B is an extension of 6. With the single RC circuit it may not be possible to realize the desired output impedance with real world components because of size or ESR limitations. The double circuit allows the power supply output impedance to be flattened at a low frequency by C1/R d 1, and C2/R d 2 can be chosen to be higher quality components that reduce the high frequency power supply impedance. If any impedance in the circuit is less than a factor of 10 to the damping elements (RHF, for example), the two elements will interact as a parallel equivalent. This can throw the above damping equations off. The load also acts as a damping element and usually further damps the power supply. Figure 6. Proper decoupling networks to be used to reduce the power supply s peak output impedance without introducing oscillation. This shows the single network. In Figure 6, a single capacitor / resistor has been added to the power supply output. The R d might actually need to be added to the capacitor or it might be the capacitor s own ESR. This network is designed to provide a high frequency impedance of R d to the load. The value for C is chosen as: 1 C = (2) 2 x π x F x R d The break frequency F needs to be chosen somewhere below the intersection of the capacitor impedance and the output impedance of the power supply. To keep peaking to a Figure 7. Proper Low Q damping network design. The 220 µf capacitors impedance is equal to 1 ohm at 0.4 times the crossing frequency. 3 4/2001, eco#

4 Putting Theory Into Practice The following examples will clarify the design process: Example 1: It is desired to reduce our example power supply s output impedance for frequencies above 1000 Hz to below 1 ohm. Begin by plotting the power supply output impedance on reactance paper (Figure 7). dd the desired 1 ohm horizontal line to the graph. The crossing frequency is at 1700 Hz. break frequency of 0.4 or 700 Hz is chosen. standard capacitor that has a break frequency of 700 Hz with 1 ohm is 220 µf. The damping network is now fully designed without even using a calculator! The resulting circuit and transient response is shown in Figures 8 and 9. The restriction on the chosen capacitor is that its ESR adds to the damping resistance. readily available 220 µf aluminium electrolytic capacitor with an ESR of 0.2 ohms was chosen. This made the actual circuit value for Rd a 0.8 ohm film or composition type (not wirewound). Example 2: If the single section damping network results in unrealistic capacitor and/or ESR values to keep impedance within the desired design goals, the circuit from Figure 6B can be used. If we decide that the impedance should be as low as possible for frequencies from 10 khz on up, 1 ohm starts to look pretty big. second damping network can solve this problem, though. The design of the second damping network is similar to the first. The second damping capacitor s reactance should equal 1 ohm at a minimum of 2.5 times (1/0.4) the original crossing frequency. t 4250 Hz a 33 µf capacitor has a reactance of 1.1 ohms. The second capacitor is usually chosen to be a tantalum or ceramic type because of the typically lower ESR and ESL of these types. The damping resistor for C2 is then just the ESR of the chosen capacitor. readily available 33 µf tantalum with an ESR of 0.2 ohms was chosen. The resulting circuit is shown in Figure 10. Figure 10. High frequency damping added to the circuit of Figure 8. Figure 8. The final damping network designed directly from Figure 7. Date/Time run: 09/27/90 17:24: V 4.95V 4.90V 4.85V Temperature: 27.0, V 0.0ms 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms V(3) Time Figure 9. This is the transient response of the circuit from Figure 8 superimposed on the original (Figure 3) circuit s response. Compare this response with Figure 4 (note that the Y axis scale factor is different from Figure 4). It is important that the ESL of C1 is small enough at 4250 Hz so that C1 s impedance is controlled by R d 1 and not its ESL, or a secondary LC tank circuit will be formed. With high quality impedance specified capacitors, however, this usually isn t a problem. The conclusion from these examples is that, while the peak overshoot can be substantially reduced with damping, the settling time to a 1 or 0.1% error band increases with damping. This is generally not as big a problem as peak values of overshoot, however. Large peak overshoots can cause false triggering of flip-flops and glitches in digital systems and can ring through the power supply rails of linear circuits. The settling time to 5 or 10% is nonexistent in the decoupled examples because the output never exceeds the error band. Conclusion Several simple calculator-less design criteria have been developed for the proper decoupling of power supplies. The techniques developed work for any power supply that can be characterized as having a non-constant output impedance vs. frequency. The next time a fellow engineer adds a capacitor to a three terminal regulator or a kilowatt switcher you can look wise and all knowing by pointing out the error of his ways. Likewise expect several questions by your colleges on why you are ruining your capacitors by putting resistors in series with them. Then enlighten them! 4 4/2001, eco#

6 Determining Power Supply Output Impedance Power supply output impedance can be easily measured with the circuit shown in Figure B1. function generator is used to introduce a small C current into the output of the power supply. This current produces a voltage at the power supply output which is directly proportional to the output impedance at that frequency. By varying the frequency of the function generator in a sequence over a range of 10 Hz to 1 MHz, an accurate plot of output impedance vs. frequency is made. To be sure of worst case effects, the plot should be repeated at the following extremes: Highest and lowest input line voltages Highest and lowest expected loads Highest and lowest expected operating temperature, at the two worst case combinations above. By plotting the output impedance onto reactance paper, a linear equivalent circuit of the power supply can be made. The values for RDC, RHF and L can be read directly from the graph. Figure B1. Small Signal Output Impedance Test Circuit. Scale the 300 ohm Resistor as required so that 300 ohms >>RDC. frequency sweep of 10 Hz to 1 MHz is easily obtained with most common lab function generators. 6 4/2001, eco#

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