COMPUTER ARCHITECTURE AND ORGANIZATION IN THE MODEL COMPUTER ENGINEERING CURRICULUM

COMPUTER ARCHITECTURE AND ORGANIZATION IN THE MODEL COMPUTER ENGINEERING CURRICULUM Victor P. Nelson 1, Mitchell D. Theys 2, and Alan Clements 3 Abstract - In 1998, the Computer Society of the Institute for Electrical and Electronic Engineers and the Association for Computing Machinery established the Joint Task Force on Computing Curricula 2001 (CC2001) to undertake a major review of curriculum guidelines for undergraduate programs in computing. A separate task force was created to focus specifically on Computer Engineering (CPE) and develop a separate CPE volume for the CC2001 report. Computer engineering focuses on the design of computer components and computer-based systems, integrating hardware and software to produce systems that solve realworld problems. With this in mind, the CPE volume includes an outline of the body of knowledge appropriate for undergraduate study in CPE. This paper discusses the Computer Architecture and Organization (CAO) body of knowledge defined in the CPE volume, including a discussion of which CAO topics were selected as "core", i.e. to be included in every CPE program, vs. "elective", to be included or excluded according to individual program objectives. THE COMPUTING CURRICULUM - COMPUTER ENGINEERING (CCCE) REPORT In the fall of 1998, the Computer Society of the Institute for Electrical and Electronic Engineers (IEEE-CS) and the Association for Computing Machinery (ACM) established the Joint Task Force on Computing Curricula 2001 (CC2001) to undertake a major review of curriculum guidelines for undergraduate programs in computing, that will match the latest developments of computing technologies in the past decade and last through the next decade [1]. Whereas "Computing Curriculum 1991" [2] and other previous efforts of the IEEE-CS and ACM did not distinguish computer science and computer engineering programs, for CC2001 the Computing Curriculum - Computer Engineering (CCCE) Task Force was established in 2001 to develop a separate volume of the CC2001 report, focused on computer engineering curricula. The result of the work of the CCCE Task Force has been summarized in a draft report available for review on the web [3]. This report has undergone extensive review, including an NSFsponsored workshop. A significant area within the computer engineering body of knowledge is that of Computer Architecture and Organization (CAO). As defined by the Task Force, Computer Engineering (CPE) focuses on the design of computer components and computer-based systems, integrating hardware and software to produce systems that solve real-world problems. With this emphasis on the design and integration of complete systems, coverage of CAO topics in a computer engineering curriculum should differ from the coverage received in a typical computer science program. This difference is reflected in the CAO body of knowledge developed for the CCCE report, and is the focus of this paper. The CPE Body of Knowledge The most significant effort of the CCCE Task Force has been the identification and organization of the body of knowledge (BOK) pertinent to undergraduate study of computer engineering. Following the pattern of the Computer Science Volume [4], the CPE BOK is organized hierarchically into three levels. The highest level of the hierarchy is the area, which represents a particular disciplinary subfield. Each area is identified by a three-letter abbreviation, such CAO for Computer Architecture and Organization. Table 1 lists the areas in the current draft of the BOK. The knowledge areas are broken down into smaller divisions called units, which represent individual thematic modules within an area. Each unit is identified by adding a numeric suffix to the area name; as an example, CAO3 is a unit on memory system organization and architecture. Each unit is further subdivided into a set of topics, which are the lowest level of the hierarchy. Finally, for each unit a set of learning objectives are presented. Core and Elective Units One of the Task Force goals in proposing curricular recommendations is to keep the required component of the body of knowledge as small as possible to allow for program flexibility. To this end, the Task Force has defined a minimal core comprising those units for which there is broad consensus that the corresponding material is essential 1 Victor P. Nelson, Auburn University, Dept. of Electrical & Computer Engineering, 200 Broun Hall, Auburn, AL 36849, nelson@eng.auburn.edu 2 Mitchell D. Theys, University of Illinois at Chicago, Dept. of Computer Science, 1120 Science and Engineering Offices, 851 South Morgan Street, Chicago, Illinois 60607-7053, mtheys@uic.edu 3 Alan Clements, University of Teesside, School of Computing and Mathematics, Middlesbrough, Cleveland TS1 3BA, UK, a.clements@tees.ac.uk F2F-11

to anyone obtaining an undergraduate degree in computer engineering. Units that are taught as part of an undergraduate program, but which fall outside the core, are considered to be elective. The BOK areas marked with asterisks in Table 1 are those for which one or more units have been designated as core. TABLE 1 COMPUTER ENGINEERING BODY OF KNOWLEDGE AREAS *CSE Computer Systems Engineering *CAO Computer Architecture and Organization *ESY Embedded Systems *NWK Computer Networks *CSY Circuits and Systems *ELE Electronics *DIG Digital Logic *PRF Programming Fundamentals *ALG Algorithms and Complexity *DSC Discrete Structures *OPS Operating Systems *SWE Software Engineering *SPR Social and Professional Issues ACP Alternate Computing Paradigms VLS VLSI and ASIC Design TFT Testing and Fault Tolerance DSP Digital Signal Processing DSV Digital System Verification * Area contains "core" topics Several points should be noted. First, the organization of the BOK is not intended to suggest an organization of a curriculum or individual courses, although the report will include a few sample implementations. Second, it is expected that an undergraduate program will cover the minimum core topics plus additional elective units from the body of knowledge. The core units nominally account for about one-fourth of a typical undergraduate computer engineering program. The CCCE report does not specify which elective units should be included; these would be selected to meet individual program objectives. Third, core units are not necessarily limited to introductory courses. Although many of the units defined as core are indeed introductory, there are also some core units that clearly must be covered only after students have developed significant background in the field. The designation core simply means required and says nothing about the level of the course in which it appears. Assessing the Time Required To Cover a Unit To give readers a sense of the time required to cover a particular unit, the CCCE Task Force, consistent with the Computer Science Volume [4] and earlier curriculum reports [2], has chosen to express time in hours, corresponding to the in-class time required to present that material in a traditional lecture-oriented format. The time designated for each unit should be interpreted as the minimum amount of time necessary to enable a student to achieve the learning objectives for that unit. It is often appropriate to spend more time on a unit than the mandated minimum. Even though this metric has its roots in a classical lecture-oriented form, the CCCE Task Force does not seek to endorse the lecture format, believing there to be other styles - particularly given recent improvements in educational technology - that can be at least as effective. It should be noted that the hours specified do not include time spent outside of a class on homework, projects, etc. COMPUTER ARCHITECTURE AND ORGANIZATION IN THE CPE CURRICULUM Background Computer architecture is concerned with all aspects of the design and organization of the central processing unit (CPU) and the integration of the CPU into the computer system itself [5-8]. Architecture extends upward into computer software because a processor s architecture must cooperate with the operating system and system software. It is impossible to design an operating system well without knowledge of the underlying architecture. Moreover, the computer designer has to have an intimate understanding of software in order to implement the optimum architecture. Because the compiler requires an intimate knowledge of the architecture, there is a tighter relationship between the computer architect and the compiler writer than at any time in the past. The term architecture implies structure, and therefore computer architecture tells us something about the way in which the elements of a computer relate to each other. Computer architecture is generally thought of as the programmer s view of a computer; that is, the idealized or abstract view of a computer. The implementation or organization of the computer is hidden from the programmer, although it would be wrong to divorce entirely architecture and implementation because each exerts a powerful influence on the other. The computer architecture curriculum has to achieve multiple objectives. It must provide an overview of computer architecture and teach students the operation of a typical von Neumann machine. It must highlight the important issues facing today s designers and give students the tools they will need to carry out research. Ideally it should reinforce topics that are common to other areas of computer science; for example, teaching register indirect addressing reinforces the concept of pointers in C. As with any engineering program, students must learn to design and build things. Therefore, the computer engineering student should be expected to design and build a F2F-12

simple computer or computer system. This will most likely take place in a laboratory environment. The CAO Knowledge Units The Computer Architecture and Organization area has been organized into ten knowledge units, listed in Table 2. Each knowledge area in the CPE BOK includes a one-hour Unit 0 to introduce students to the field and give them a sense of the history and main contributors to the field. Unit CAO is also intended to articulate differences between computer organization and computer architecture, and describe how computer engineering makes use of computer architecture. Unit CAO1, Fundamentals of Computer Architecture, provides students with an understanding of the organization and operation of the traditional von Neumann computer architecture and its main functional blocks. Students should understand how a computer fetches, decodes, and executes instructions. While this necessitates studying instruction coding and operation at the binary machine language level, students should be introduced to assembly language programming as a way to illustrate how a machine performs various tasks. The relationship between assembly language and high-level languages, such as Java and C, should also be understood as a result of studying this unit. TABLE 2 COMPUTER ARCHITECTURE AND ORGANIZATION KNOWLEDGE UNITS CAO0. History and overview of computer architecture CAO1. Fundamentals of computer architecture CAO2. Computer arithmetic CAO3. Memory system organization and architecture CAO4. Interfacing and communication CAO5. Interface subsystems CAO6. Processor systems design CAO7. Organization of the CPU CAO8. Performance CAO9. Performance enhancements CAO10. Multiprocessing The Computer Arithmetic unit (CAO2) provides students with an understanding of the different ways to represent numeric data in digital systems, and algorithms that are used to perform arithmetic on this data. With this understanding, students can appreciate the utility and the limitations of different coding methods, including the type of errors that can result. Units CAO3 through CAO6 provide students with an understanding of how a CPU interacts with memory and input/output devices to create a complete computer system. Unit CAO3, Memory System Organization and Architecture, introduces students to memory technologies, main memory organization, and hierarchical memory architectures, including cache and virtual memory, as well as the principles of memory management. Students should understand the effects of latency and bandwidth on system performance, and the use of memory hierarchy to improve performance. Finally, they should appreciate how errors in memory systems arise and what can be done about them. Units CAO4 (Interfacing and Communication) and CAO5 (Interface Subsystems) address the interaction of the CPU with input/output (I/O) devices. A computer engineer should understand the basic I/O techniques, including programmed I/O, interrupt-driven I/O, and direct memory access. They should be able to explain how interrupts are used to implement I/O control and data transfers, and write small interrupt service routines and I/O drivers using assembly language. Students should also be able to identify various types of buses in a computer system, and to analyze and implement interfaces. Unit CAO5 provides an understanding of the basic nature of human-computer interaction. This unit covers design, operation, and parameters of performance for such common interface subsystems as magnetic and optical disk drives, basic I/O controllers, keyboards, video systems, network interfaces, etc. Unit CAO6, Processor Systems Design, ties the above topics together by providing an appreciation of how a CPU chip is turned into a complete system. Students should be able to specify, design, and understand the operation of simple computer interfaces, such as memory and peripheral chips. Consequently, they should be able to create both hardware and software for a simple stand-alone system. Since CPU operation is critical to the overall performance of a computer system, unit CAO7, Organization of the CPU enables students to compare alternative implementation of datapaths, and discuss the generation of control signals using hardwired or microprogrammed implementations. Given the evolution of instruction sets and CPU designs to improve performance; students should understand basic instruction level parallelism using pipelining, the major hazards that may occur, and approaches to eliminating data hazards and overcoming the effects of branches. When evaluating a computer or making design decisions, a computer engineer must appreciate the different factors that contribute to computer performance, select the most appropriate performance metrics, and understand the limitations of these metrics. This is addressed by the threehour unit on Performance (CAO8). Elective unit CAO9, Performance Enhancements, goes further into topics that address how various architectural enhancements affect system performance, such as superscalar operation, speculative execution, multithreading, etc. Students should be able to discuss how parallel processing approaches can be applied to the design of scalar and superscalar processors, including how vector processing techniques can be applied to enhance instruction sets to be used for multimedia, signal processing, etc. F2F-13

The final unit, Multiprocessing (CAO10) includes 3 hours of core topics to introduce all computer engineering students to the concept of parallel processing beyond the classical von Neumann model, including limitations imposed by interconnections on multiprocessing systems and problems caused by cache coherency. Further elective topics are specified in the ACP (Alternate Computing Paradigms) knowledge area. SUMMARY Study of computer architecture and organization is key to designing and evaluating computing systems, VLSI chips, embedded systems, operating systems, and compilers. As such, most of the topics of the CAO knowledge unit have been identified as core material for undergraduate computer engineering programs. The complete specification of the CAO knowledge unit is included in the appendix. As indicated above, this is not intended to be a course outline, but simply a list of topics that should be included within an undergraduate program in computer engineering. This field has undergone significant changes in recent years, and will likely continue to do so in the future. Consequently, education in computer architecture and organization will evolve with these changes. REFERENCES [1] Computing Curriculum 2001 Web Site: http://www.computer.org/ education /cc2001. [2] "Computing Curriculum 1991", Report of the ACM/IEEE-CS Joint Curriculum Task Force, 1991, IEEE Computer Society Press and ACM Press. [3] "Computing Curriculum 2001 - Computing Curriculum: Computer Engineering", http://www.eng.auburn.edu/ece/ccce [4] "Computing Curriculum 2001 - Computing Curriculum: Computer Science", http://www.computer.org/education/ cc2001/final/ index.htm [5] The Principles of Computer Hardware, 3e, Alan Clements, Oxford University Press, 2000. [6] Computer Architecture A Quantitative Approach, 3e, J.L. Hennessy, D.A. Patterson, Morgan Kauffman, 2002. [7] Computer Organization & Design The Hardware/Software Interface, 2e, D.A. Patterson and J.L. Hennessy, Morgan Kaufmann, 1998. [8] Computer Organization & Architecture, 6e, William Stallings, Prentice-Hall, 2003. APPPENDIX THE CPE BODY OF KNOWLEDGE (Reproduced from the CCCE Report[3]) CAO0. History and overview of computer architecture Minimum core coverage time: 1 hour Knowledge themes include system organization and architecture, memory, interfacing, microprocessors, system organization Contributors to the subject include Zuse, Atanasoff, von Neumann, Eckert, Mauchly, and Wilkes Contrasts between computer organization and computer architecture Purpose and role of computer architecture in computer engineering 1. Associate the themes involved with computer architecture. 2. Identify contributors to the subject area. 3. Articulate differences between computer organization and computer architecture. 4. Describe how computer engineering could make use of computer architecture. CAO1. Fundamentals of computer architecture Minimum core coverage time: 18 hours 1. Organization of the von Neumann machine 2. Instruction formats 3. The fetch/execute cycle; instruction decoding and execution 4. Registers and register files. 5. Instruction types and addressing modes 6. Subroutine call and return mechanisms 7. Programming in assembly language 8. I/O techniques and interrupts 9. Other design issues. 1. Be able to explain the organization of a von Neumann machine and its major functional units. 2. Be able to explain how an instruction is fetched from memory and executed. 3. Be able to articulate the strengths and weaknesses of the von Neumann architecture. 4. Be able to explain the relationship between the representation of machine level operation at the binary level and their representation by a symbolic assembler. 5. Be able to explain why a designer adopted a given different instruction formats, such as the number of addresses per instruction and variable length vs. fixed length formats. 6. Be able to write small programs and fragments of assembly language code to demonstrate an understanding of machine level operations. 7. Be able to implement some fundamental high-level programming constructs at the machine-language level. 8. Be able to use computer simulation packages to investigate assembly language programming. F2F-14

CA2. Computer arithmetic Minimum core coverage time: 3 hours 1. Representation of integers (positive and negative numbers) 2. Algorithms for common arithmetic operations (addition, subtraction, multiplication, division) 3. Significance of range, precision, and accuracy in computer arithmetic 4. Representation of real numbers (standards for floating-point arithmetic) 5. Algorithms for carrying out common floating-point operations 6. Converting between integer and real numbers 7. Multi-precision arithmetic 8. Hardware and software implementation of arithmetic unit. 9. The generation of higher order functions from square roots to transcendentals. 1. Appreciate how numerical values are represented in digital computers 2. Understand the limitations of computer arithmetic and the effects of errors on calculations. 3. Appreciate the effect of a processor s arithmetic unit on its overall performance. CAO3. Memory system organization and architecture Minimum core coverage time: 9 hours 1. Memory systems hierarchy 2. Coding, data compression, and data integrity 3. Electronic, magnetic and optical technologies 4. Main memory organization and its characteristics and performance 5. Latency, cycle time, bandwidth, and interleaving 6. Cache memories (address mapping, line size, replacement and write-back policies) 7. Virtual memory systems 8. Memory technologies (DRAM, EPROM, FLASH,etc.) 9. Reliability of memory systems. Error detecting and error correcting systems. CAO4. Interfacing and communication 1. I/O fundamentals: handshaking, buffering, 2. I/O techniques: programmed I/O, interrupt-driven I/O, DMA 3. Interrupt structures: vectored and prioritized, interrupt overhead, interrupts and reentrant code. 4. Memory system design and interfacing. 5. Buses: bus protocols, local and geographic arbitration 1. Explain how interrupts are used to implement I/O control and data transfers. 2. Write small interrupt service routines and I/O drivers using assembly language. 3. Identify various types of buses in a computer system. 4. Describe data access from a magnetic disk drive. 5. Be able to analyze and implement interfaces. CAO5. Interface subsystems 1. External storage systems; organization and structure of disk drives and optical memory 2. Basic I/O controllers, keyboard, mouse, etc. 3. RAID architectures 4. Video control 5. I/O Performance 6. SMART technology and fault detection 7. Processor to network interfaces 1. Compute the various parameters of performance for standard I/O types. 2. Explain the basic nature human computer interaction devices. 3. Describe data access from magnetic and optical disk drives. CAO6. Processor systems design 1. Identify the main types of memory technology. 2. Explain the effect of memory latency and bandwidth on performance. 3. Explain the use of memory hierarchy to reduce the effective memory latency. 4. Describe the principles of memory management. 5. Appreciate how errors in memory systems arise and what can be done about them. 1. The CPU interface: clock, control, data and address buses 2. Address decoding and memory interfacing 3. Basic parallel and serial interfaces 4. Timers 5. System firmware F2F-15

1. Appreciate how a CPU chip is turned into a complete system. 2. Be able to design an interface to memory 3. Understand how to interface and use peripheral chips 4. Write sufficient EPROM-based system software to create a basic stand-alone system. 5. Be able to specify and design simple computer interfaces. CAO7. Organization of the CPU 1. Implementation of the von Neumann machine 2. Single vs. multiple bus datapaths 3. Instruction set architecture; machine architecture as a framework for encapsulating design decisions. 4. Relationship between the architecture and the compiler 5. Implementing instructions 6. Control unit: hardwired realization vs. microprogrammed realization 7. Arithmetic units, for multiplication and division. 8. Instruction pipelining 9. Trends in computer architecture: CISC, RISC, VLIW 10. Introduction to instruction-level parallelism (ILP) 11. Pipeline hazards: structural, data and control 12. Reducing the effects of hazards 1. Compare alternative implementation of datapaths. 2. Discuss the generation of control signals using hardwired or microprogrammed implementations. 3. Explain basic instruction level parallelism using pipelining and the major hazards that may occur. 4. Explain what has been done to overcome the effect of branches 5. Discuss the way in which instruction sets have evolved to improve performance; for example, predicated execution. CAO8. Performance Minimum core coverage time: 3 hours 1. Metrics for computer performance; clock rate, MIPS, Cycles per instruction, benchmarks 2. Strengths and weaknesses of performance metrics 3. Averaging metrics: arithmetic, geometric and harmonic 4. The role of Amdahl s law in computer performance 1. Appreciate all the factors that contribute to computer performance. 2. Understand the limitations of performance metrics 3. Be able to select the most appropriate performance metric when evaluating a computer. 4. Discuss the impact on control and datapath design for performance enhancements. CAO9. Performance enhancements Minimum core coverage time: none (elective topics) 1. Superscalar architecture 2. Branch prediction 3. Prefetching 4. Speculative execution 5. Multithreading 6. Scalability 7. Short vector instruction sets; Streaming extensions, AltiVec; relationship between computer architecture and multimedia applications. 1. Discuss how various architectural enhancements affect system performance. 2. Discuss how parallel processing approaches can be applied to the design of scalar and superscalar processors. 3. Discuss how vector processing techniques can be applied to enhance instruction sets to be used for multimedia, signal processing, etc. 4. Appreciate how each of the functional parts of a computer system affect its overall performance. Be able to estimate the effect on system performance of changes to functional units. CAO10. Multiprocessing Minimum core coverage time: 3 hours 1. Systolic architectures 2. Interconnection networks (hypercube, shuffleexchange, mesh, crossbar) 3. Shared memory systems 4. Cache coherence 5. Memory models and memory consistency 1. Discuss the concept of parallel processing beyond the classical von Neumann model. 2. Describe the limitations imposed by interconnections on multiprocessing systems. 3. Appreciate the problems caused by cache coherency and understand the ways in which the problem can be overcome. F2F-16