Elctronic Circuit Diagram in GLE A. S. Buddn (abuddn@nospamgataki.co.uk) 1 Introduction Thi documnt i intndd to provid om baic documntation for th u of lctronic.gl for drawing circuit diagram. It i currntly a bit baic, but will hopfully b addd to at a latr dat. 2 Function Th following i a lit of all th function availabl, along with thir option. Th maning of th variou option will (hopfully) bcom lf-xplanatory with th xampl that follow in th nxt ction. @ritor_h rlabl$ @ritor_v rlabl$ @potntiomtr_hb rlabl$ @potntiomtr_vr rlabl$ @vritor_h rlabl$ @vritor_v rlabl$ @npn_bjt bjtlabl$ @pnp_bjt bjtlabl$ @n_moft mlabl$ @p_moft mlabl$ @igbt igbtlabl$ @inductor_h cor ilabl$ @inductor_v cor ilabl$ @xformr cor typ @xformr_dblcondary typ location @p_capacitor polarity 1
@p_capacitor_hl clabl$ @p_capacitor_hr clabl$ @p_capacitor_vt clabl$ @p_capacitor_vb clabl$ @capacitor_h clabl$ @capacitor_v clabl$ @vcapacitor_h clabl$ @vcapacitor_v clabl$ @diod_hr dlabl$ @diod_hl dlabl$ @diod_vd dlabl$ @diod_vu dlabl$ @bridg_rctifir blabl$ @opamp upply ulabl$ @ground @upply_h typ @upply_v typ @cll_h labl$ @cll_v labl$ @and @nand @or @nor @xor @xnor @not @buffr 3 Symbol Thi ction giv a lit of th variou ymbol that can b producd with th providd function. Th ymbol rfr to th tart point for drawing and rfr to th nd point., amov 1 1 R 1 amov 1 2 @ritor_h "R_1" 2
R 1 amov 2 5 @ritor_v "R_1" amov 1 3 @potntiomtr_hb "R_1" R 1 amov 2 5 @potntiomtr_vr "R_1" R 1 amov 1 2 @vritor_h "R_1" R 1 amov 2 5 @vritor_v "R_1" 3
, Q 1 amov 1 2 @npn_bjt "Q_1", Q 1 amov 1 2 @pnp_bjt "Q_1", Q 1 amov 1 2 @n_moft "Q_1", Q 1 amov 1 2 @p_moft "Q_1", Q 1 amov 1 2 @igbt "Q_1" L 1 amov 1 2 @inductor_h 1 "L_1" 4
L 1 amov 2 5 @inductor_v 1 "L_1" L 1 amov 1 2 @inductor_h 0 "L_1" L 1 amov 2 5 @inductor_v 0 "L_1" 20 30, amov 1 5 @xformr 1 0 "20" "30" 20 30, amov 1 5 @xformr 1 1 "20" "30" 5
20 30, amov 1 5 @xformr 1 2 "20" "30" 20 30, amov 1 5 @xformr 0 0 "20" "30" 20 30, amov 1 5 @xformr 0 1 "20" "30" 20 30, amov 1 5 @xformr 0 2 "20" "30" 6
, amov 1 8 @xformr_dblcondary 0 0, amov 1 8 @xformr_dblcondary 1 0 7
, amov 1 8 @xformr_dblcondary 2 0, amov 1 5 @xformr_dblcondary 0 1 8
, amov 1 5 @xformr_dblcondary 1 1, amov 1 5 @xformr_dblcondary 2 1 9
, amov 1 11 @xformr_dblcondary 0 2, amov 1 11 @xformr_dblcondary 1 2 10
, amov 1 11 @xformr_dblcondary 2 2 C 1 amov 1 2 @p_capacitor_hl "C_1" C 1 amov 1 2 @p_capacitor_hr "C_1" C 1 amov 2 5 @p_capacitor_vt "C_1" 11
C 1 amov 2 5 @p_capacitor_vb "C_1" C 1 amov 1 2 @capacitor_h "C_1" C 1 amov 2 5 @capacitor_v "C_1" C 1 amov 1 2 @vcapacitor_h "C_1" C 1 amov 2 5 @vcapacitor_v "C_1" 12
D 1 amov 1 2 @diod_hr "D_1" D 1 amov 1 2 @diod_hl "D_1" D 1 amov 2 5 @diod_vd "D_1" D 1 amov 2 5 @diod_vu "D_1", B 1 amov 1 4 @bridg_rctifir "B_1" 13
, U 1 amov 1 4 @opamp 1 "U_1", U 1 amov 1 4 @opamp 0 "U_1", amov 1 2 @ground amov 1 2 @upply_h 0 amov 2 5 @upply_v 0 amov 1 2 @upply_h 1 14
amov 2 5 @upply_v 1 amov 1 2 @upply_h 2 amov 2 5 @upply_v 2 amov 1 2 @cll_h "E_1" amov 2 5 @cll_v "E_1" 15
, amov 1 4 @and, amov 1 4 @nand, amov 1 4 @or, amov 1 4 @nor, amov 1 4 @xor 16
, amov 1 4 @xnor amov 1 3 @not amov 1 3 @buffr 4 Exampl Thi ction giv a fw xampl of ral circuit that hav bn drawn with thi packag. C 2 R 1 Q 1 R 2 Q 2 C 1 R 3 R 5 R 6 U 1 C 4 Q 3 R 4 C 3 17
! Exampl c i r c u i t with l c t r o n i c. gl i z 20 7.5 includ l c t r o n i c. gl bgin cal 0.5 0.5 trmrad = 0.25 amov 1 3 rmov trmrad 0 c i r c l trmrad rmov trmrad 0 r l i n 35 0 rmov trmrad 0 c i r c l trmrad amov 1 6 rmov trmrad 0 c i r c l trmrad rmov trmrad 0 r l i n 1 0 @ritor h R 1 @npn bjt Q 1 rmov 2 1 r l i n 0 2 rmov 0 4 r l i n 0 1 rmov 0 5 r l i n 0 1 @ritor v R 2 r l i n 2 0 r l i n 0 2 @npn bjt Q 2 rmov 0 2 r l i n 0 2 @pnp bjt Q 3 rmov 2 1 r l i n 0 2 rmov 0 4 r l i n 0 2 rmov 0 2 r l i n 0 2 rmov 0 5 @capacitor h C 1 rmov 0 5 r l i n 0 1 @ritor v R 3 r l i n 1 0 r i t o r v R 4 r l i n 0 1 rmov 0 5 18
@ritor h R 5 gav @ritor h R 6 r l i n 1 0 rmov 1 0 @capacitor v C 3 r l i n 0 1 grtor r l i n 0 3 @capacitor h C 2 r l i n 0 1 r l i n 1 0 gav @opamp 1 U 1 rmov 1 1 r l i n 0 1 r l i n 6 0 r l i n 0 3 @capacitor h C 4 r l i n 1 0 rmov trmrad 0 c i r c l trmrad rmov trmrad 0 grtor rmov 2 1 r l i n 0 2 rmov 0 6 r l i n 0 4 rmov 7 0 @ground amov 1 13 rmov trmrad 0 c i r c l trmrad rmov trmrad 0 r l i n 35 0 rmov trmrad 0 c i r c l trmrad rmov trmrad 0 nd cal 19
! Thr pha invrtr i z 13 10 includ l c t r o n i c. gl bgin cal 0.5 0.5! Draw th DC Link amov 1 19 r l i n 24 0! Draw Ground amov 1 11 r l i n 2 0 @ground r l i n 22 0! Tranitor for i = 0 to 16 tp 8 for j = 0 to 4 tp 4 amov 2 13 rmov i j @igbt rmov 2 1 r l i n 0 1 rmov 0 3 r l i n 0 1 rmov 2 4 @diod vu nxt j nxt i 20
! Connction point amov 4 11 for i = 0 to 16 tp 8 for j = 0 to 8 tp 4 amov 4 11 rmov i j rmov 2 0 nxt j nxt i! Machin winding amov 12 15 r l i n 4 0 r l i n 0 6 @inductor v 0 tar x = xpo () tar y = ypo () bgin rotat 30 @inductor h 0 nd rotat rmov 4 co ( torad (30)) 4 in ( torad (30)) nd y = ypo () alin 24 nd y alin 24 15 r l i n 4 0 amov tar x tar y bgin rotat 210 @inductor h 0 nd rotat rmov 4 co ( torad (30)) 4 in ( torad (30)) alin 8 nd y alin 8 15 r l i n 4 0 nd cal SET Q RESET!Q! Exampl of l ogic gat u : SR Flip Flop i z 19 14 21
includ l c t r o n i c. gl! Radiu of nd trminal trmrad = 0.25! Rt input amov 4 2 rmov trmrad 0 c i r c l trmrad rmov 2 trmrad 0 t jut RC txt RESET rmov 3 trmrad 0 r l i n 2 0! St input amov 4 12 rmov trmrad 0 c i r c l trmrad rmov 2 trmrad 0 t jut RC txt SET rmov 3 trmrad 0 r l i n 2 0! Top NAND Gat @nand rmov 0 2 r l i n 0 2 rmov 0 2 r l i n 0 2! Bottom NAND Gat @nand! Intrconnction rmov 6 1 r l i n 1 0 r l i n 0 2 r l i n 7 3 rmov 0 2 r l i n 7 3 r l i n 0 2 r l i n 1 0 rmov 1 0! Top Output r l i n 2 0 rmov trmrad 0 c i r c l trmrad rmov 2 trmrad 0 t jut LC txt Q! Bottom Output rmov 0 8 txt!q rmov 2 trmrad 0 c i r c l trmrad rmov trmrad 0 r l i n 2 0 22
Q 1 D 2 C 1 LOAD D 1 Q 2! An H Bridg! St th pag i z i z 21 10! Import th l c t r o n i c modul includ l c t r o n i c. gl! Draw a grid i f th l i n blow i uncommntd! @drawgrid xcal! Top l f t of diagram amov 2 9 gav! Battry lg r l i n 0 2 @cll v E 1 r l i n 0 2! Ground plan r l i n 17 0! Rturn to top l f t grtor! Powr to cap lg r l i n 4 0 r l i n 0 2 @p capacitor vt C 1 r l i n 0 2! Back to powr r a i l rmov 0 8! Powr to Firt Lg r l i n 5 0 r l i n 0 1 rmov 2 1 @n moft Q 1 rmov 2 1 r l i n 0 1 23
@diod vu D 1! Back to Powr r a i l rmov 0 8! Powr to cond l g r l i n 8 0 @diod vu D 2 r l i n 0 1 rmov 2 1 @n moft Q 2 rmov 2 1 r l i n 0 1! Back to right hand id of load rmov 0 4! Connction to load r l i n 2 0 rmov 4 0 r l i n 2 0 rmov 2 1! Load box 4 2 rmov 2 1 t jut CC txt LOAD 24