Black Box for Robot Manipulation



Similar documents
Soft processors for microcontroller programming education

Digitale Signalverarbeitung mit FPGA (DSF) Soft Core Prozessor NIOS II Stand Mai Jens Onno Krah

Networking Remote-Controlled Moving Image Monitoring System

Using Altera MAX Series as Microcontroller I/O Expanders

Microtronics technologies Mobile:

Nios II-Based Intellectual Property Camera Design

NIOS II Based Embedded Web Server Development for Networking Applications

A 5 Degree Feedback Control Robotic Arm (Haptic Arm)

SuperIOr Controller. Digital Dynamics, Inc., 2014 All Rights Reserved. Patent Pending. Rev:

Embedded Systems on ARM Cortex-M3 (4weeks/45hrs)

Nios II-Based Air-Jet Loom Control System

RAPID PROTOTYPING OF DIGITAL SYSTEMS Second Edition

Digital Systems Based on Principles and Applications of Electrical Engineering/Rizzoni (McGraw Hill

INTRODUCTION TO SERIAL ARM

MicroMag3 3-Axis Magnetic Sensor Module

Ping Pong Game with Touch-screen. March 2012

DS1104 R&D Controller Board

STEPPER MOTOR SPEED AND POSITION CONTROL

DESIGN OF 6 DOF ROBOTIC ARM CONTROLLED OVER THE INTERNET

ELEC 5260/6260/6266 Embedded Computing Systems

Designing an efficient Programmable Logic Controller using Programmable System On Chip

PROJECT PRESENTATION ON CELLPHONE OPERATED ROBOTIC ASSISTANT

Microprocessor & Assembly Language

Chapter 02: Computer Organization. Lesson 04: Functional units and components in a computer organization Part 3 Bus Structures

FRC WPI Robotics Library Overview

All Programmable Logic. Hans-Joachim Gelke Institute of Embedded Systems. Zürcher Fachhochschule

Pmod peripheral modules are powered by the host via the interface s power and ground pins.

System Design Issues in Embedded Processing

Embedded Electric Power Network Monitoring System

Eric Mitchell April 2, 2012 Application Note: Control of a 180 Servo Motor with Arduino UNO Development Board

2. Scope of the DE0 Board and Supporting Material

FLYPORT Wi-Fi G

White Paper Utilizing Leveling Techniques in DDR3 SDRAM Memory Interfaces

SKP16C62P Tutorial 1 Software Development Process using HEW. Renesas Technology America Inc.

2.0 Command and Data Handling Subsystem

Building Blocks for PRU Development

The Programming Interface

Eureka Technology. Understanding SD, SDIO and MMC Interface. by Eureka Technology Inc. May 26th, Copyright (C) All Rights Reserved

Microcontroller Based Low Cost Portable PC Mouse and Keyboard Tester

Computer Automation Techniques. Arthur Carroll

ELECTENG702 Advanced Embedded Systems. Improving AES128 software for Altera Nios II processor using custom instructions

Microcontrollers in Practice

MICROPROCESSOR AND MICROCOMPUTER BASICS

Computer Organization and Components

Programmable Logic Controllers Definition. Programmable Logic Controllers History

A Master-Slave DSP Board for Digital Control

EasyC. Programming Tips

Chapter 2 Logic Gates and Introduction to Computer Architecture

White Paper Streaming Multichannel Uncompressed Video in the Broadcast Environment

B Robo Claw 2 Channel 5A Motor Controller Data Sheet

Best Practises for LabVIEW FPGA Design Flow. uk.ni.com ireland.ni.com

Computer Organization. and Instruction Execution. August 22

Advanced Computer Architecture-CS501. Computer Systems Design and Architecture 2.1, 2.2, 3.2

An overview of Computerised Numeric Control (C.N.C.) and Programmable Logic Control (P.L.C.) in machine automation

Pen Drive to Pen Drive and Mobile Data Transfer Using ARM

Serial Communications

Servo Info and Centering

Figure 1.Block diagram of inventory management system using Proximity sensors.

Notes and terms of conditions. Vendor shall note the following terms and conditions/ information before they submit their quote.

Implementation of Web-Server Using Altera DE2-70 FPGA Development Kit

Von der Hardware zur Software in FPGAs mit Embedded Prozessoren. Alexander Hahn Senior Field Application Engineer Lattice Semiconductor

Lab Experiment 1: The LPC 2148 Education Board

Serial port interface for microcontroller embedded into integrated power meter

AVR151: Setup and Use of the SPI. Introduction. Features. Atmel AVR 8-bit Microcontroller APPLICATION NOTE

Seeking Opportunities for Hardware Acceleration in Big Data Analytics

ADVANCED PROCESSOR ARCHITECTURES AND MEMORY ORGANISATION Lesson-12: ARM

Avoiding pitfalls in PROFINET RT and IRT Node Implementation

Chapter 2: OS Overview

Quartus II Software Design Series : Foundation. Digitale Signalverarbeitung mit FPGA. Digitale Signalverarbeitung mit FPGA (DSF) Quartus II 1

Computer Systems Structure Input/Output

Pre-tested System-on-Chip Design. Accelerates PLD Development

Applying the Benefits of Network on a Chip Architecture to FPGA System Design

STM32 F-2 series High-performance Cortex-M3 MCUs

Building an Embedded Processor System on a Xilinx Zync FPGA (Profiling): A Tutorial

Digital Single Axis Controller

7a. System-on-chip design and prototyping platforms

GPS & GSM BASED REAL-TIME VEHICLE TRACKING SYSTEM.

A Generic Network Interface Architecture for a Networked Processor Array (NePA)

PROGRAMMABLE LOGIC CONTROL

How to design and implement firmware for embedded systems

Programmable Logic Controller PLC

MICROPROCESSOR. Exclusive for IACE Students iacehyd.blogspot.in Ph: /422 Page 1

Programming Logic controllers

The Design of DSP controller based DC Servo Motor Control System

8-Bit Flash Microcontroller for Smart Cards. AT89SCXXXXA Summary. Features. Description. Complete datasheet available under NDA

A DIY Hardware Packet Sniffer

An inertial haptic interface for robotic applications

DKWF121 WF121-A B/G/N MODULE EVALUATION BOARD

Nios II Development Kit Version 5.1 SP1 Release Notes

December 2002, ver. 1.0 Application Note 285. This document describes the Excalibur web server demonstration design and includes the following topics:

Arduino Motor Shield (L298) Manual

Develop a Dallas 1-Wire Master Using the Z8F1680 Series of MCUs

CSE2102 Digital Design II - Topics CSE Digital Design II

EXPERIMENT 2 TRAFFIC LIGHT CONTROL SYSTEM FOR AN INTERSECTION USING S7-300 PLC

ET-BASE AVR ATmega64/128

An Overview of Stack Architecture and the PSC 1000 Microprocessor

High-Performance, Highly Secure Networking for Industrial and IoT Applications

ELECTRICAL ENGINEERING

Cypress Semiconductor: Arduino Friendly PSoC Shield

Transcription:

Black Box for Robot Manipulation Second Prize Black Box for Robot Manipulation Institution: Participants: Hanyang University, Seoul National University, Yonsei University Kim Hyong Jun, Ahn Ho Seok, Baek Young Min, Sa In Kyu Design Introduction Today s robot manipulators need ever more precise control capability. There are two important prerequisites for precise control: the number of fingers in the manipulator and accessable hardware/ software control. In the first case, the number of system I/O pins is determined by the number of fingers that must be controlled. In the second case, the developer should be able to easily design the system, taking into account the system requirements. Conventional systems use several CPUs because it is difficult to control all motors in the system using a single CPU. Each CPU has control over a servo motor, and the CPUs communicate with each other to simultaneously control the manipulator. This methodology can have problems with unsynchronized movements or time delays. In contrast, FPGAs have many I/O pins, and the developer can design the system to fit in one FPGA. This FPGA can then control all of the motors by distributing the servo-motor dedicated processors. We chose to use an Altera Cyclone II FPGA, which gave us easy, natural control over the manipulator. Our design implemented the Nios II processor with custom instructions, which helped achieve faster processing capability and precise system control, providing a robust FPGA solution. Our ultimate goal was to develop the control module using this hardware/software strategy. The robot manipulator has two arms and uses the Development and Education (DE2) board, which contains the Altera Cyclone II FPGA. The application used the μc/os-ii RTOS and custom instructions. Communication to and from this control module is performed via an external Ethernet link. Function Description In a hardware/software co-designed system, the interaction of the software and hardware is critical. The hardware logic is implemented in an FPGA and tends to be fast and robust. The software logic is comparatively slow due to its sequential flow, instructions, and operand fetch stages that involve read/ write memory access. Software, however, is significantly easier to develop and modify because it resides in memory and not in the dedicated gates of the switch fabric. 285

Nios II Embedded Processor Design Contest Outstanding Designs 2006 The black box for robot manipulation (BRM) operates via a standalone controller, which controls the DC and servo motors, and has communications ability via Ethernet and serial peripheral interface (SPI) connections. Our goal was to make a high-performance, usable system. The project involved two phases. In phase one, we developed and operated the manipulator like a microcontroller unit (MCU) robot system. Hardware implemention included a DC motor controller and encoder with programmable I/O (PIO), a servo motor controller with a pulse width modulator (PWM), and a hand module controller using the SPI master peripheral, and an Ethernet peripheral with the dm9000 Ethernet device. In the software phase, we used the μc/os-ii RTOS running on the Nios II processor. We created the design using SOPC Builder, and implemented a lightweight TCP/IP (LWIP) stack, and defined the Ethernet and SPI communication packet, and added controls for the DC motor, DC motor encoder, and servo motor at the RTOS task level. In phase two, we planned to use PWM generator and pid calculation using the Nios II C-to- Hardware Acceleration Compiler (C2H Compiler) and custom instructions. An important issue is whether the project can be used for home and space automation. Performance Parameters We used the Cyclone II FPGA on the Altera DE2 board, and ran the μc/os-ii RTOS on the Nios II processor. With this setup, it took one second to send a command four times to all eight DC motors, and one servo motor. It took an additional one second for SPI communication with the hand module and external Ethernet device. If a command is sent more than four times, the BRM system issues a fault indication. Design Architecture Figure 1 shows the BRM s hardware block diagram. 286

Black Box for Robot Manipulation Figure 1. Robot Manipulator Block Diagram Robot Arm DC Motors: 4 Servo Motor: 1 Total Actuators DC Motors: 6 Servo Motors: 22 Robot Arm DC Motors: 4 Servo Motor: 1 Black Box for Robot Manipulation Robot Arm Robot Arm PIO, PWM, Encoder, SPI Signal Altera DE2 Board Using Cyclone II FPGA & Circuit PIO, PWM, Encoder, SPI Signal Robot Hand Robot Hand Ethernet Robot Hand Ready to Receive SPI Packet Using AVR Main Robot Control Scheduler (PC Application) Robot Hand Ready to Receive SPI Packet Using AVR The external device, which is controlled by the BRM, has five components: DC motor DC motor encoder Servo motor Hand module with SPI communication An Ethernet device (dm9000) Three joints in the arm use a DC motor. One wrist joint uses a servo motor. The whole system has eight joints that use DC motors, and two that use servo motors. At the end of the arm is the hand module. The AVR MCU controls it with 4 DC motors and four servo motors via SPI slave communication. Figure 2 shows a computer-aided design (CAD) drawing of the robot arm. 287

Nios II Embedded Processor Design Contest Outstanding Designs 2006 Figure 2. Robot Arm CAD Drawing Figure 3 shows the software system block diagram. Figure 3. System Block Diagram μc/os-ii for Nios II Processor μc/os-ii Application External Packet Manager DC Motor Control Task Servo Motor Control Task Other Device Control Task LWIP for μc/os-ii Nios II Processor PIO PWM Generator SPI Master dm9000 DC Motor Left: 4 Right: 4 Servo Motor Left: 1 Right: 1 Hand Module Left: 1 Right: 1 External Control Unit (Robot Main Scheduler) The software does not have a general device driver. To maintain consistency with the RTOS, we assigned the task to the I/O subsystem. Figure 4 shows the software flow chart. 288

Black Box for Robot Manipulation Figure 4. Software Flow Chart Initialize DC Motor (Using Limit Switch) DC Motor Task DC Motor Task Creation out: 8 PWM Signals in: Encoder Edge Counter (Using PIO Peripheral) Servo Motor Task Servo Motor Task Creation out: 2 PWM Signals (Using PWM Generator Peripheral) Hand Control Task Hand Control Task Creation out: Hand Command for SPI Packet in: Sensor Value for SPI Packet (Using SPI Master Peripheral) Ethernet Packet Manager Ethernet Task Creation out: Hand Sensor Value & BRM State (Ready, Processing, Stopped) in: BRM Command (#n Gesture) (Using DM9000 Peripheral) BRMManager Task BRM Manager Task Creation Processing: 1. After Initialization, Wait to Get Ethernet Command Packet from Main Control System. 2. If Get Command Packet, Parse the Packet & Pick the Arm & Hand Command. 3. Command DC & Servo & Make Arm Action. 4. Command Hand & Make Hand Action. 5. Maintain DC & Servo until Hand Module Responds (OK, Error). Design Description We used the Altera DE2 board, which has a Cyclone II device, to implement the design. The main clock frequency is 100 MHz, and we used a total of 39 external general-purpose I/O (GPIO) pins for the DC motor, DC motor encoder, servo motor, and the hand control of the SPI master. We modified the DE2_WEB source code, and did not change the name of the top-level design. The design has the following modules: DC_MOTOR_CONTROL We implemented this module using the PIO output-only peripheral. It has a 32-bit data register, which we needed because one DC motor requires two signals (positive and negative). DC_MOTOR_ENCODER We implemented this module using the PIO input-only peripheral. It catches the rising edge of the encoder pulse, and it has a 32-bit data register. The DC motor encoder requires two signals (for the forward and reverse motor states). 289

Nios II Embedded Processor Design Contest Outstanding Designs 2006 SERVO_MOTOR_CONTROL This module uses the PIO output-only peripheral. It has a two-bit data register because one servo motor requires one PWM signal. The operating system (OS) task generates the PWM pulse. HAND_CONTROL The module uses the SPI master peripheral. The hand module acts in SPI slave mode. It has a clock of 11/128 MHz. We built the Nios II processor using SOPC Builder, as shown in Figure 5. Figure 5. Nios II implementation in SOPC Builder Figure 6 shows the Quartus II-generated project summary. 290

Black Box for Robot Manipulation Figure 6. Nios II Implementation in the Quartus II Software Figures 7 and 8 show the circuit and hardware that are required to connect the external devices, such as the DC motor, encoder, and SPI slave module. Figure 7. Completed Circuit 291

Nios II Embedded Processor Design Contest Outstanding Designs 2006 Figure 8. DC Motor Driver and Power Circuit The DC motor driver circuit has four L298 driver devices, and the power circuit has uses the LM2576-3.3 device, which operates at 5 volts. Figure 9 shows the signal divider circuit and external DE2 header. Figure 9. Signal Divider Circuit and DE2 External GPIO Header Figure 10 shows our testbench system. 292

Black Box for Robot Manipulation Figure 10. Combination with Our Testbench Robot System Design Features Our design has the following features: Processor Nios II processor Operating System μc/os-ii RTOS using LWIP Interfaces SPI and Ethernet communication I/O Signal Motor control and sensing (34 I/O pins) We developed our robot manipulator for robust control. The software generates the signals required for elaborate control while the Altera Cyclone II FPGA solves time delay problems. With this combination, the system performs well, with all of the parts working together. Furthermore, this implementation solves the synchronization problems experienced by the conventional manipulation method, which uses many CPUs to control many motors. Our control module is easy to control externally, because we use I 2 C to control orders from external devices. Additionally, we implemented the robot s operating system easily by using custom instructions with the Nios II processor. Conclusion It was very difficult to adapt the FPGA system to the robot embedded system. To design the robot system with an FPGA, we divided the project into two parts: developing the MCU-based model and developing the FPGA-based model. Changing from MCU-based development to FPGA-based development will have a huge impact on the industry design flow. Originally, we considered using the ARM microprocessor to control the robot. However, after using the FPGA-based system, we found that we prefered using the FPGA to using ARM or an MCU. So, the design worked better than we expected. The Nios II processor, Quartus II software, SOPC Builder, and Nios II Integrated Development Environment (IDE) made it easy for us to develop our design, showing the usefulness of these tools in the design process. 293

Nios II Embedded Processor Design Contest Outstanding Designs 2006 294