LM350. 3.0 A, Adjustable Output, Positive Voltage Regulator THREE TERMINAL ADJUSTABLE POSITIVE VOLTAGE REGULATOR



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3. A, able Output, Positive Voltage Regulator The is an adjustable threeterminal positive voltage regulator capable of supplying in excess of 3. A over an output voltage range of 1.2 V to 33 V. This voltage regulator is exceptionally easy to use and requires only two external resistors to set the output voltage. Further, it employs internal current limiting, thermal shutdown and safe area compensation, making it essentially blowout proof. The serves a wide variety of applications including local, on card regulation. This device also makes an especially simple adjustable switching regulator, a programmable output regulator, or by connecting a fixed resistor between the adjustment and output, the can be used as a precision current regulator. Features Guaranteed 3. A Output Current Output able between 1.2 V and 33 V Load Regulation Typically. Line Regulation Typically.5%/V Internal Thermal Overload Protection Internal Short Circuit Current Limiting Constant with Temperature Output Transistor Safe Area Compensation Floating Operation for High Voltage Applications Standard 3lead Transistor Package Eliminates Stocking Many Fixed Voltages PbFree Packages are Available* THREETERMINAL ADJUSTABLE POSITIVE VOLTAGE REGULATOR 1 2 3 Pin 1. 2. 3. TO22 T SUFFIX PLASTIC PACKAGE CASE 221AB Heatsink surface is connected to Pin 2. MARKING DIAGRAM C in *.1 F v out 24 CO ** 1 F LM 35T AWLYWWG * = C in is required if regulator is located an appreciable distance from power supply filter. ** = C O is not needed for stability, however, it does improve transient response. Since is controlled to less than 1 A, the error associated with this term is negligible in most applications Vout 1.25 V 1 R1 R2 Figure 1. Simplified Application *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. A WL Y WW G = Assembly Location = Wafer Lot = Year = Work Week = PbFree Device ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. Semiconductor Components Industries, LLC, 26 August, 26 Rev. 4 1 Publication Order Number: /D

MAXIMUM RATINGS Rating Symbol Value Unit InputOutput Voltage Differential V I V O 35 Vdc Power Dissipation P D Internally Limited W Operating Junction Temperature Range T J 4 to 125 C Storage Temperature Range T stg 65 to 15 C Soldering Lead Temperature (1 seconds) T solder 3 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. ELECTRICAL CHARACTERISTICS (V I V O = 5. V; I L = A; T J = T low to T high ; P max [Note 1], unless otherwise noted.) Characteristics Figure Symbol Min Typ Max Unit Line Regulation (Note 2) T A = 25 C, 3. V V I V O 35 V 1 Reg line.5.3 %/V Load Regulation (Note 2) T A = 25 C, 1 ma I l 3. A V O 5. V V O 5. V 2 Reg load Thermal Regulation, Pulse = 2 ms, (T A = 25 C) Reg therm.2 % V O /W ment Pin Current 3 5 1 A ment Pin Current Change 3. V V I V O 35 V 1 ma I L 3. A, P D P max Reference Voltage 3. V V I V O 35 V 1 ma I O 3. A, P D P max 5..1 25.5 mv % V O 1,2.2 5. A 3 V ref 1.2 1.25 1.3 V Line Regulation (Note 2) 3. V V I V O 35 V 1 Reg line.2.7 %/V Load Regulation (Note 2) 1 ma I L 3. A V O 5. V V O 5. V 2 Reg load Temperature Stability (T low T J T high ) 3 T S 1. % V O 2.3 7 mv % V O Minimum Load Current to Maintain Regulation (V I V O = 35 V) 3 I Lmin 3.5 1 ma Maximum Output Current V I V O 1 V, P D P max V I V O = 3 V, P D P max, T A = 25 C 3 I max 3..25 4.5 1. A RMS Noise, % of V O T A = 25 C, 1 Hz f 1 khz Ripple Rejection, V O = 1 V, f = 12 Hz (Note 3) Without C Adj C Adj = 1 F Long Term Stability, T J = T high (Note 4) T A = 25 C for Endpoint Measurements 4 RR N.3 % V O 66 65 8 3 S.3 1. %/1. k Hrs. db Thermal Resistance, JunctiontoCase Peak (Note 5) Average (Note 6) 1. T low to T high = to 125 C; P max = 25 W for T; T low to T high = 4 to 125 C; P max = 25 W for BT 2. Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used. 3. C Adj, when used, is connected between the adjustment pin and ground. 4. Since LongTerm Stability cannot be measured on each device before shipment, this specification is an engineering estimate of average stability from lot to lot. 5. Thermal Resistance evaluated measuring the hottest temperature on the die using an infrared scanner. This method of evaluation yields very accurate thermal resistance values which are conservative when compared to the other measurement techniques. 6. The average die temperature is used to derive the value of thermal resistance junction to case (average). R JC 2.3 C/W 2

ORDERING INFORMATION T TG Device Operating Temperature Range Package Shipping T J = to 125 C TO22 TO22 (PbFree) 5 Units / Rail 5 Units / Rail For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD811/D. 31 31 23 12 5.6K 6.3V 17 125K 135 12.4K 6.7K 12K 5.pF 6.8K 51 16 2 13K 6.3V 6.3V 3 pf 3 pf 2.4K 15 19 3.6K 5.8K 11 5.1K 12.5K 4.45 Figure 2. Representative Schematic Diagram * V CC Line Regulation (%/V) = V OH V OL x 1 V OL V IH V IL V OH V OL I L C in.1 F 24 C O 1 F R L * Pulse Testing Required: Duty Cycle is suggested. Figure 3. Line Regulation and /Line Test Circuit 3

Load Regulation (% V O ) = V O (min Load) V O (max Load) V O (min Load) X 1 Load Regulation (mv) = V O (min Load) V O (max Load) V O (min Load) I L V O (max Load) C in.1 F 24 C O 1. F * R L (max Load) R L (min Load) * Pulse Testing Required: Duty Cycle is suggested. Figure 4. Load Regulation and /Load Test Circuit I L V I C in.1 F 24 V ref C O 1. F R L V O I SET Pulse Testing Required: Duty Cycle is suggested. To Calculate : = I SET 1.25 V Assume I SET = 5.25 ma Figure 5. Standard Test Circuit 24V 14V f = 12 Hz Vout = 1 V I L 24 D 1 * 1N42 R L C in.1 F C O 1. F V O 1.65K ** C Adj 1 F Figure 6. Ripple Rejection Test Circuit * D 1 Discharges C Adj if Output is Shorted to Ground. **C Adj provides an AC ground to the adjust pin. 4

IAdj, ADJUSTMENT PIN CURRENT ( μ A) Δ, OUTPUT VOLTAGE CHANGE (%).4.2.2.4.6.8 = 15 V = 1 V I L = A 1. 75 5 25 25 5 75 1 125 15 T J, JUNCTION TEMPERATURE ( C) 7 65 6 55 5 45 4 Figure 7. Load Regulation I L =.5 A 35 75 5 25 25 5 75 1 125 15 T J, JUNCTION TEMPERATURE ( C) Figure 9. ment Pin Current I out, OUTPUT CURRENT (A) VinVout, INPUTOUTPUT VOLTAGE DIFFERENTIAL (Vdc) 7 5 3 1 1 2 3 4, INPUT VOLTAGE DIFFERENTIAL (Vdc) 3. 2.5 2. T J = 15 C T J = 55 C Figure 8. Current Limit V = 1 mv I L = 3. A I L = 2. A I L = 5 ma I L = 2 ma I L = 2 ma 1. 75 5 25 25 5 75 1 125 15 T J, JUNCTION TEMPERATURE ( C) Figure 1. Dropout Voltage V ref, REFERENCE VOLTAGE (V) 1.26 1.25 1.24 1.23 1.22 75 5 25 25 5 75 1 125 15 T J, JUNCTION TEMPERATURE ( C) Figure 11. Temperature Stability IB, QUIESCENT CURRENT (ma) 5. 4.5 T J = 55 C 4. T 3.5 J = 25 C 3. T J = 15 C 2.5 2. 1..5 1 2 3 4, INPUTOUTPUT VOLTAGE DIFFERENTIAL (Vdc) Figure 12. Minimum Operating Current 5

1 14 RR, RIPPLE REJECTION (db) 8 6 4 2 = 5 V I L = 5 ma f = 12 Hz C Adj = 1 F Without C Adj RR, RIPPLE REJECTION (db) 12 1 8 6 4 2 = 5 V I L = 5 ma f = 12 Hz Without C Adj C Adj = 1 F 5 1 15 2 25 3 35.1.1 1 1, OUTPUT VOLTAGE (V) I out, OUTPUT CURRENT (A) Figure 13. Ripple Rejection versus Output Voltage Figure 14. Ripple Rejection versus Output Current 1 1 1 RR, RIPPLE REJECTION (db) 8 6 4 2 Without C Adj I L = 5 ma = 15 V = 1 V C Adj = 1 F ZO, OUTPUT IMPEDANCE (М Ω ) 1 1 1 1 2 = 15 V = 1 V I L = 5 ma Without C Adj C Adj = 1 F 1 1 1. k 1 k 1 k 1. M 1 M f, FREQUENCY (Hz) Figure 15. Ripple Rejection versus Frequency 1 3 1 1 1. k 1 k 1 k 1. M f, FREQUENCY (Hz) Figure 16. Output Impedance Δ, OUTPUT VOLTAGE DEVIATION (V) Δ, INPUT VOLTAGE CHANGE (V) 1..5.5 1. 1..5 = 1 V I L = 5 ma C L = 1. F; C Adj = 1 F C L = ; Without C Adj 1 2 3 4 t, TIME ( s) Δ, OUTPUT VOLTAGE DEVIATION (V) I L, LOAD CURRENT (A) 3 2 1 1 2 3 1..5 C L = 1. F; C Adj = 1 F C L = ; Without C Adj = 15 V = 1 V I NL = 5 ma 1 2 3 4 t, TIME ( s) I L Figure 17. Line Transient Response Figure 18. Load Transient Response 6

APPLICATIONS INFORMATION Basic Circuit Operation The is a threeterminal floating regulator. In operation, the develops and maintains a nominal 1.25 V reference (V ref ) between its output and adjustment terminals. This reference voltage is converted to a programming current (I PROG ) by (see Figure 19), and this constant current flows through to ground. The regulated output voltage is given by: = V ref (1 ) R 1 Since the current from the terminal ( ) represents an error term in the equation, the was designed to control to less than 1 A and keep it constant. To do this, all quiescent operating current is returned to the output terminal. This imposes the requirement for a minimum load current. If the load current is less than this minimum, the output voltage will rise. Since the is a floating regulator, it is only the voltage differential across the circuit which is important to performance, and operation at high voltages with respect to ground is possible. V ref = 1.25 V Typical V ref I PROG External Capacitors A.1 F disc or 1 F tantalum input bypass capacitor (C in ) is recommended to reduce the sensitivity to input line impedance. The adjustment terminal may be bypassed to ground to improve ripple rejection. This capacitor (C Adj ) prevents ripple from being amplified as the output voltage is increased. A 1 F capacitor should improve ripple rejection about 15 db at 12 Hz in a 1 V application. Although the is stable with no output capacitance, like any feedback circuit, certain values of external capacitance can cause excessive ringing. An output capacitance (C O ) in the form of a 1 F tantalum or 25 F aluminum electrolytic capacitor on the output swamps this effect and insures stability. Protection Diodes When external capacitors are used with any IC regulator, it is sometimes necessary to add protection diodes to prevent the capacitors from discharging through low current points into the regulator. Figure 18 shows the with the recommended protection diodes for output voltages in excess of 25 V or high capacitance values (C O > 25 F, C Adj > 1 F). Diode D 1 prevents C O from discharging thru the IC during an input short circuit. Diode D 2 protects against capacitor C Adj discharging through the IC during an output short circuit. The combination of diodes D 1 and D 2 prevents C Adj from discharging through the IC during an input short circuit. D 1 1N42 Figure 19. Basic Circuit Configuration Load Regulation The is capable of providing extremely good load regulation, but a few precautions are needed to obtain maximum performance. For best performance, the programming resistor ( ) should be connected as close to the regulator as possible to minimize line drops which effectively appear in series with the reference, thereby degrading regulation. The ground end of can be returned near the load ground to provide remote ground sensing and improve load regulation. C in C O D2 C Adj Figure 2. Voltage Regulator with Protection Diodes 1N42 7

D 6 1N42 V in 32V V (1) in1.1 F 1 1 R SC V I in2 V O out 2 V (2) O Current 1K Limit Q 1 2N3822 D 1 1N41 1N41 D 2 5.K 2 Voltage 1N41 24 D 5 IN41 D 3 1 F 1. F Tantalum 1V Diodes D 1 and D 2 and transistor Q 2 are added to allow adjustment of output voltage to V. Q 2 2N564 D 4 1N41 Output Range: V O 25 V I O A D 6 protects both s during an input short circuit. 1V Figure 21. Laboratory Power Supply with able Current Limit and Output Voltage 25V 62 I out D 1 * To provide current limiting of I 1 O D 2 to the system ground, the source of 1N41 the FET must be tied to a negative voltage below 1.25 V. 2N564 V ref I DSS V ref = V SS * I Omax I DSS V O < V (BR)DSS 1.25 V V SS I Lmin I DSS < I O < 3. A As shown O < I O < 1. A Figure 22. able Current Limiter D 1 1N41 72 1N42 12 MPS2222 1.k 1. F Minimum = 1.25 V D 1 protects the device during an input short circuit. TTL Control Figure 23. 5. V Electronic Shutdown Regulator I out 24 1N41 MPS297 5k 1 F Iout V ref R1 1.25 V 1 ma I out 3. A Figure 24. Slow TurnOn Regulator Figure 25. Current Regulator 8

PACKAGE DIMENSIONS TO22, SINGLE GAUGE T SUFFIX CASE 221AB1 ISSUE O H Q Z L V G B 4 1 2 3 N D A K F T U S R J C T SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. INCHES MILLIMETERS DIM MIN MAX MIN MAX A.57.62 14.48 15.75 B.38.45 9.66 1.28 C.16.19 4.7 4.82 D.25.35.64.88 F.142.147 3.61 3.73 G.95.15 2.42 2.66 H.11.155 2.8 3.93 J.18.25.46.64 K.5.562 12.7 14.27 L.45.6 1.15 2 N.19.21 4.83 5.33 Q.1.12 2.54 3.4 R.8.11 2.4 2.79 S.2.55.58 1.39 T.235.255 5.97 6.47 U..5. 1.27 V.45 1.15 Z.8 2.4 9

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 8217 USA Phone: 336752175 or 8344386 Toll Free USA/Canada Fax: 336752176 or 83443867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 82829855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 79 291 Japan Customer Focus Center Phone: 8135773385 1 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative /D