NCP1522B. 3 MHz, 600 ma Step-Down DC-DC Converter. High Efficiency, Low Ripple, Adjustable Output Voltage



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3 MHz, 600 ma Step-Down DC-DC Converter High Efficiency, Low Ripple, Adjustable Output Voltage The NCP522B step down DC DC converter is a monolithic integrated circuit optimized for portable applications powered from one cell Li Ion or three cell Alkaline/NiCd/NiMH batteries. The part, available in adjustable output voltage versions ranging from 0.9 V to 3.3 V, is able to deliver up to 600 ma. It uses synchronous rectification to increase efficiency and reduce external part count. The device also has a built in 3 MHz (nominal) oscillator which reduces component size by allowing smaller inductors and capacitors. Automatic switching PWM/PFM mode offers improved system efficiency. Additional features include integrated soft start, cycle by cycle current limiting and thermal shutdown protection. The NCP522B is available in a space saving, low profile TSOP5 and UDFN6 packages. Features Up to 93% Efficiency Allow Use of Small External Components Source up to 600 ma 3 MHz Switching Frequency Adjustable Output Voltage from 0.9 V to 3.3 V Synchronous Rectification for Higher Efficiency 2.7 V to 5.5 V Input Voltage Range Low Quiescent Current Shutdown Current Consumption of 0.3 A Thermal Limit Protection Short Circuit Protection All Pins are Fully ESD Protected These are Pb Free Devices Typical Applications Cellular Phones, Smart Phones and PDAs Digital Still/Video Cameras MP3 Players and Portable Audio Systems Wireless and DSL Modems Portable Equipment USB Powered Devices 5 TSOP 5 SN SUFFIX CASE 483 ORDERING INFORMATION MARKING DIAGRAM GAN = Specific Device Code A = Assembly Location Y = Year W = Work Week = Pb Free Package (Note: Microdot may be in either location) Device Package Shipping NCP522BSNTG UDFN6 MU SUFFIX CASE 57AB TSOP 5 (Pb Free) 3000/Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD80/D. 5 GANAYW 2 3 BRM BR = Specific Device Code M = Date Code = Pb Free Package (Note: Microdot may be in either location) NCP522BMUTBG UDFN6 (Pb Free) 6 5 4 3000/Tape & Reel VIN L VIN LX 5 CIN COUT 2 GND OFF ON 3 EN FB 4 Figure. Typical Application TSOP 5 VOUT R R2 Cff OFF VIN ON R2 EN FB 6 Cff L R 2 GND LX 5 VOUT 3 VIN GND 4 COUT CIN Figure 2. Typical Application UDFN6 Semiconductor Components Industries, LLC, 200 December, 200 Rev. Publication Order Number: NCP52B/D

EFFICIENCY (%) 00 95 90 85 80 75 70 65 60 55 50 0 00 200 300 400 500 600 I OUT, OUTPUT CURRENT (ma) = 3.3 V V IN = 4.2 V T A = 25 C Figure 3. Efficiency vs. Output Current Q V battery 4.7 F VIN PWM/PFM CONTROL Q2 LX 5 2.2 H 4.7 F GND 2 I LIMIT R 8 pf Enable EN 3 LOGIC CONTROL & THERMAL SHUTDOWN FB 4 REFERENCE VOLTAGE R2 Figure 4. Simplified Block Diagram 2

PIN FUNCTION DESCRIPTION Pin TSOP 5 Pin UDFN6 Pin Name Type Description 3 VIN Analog / Power Input 2 2, 4 GND Analog / Power Ground Power supply input for the PFET power stage, analog and digital blocks. The pin must be decoupled to ground by a 0 F ceramic capacitor. This pin is the GND reference for the NFET power stage and the analog section of the IC. The pin must be connected to the system ground. 3 EN Digital Input Enable for switching regulators. This pin is active HIGH and is turned off by logic LOW on this pin. 4 6 FB Analog Input Feedback voltage from the output of the power supply. This is the input to the error amplifier. 5 5 LX Analog Output Connection from power MOSFETs to the Inductor. PIN CONNECTIONS VIN 5 LX EN 6 FB GND 2 GND 2 5 LX EN 3 4 FB VIN 3 4 GND (Top View) Figure 5. Pin Connections TSOP 5 Figure 6. Pin Connections UDFN6 MAXIMUM RATINGS Rating Symbol Value Unit Minimum Voltage All Pins V min 0.3 V Maximum Voltage All Pins (Note 2) V max 7.0 V Maximum Voltage EN, FB, LX V max VIN + 0.3 V Thermal Resistance, Junction to Air (with Recommended Soldering Footprint) TSOP 5 UDFN6 R JA 300 260 Operating Ambient Temperature Range T A 40 to 85 C Storage Temperature Range T stg 55 to 50 C Junction Operating Temperature T j 40 to 25 C Latchup Current Maximum Rating (T A = 85 C) (Note 4) Other Pins Lu 00 ma ESD Withstand Voltage (Note 3) Human Body Model Machine Model V esd 2.0 200 Moisture Sensitivity Level (Note 5) MSL per IPC Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at T A = 25 C. 2. According to JEDEC standard JESD22 A08B. 3. This device series contains ESD protection and exceeds the following tests: Human Body Model (HBM) per JEDEC standard: JESD22 A4. Machine Model (MM) per JEDEC standard: JESD22 A5. 4. Latchup current maximum rating per JEDEC standard: JESD78. 5. JEDEC Standard: J STD 020A. C/W kv V 3

ELECTRICAL CHARACTERISTICS (Typical values are referenced to T A = +25 C, Min and Max values are referenced 40 C to +85 C ambient temperature, unless otherwise noted, operating conditions V IN = 3.6 V, =.2 V, unless otherwise noted.) Rating TSOP Pin UDFN Symbol Min Typ Max Unit VIN PIN Input Voltage Range 3 V IN 2.7 5.5 V Quiescent Current, PFM No Switching 3 I q ON 50 90 A Standby Current, EN Low 3 I q OFF 0.2.5 A Under Voltage Lockout (V IN Falling) 3 V UVLO 2.2 2.4 2.55 V EN PIN Positive Going Input High Voltage Threshold, EN0 Signal 3 V IH.2 V Negative Going Input High Voltage Threshold, EN0 Signal 3 V IL 0.4 V EN High Input Current, EN = 3.6 V 3 I ENH 2.0 A OUTPUT Output Voltage Accuracy (Note 6) Ambient Temperature Overtemperature Range Minimum Output Voltage (Note 7) 0.9 V Maximum Output Voltage 3.3 V Output Voltage Load Regulation Overtemperature I OUT = 00 ma to 600 ma 3.0.0 2.0 3.0 0.0008 % %/ma Load Transient Response, Rise/Falltime s 0 ma to 00 ma Load Step 200 ma to 600 ma Load Step Output Voltage Line Regulation, I OUT = 00 ma, V IN = 2.7 V to 5.5 V Line Transient Response, I OUT = 00 ma, 3.6 V to 3.0 V Line Step (Falltime=50 s) 50 54 0.08 2.0 mv % mv PP Output Voltage Ripple, I OUT = 300 ma (PWM Mode).0 mv Output Voltage Ripple, I OUT = 0 ma (PFM Mode) 8.0 mv Peak Inductor Current 5 5 I LIM 200 ma Oscillator Frequency 5 5 F OSC 2.4 3.0 3.6 MHz Duty Cycle 5 5 00 % Soft Start Time T START 320 500 s Thermal Shutdown Threshold T SD 60 C Thermal Shutdown Hysteresis T SDH 25 C POWER SWITCHES P Channel On Resistance RLxH 400 m N Channel On Resistance RLxL 400 m P Channel Leakage Current I LeakH 0.05 A N Channel Leakage Current I LeakL 0.0 A 6. The overall output voltage tolerance depends upon the accuracy of the external resistor (R, R2). 7. For = 0.9 V, maximum input voltage do not exceed 5.2 V. 4

TABLE OF GRAPHS Typical Characteristics for Step down Converter Figure I STB Standby Current vs. Input Voltage 7 I q Quiescent Current, PFM No Switching vs. Input Voltage 8 Output Voltage Accuracy vs. Temperature 9, 0 Eff Efficiency vs. Output Current, 2, 3 Freq Switching Frequency vs. Input Voltage 4 Soft Start vs. Time 5 Short Circuit Protection vs. Time 6 Line Regulation vs. Input Voltage 7, 8 Line Transient vs. Time 9, 20 Load Regulation vs. Output Current 2, 22 Load Transient vs. Time 23, 24, 25, 26 0.9 56 STANDBY CURRENT ( A) 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0. QUIESCENT CURRENT ( A) 54 52 50 48 46 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 44 2.5 3.0 3.5 4.0 4.5 5.0 5.5 V IN, INPUT VOLTAGE (V) Figure 7. Shutdown Current vs. Supply Voltage V IN, INPUT VOLTAGE (V) Figure 8. Quiescent Current PFM No Switching vs. Supply Voltage 5

3.0 3.0 2.0 I OUT = 600 ma 2.0 ACCURACY (%).0 0.0 I OUT = 200 ma I OUT = 20 ma ACCURACY (%).0 0.0 V IN = 3.6 V V IN = 2.7 V V IN = 5.5 V 2.0 2.0 3.0 0 20 40 60 80 00 20 TEMPERATURE ( C) Figure 9. Output Voltage Accuracy vs. Temperature (V IN = 3.6 V, =.2 V) 3.0 0 20 40 60 80 00 20 TEMPERATURE ( C) Figure 0. Output Voltage Accuracy vs. Temperature ( =.2 V, I OUT = 200 ma) 00 00 95 95 EFFICIENCY (%) 90 85 80 75 70 65 = 0.9 V = 3.3 V =.8 V EFFICIENCY (%) 90 85 80 75 70 65 V IN = 5.5 V V IN = 3.6 V V IN = 2.7 V 60 60 55 55 50 0 00 200 300 400 500 600 50 0 00 200 300 400 500 600 I OUT, OUTPUT CURRENT (ma) I OUT, OUTPUT CURRENT (ma) Figure. Efficiency vs. Output Current (V IN = 3.6 V, T A = 25 C) Figure 2. Efficiency vs. Output Current ( =.2 V, T A = 25 C) EFFICIENCY (%) 00 95 90 85 80 75 70 65 60 55 25 C 40 C 85 C 50 0 00 200 300 400 500 600 I OUT, OUTPUT CURRENT (ma) Figure 3. Efficiency vs. Output Current (V IN = 3.6 V, =.2 V) FREQUENCY (MHz) 3.6 3.4 3.2 3 2.8 2.6 40 C 25 C 85 C 2.4 2.5 3 3.5 4 4.5 5 5.5 V IN, INPUT VOLTAGE (V) Figure 4. Switching Frequency vs. Input Voltage ( =.2 V, I OUT = 300 ma) 6

V IN 2 V/div 500 mv/div I LX 00 mv/div I LX 500 mv/div Time 00 s/div Time 0 ms/div 200 mv/div Figure 5. Typical Soft Start ( =.2 V, I OUT = 250 ma) Figure 6. Short Circuit Protection (V IN = 3.6 V, =.2 V) 0.8 0.8 LINE REGULATION (%) 0.6 0.4 0.2 0 0.2 0.4 0.6 85 C 40 C 25 C LINE REGULATION (%) 0.6 0.4 0.2 0 0.2 0.4 0.6 I OUT = 600 ma I OUT = ma I OUT = 300 ma 0.8 0.8 2.7 3.2 3.7 4.2 4.7 5.2 2.7 3.2 3.7 4.2 4.7 5.2 V IN, INPUT VOLTAGE (V) Figure 7. Line Regulation ( =.2 V, I OUT = 300 ma) V IN, INPUT VOLTAGE (V) Figure 8. Line Regulation ( =.2 V, T A = 25 C) V IN 0.5 V/div V IN 0.5 V/div 20 mv/div 20 mv/div Figure 9. 3.0 V to 3.6 V Line Transient (Risetime = 50 s, =.2 V, I OUT = 00 ma, T A = 25 C) Figure 20. 3.6 V to 3.0 V Line Transient (Risetime = 50 s, =.2 V, I OUT = 00 ma, T A = 25 C) 7

3.0 3.0 LOAD REGULATION (%) 2.0.0 0.0.0 2.0 40 C 25 C 85 C LOAD REGULATION (%) 2.0.0 0.0.0 2.0 V IN = 5.5 V V IN = 2.7 V V IN = 3.6 V 3.0 0 00 200 300 400 500 600 I OUT, OUTPUT CURRENT (ma) Figure 2. Load Regulation (V IN = 3.6 V, =.2 V) 3.0 0 00 200 300 400 500 600 I OUT, OUTPUT CURRENT (ma) Figure 22. Load Regulation ( =.2 V, T A = 25 C) I OUT 50 ma/div 20 mv/div 20 mv/div I OUT 20 ma/div Figure 23. 0 ma to 00 ma Load Transient (V IN = 3.6 V, =.2 V, T A = 25 C) Figure 24. 00 ma to 0 ma Load Transient (V IN = 3.6 V, =.2 V, T A = 25 C) 20 mv/div 20 mv/div I OUT 200 ma/div I OUT 200 ma/div Figure 25. 200 ma to 600 ma Load Transient (V IN = 3.6 V, =.2 V, T A = 25 C) Figure 26. 600 ma to 200 ma Load Transient (V IN = 3.6 V, =.2 V, T A = 25 C) 8

DC/DC OPERATION DESCRIPTION Detailed Description The NCP522B uses a constant frequency, voltage mode step down architecture. Both the main (P Channel MOSFET) and synchronous (N Channel MOSFET) switches are internal. The output voltage is set by an external resistor divider in the range of 0.9 V to 3.3 V and can source at least 600 ma. The NCP522B works with two modes of operation; PWM/PFM depending on the current required. In PWM mode, the device can supply voltage with a tolerance of 3% and 90% efficiency or better. Lighter load currents cause the device to automatically switch into PFM mode to reduce current consumption and extended battery life. Additional features include soft start, undervoltage protection, current overload protection, and thermal shutdown protection. As shown in Figure, only six external components are required. The part uses an internal reference voltage of 0.6 V. It is recommended to keep NCP522B in shutdown mode until the input voltage is 2.7 V or higher. PWM Operating Mode In this mode, the output voltage of the device is regulated by modulating the on time pulse width of the main switch Q at a fixed 3 MHz frequency. The switching of the PMOS Q is controlled by a flip flop driven by the internal oscillator and a comparator that compares the error signal from an error amplifier with the sum of the sensed current signal and compensation ramp. The driver switches ON and OFF the upper side transistor (Q) and switches the lower side transistor in either ON state or in current source mode. At the beginning of each cycle, the main switch Q is turned ON by the rising edge of the internal oscillator clock. The inductor current ramps up until the sum of the current sense signal and compensation ramp becomes higher than the error amplifier s voltage. Once this has occurred, the PWM comparator resets the flip flop, Q is turned OFF while the synchronous switch Q2 is turned in its current source mode. Q2 replaces the external Schottky diode to reduce the conduction loss and improve the efficiency. To avoid overall power loss, a certain amount of dead time is introduced to ensure Q is completely turned OFF before Q2 is being turned ON. 0 mv/div I Lx 00 ma/div V Lx 2 V/div 200 ns/div Figure 27. PWM Switching Waveform (V IN = 3.6 V, =.2 V, I OUT = 600 ma) PFM Operating Mode Under light load conditions, the NCP522B enters in low current PFM mode operation to reduce power consumption. The output regulation is implemented by pulse frequency modulation. If the output voltage drops below the threshold of PFM comparator, a new cycle will be initiated by the PFM comparator to turn on the switch Q. Q remains ON during the minimum on time of the structure while Q2 is in its current source mode. The peak inductor current depends upon the drop between input and output voltage. After a short dead time delay where Q is switched OFF, Q2 is turned in its ON state. The negative current detector will detect when the inductor current drops below zero and sends the signal to turn Q2 to current source mode to prevent a too large deregulation of the output voltage. When the output voltage falls below the threshold of the PFM comparator, a new cycle starts immediately. V out V Lx Figure 28. PFM Switching Waveforms (V IN = 3.6 V, =.2 V, I OUT = 0 ma, Temp = 25 C) 9

Soft Start The NCP522B uses soft start to limit the inrush current when the device is initially powered up or enabled. Soft start is implemented by gradually increasing the reference voltage until it reaches the full reference voltage. During startup, a pulsed current source charges the internal soft start capacitor to provide gradually increasing reference voltage. When the voltage across the capacitor ramps up to the nominal reference voltage, the pulsed current source will be switched off and the reference voltage will switch to the regular reference voltage. Cycle by Cycle Current Limitation From the block diagram, an I LIM comparator is used to realize cycle by cycle current limit protection. The comparator compares the LX pin voltage with the reference voltage, which is biased by a constant current. If the inductor current reaches the limit, the I LIM comparator detects the LX voltage falling below the reference voltage and releases the signal to turn off the switch Q. The cycle by cycle current limit is set at 200 ma (nom). Low Dropout Operation The NCP522B offers a low input to output voltage difference. The NCP522B can operate at 00% duty cycle. In this mode the PMOS (Q) remains completely on. The minimum input voltage to maintain regulation can be calculated as: VIN(min) VOUT(max) (IOUT (RDS(ON) RINDUCTOR)) : Output Voltage (Volts) I OUT : Max Output Current R DS(ON) = P Channel Switch R DS(ON) R INDUCTOR : Inductor Resistance (DCR) (eq. ) Undervoltage Lockout The input voltage V IN must reach 2.4 V (typ) before the NCP522B enables the DC/DC converter output to begin the start up sequence (see Soft Start section). The UVLO threshold hysteresis is typically 00 mv. Shutdown Mode Forcing this pin to a voltage below 0.4 V will shut down the IC. In shutdown mode, the internal reference, oscillator and most of the control circuitries are turned off. Therefore, the typical current consumption will be 0.3 A (typical value). Applying a voltage above.2 V to EN pin will enable the device for normal operation. The typical threshold is around 0.7 V. The device will go through soft start to normal operation. Thermal Shutdown Internal Thermal Shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. If the junction temperature exceeds 60 C, the device shuts down. In this mode switch Q and Q2 and the control circuits are all turned off. The device restarts in soft start after the temperature drops below 35 C. This feature is provided to prevent catastrophic failures from accidental device overheating, and it is not intended as a substitute for proper heatsinking. Short Circuit Protection When the output is shorted to ground, the device limits the inductor current. The duty cycle is minimum and the consumption on the input line is 300 ma (Typ). When the short circuit condition is removed, the device returns to the normal mode of operation. 0

APPLICATION INFORMATION Output Voltage Selection The output voltage is programmed through an external resistor divider connected from to FB then to GND. For low power consumption and noise immunity, the resistor from FB to GND (R2) should be in the [00 k 600 k] range. If R2 is 200 k given the V FB is 0.6 V, the current through the divider will be 3.0 A. The formula below gives the value of, given the desired R and the R value: VOUT VFB ( R R2 ) (eq. 2) : Output Voltage (Volts) V FB : Feedback Voltage = 0.6 V R: Feedback Resistor from to FB R2: Feedback Resistor from FB to GND Input Capacitor Selection In PWM operating mode, the input current is pulsating with a large switching noise. Using an input bypass capacitor can reduce the peak current transients drawn from the input supply source, thereby reducing switching noise significantly. The capacitance needed for the input bypass capacitor depends on the source impedance of the input supply. The maximum RMS current occurs at 50% duty cycle with maximum output current, which is I out_max /2. For NCP522B, a low profile ceramic capacitor of 4.7 F should be used for most of the cases. For effective bypass results, the input capacitor should be placed as close as possible to the V IN pin. Table. List of Input Capacitors Murata GRM88R60J475KE GRM2BR7C475KA 4.7 F Taiyo Yuden JMK22BY475MG 4.7 F TDK C202X5ROJ475KB C632X5ROJ475KT 4.7 F Output L C Filter Design Considerations The NCP522B operates at 3 MHz frequency and uses voltage mode architecture. The correct selection of the output filter ensures good stability and fast transient response. Due to the nature of the buck converter, the output L C filter must be selected to work with internal compensation. For NCP522B, the internal compensation is internally fixed and it is optimized for an output filter of L = 2.2 H and C OUT = 4.7 F. The corner frequency is given by: fc 49 khz 2 L COUT 2 2.2 H 4.7 F (eq. 3) The device is intended to operate with inductance value of 2.2 H. If the corner frequency is moved, it is recommended to check the loop stability depending on the accepted output ripple voltage and the required output curret. Take care to check the loop stability. The phase margin is usually higher than 45. Table 2. L C Filter Example Inductance (L) Output Capacitor (C OUT ).0 H 0 F 2.2 H 4.7 F Inductor Selection The inductor parameters directly related to device performances are saturation current and DC resistance and inductance value. The inductor ripple current ( I L ) decreases with higher inductance: IL L fsw (eq. 4) VIN I L: Peak to Peak Inductor Ripple Current L: Inductor Value f SW: Switching Frequency The saturation current of the inductor should be rated higher than the maximum load current plus half the ripple current: IL(MAX) IO(MAX) I L 2 (eq. 5) I L(MAX): Maximum Inductor Current I O(MAX): Maximum Output Current The inductor s resistance will factor into the overall efficiency of the converter. For best performance, the DC resistance should be less than 0.3 for good efficiency. Table 3. LIST OFINDUCTORS Coilcraft FDK TDK Taiyo Yuden DO605 T Series LPO300 Series MIPW3226 Series VLF300AT Series LQ CBL202 Series

Output Capacitor Selection Selecting the proper output capacitor is based on the desired output ripple voltage. Ceramic capacitors with low ESR values will have the lowest output ripple voltage and are strongly recommended. The output capacitor requires an X7R dielectric. The output ripple voltage in PWM mode is given by: VOUT IL ESR (eq. 6) 4 fsw COUT : Output Voltage Ripple in PWM Mode I L: Peak to Peak Inductor Ripple Current f SW : Switching Frequency C OUT : Output Capacitor ESR: Output Capacitor Serial Resistor Table 4. LIST OF OUTPUT CAPACITORS Murata Taiyo Yuden TDK GRM88R60J475KE GRM2BR7C475KA GRM88R60OJ06ME GRM2BR60J06ME9L JMK22BY475MG JMK22BJ06MG C202X5ROJ475KB C632X5ROJR75KT C202X5ROJ06K 4.7 F 0 F 4.7 F 0 F 4.7 F 0 F Feed Forward Capacitor Selection The feed forward capacitor sets the feedback loop response and is critical to obtain good loop stability. Given that the compensation is internally fixed, an 8 pf or higher ceramic capacitor is needed. Choose a small ceramic capacitor X7R dielectric. 2

PACKAGE DIMENSIONS TSOP 5 CASE 483 02 ISSUE H 2X 2X NOTE 5 0.0 T 0.20 T L 0.05 5 4 2 3 H G A B C T D 5X S 0.20 SEATING PLANE C A B J K DETAIL Z M DETAIL Z NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y4.5M, 994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. MILLIMETERS DIM MIN MAX A 3.00 BSC B.50 BSC C 0.90.0 D 0.25 0.50 G 0.95 BSC H 0.0 0.0 J 0.0 0.26 K 0.20 0.60 L.25.55 M 0 0 S 2.50 3.00 SOLDERING FOOTPRINT* 0.95 0.037.9 0.074 2.4 0.094.0 0.039 0.7 0.028 SCALE 0: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 3

PACKAGE DIMENSIONS UDFN6 2x2, 0.65P CASE 57AB 0 ISSUE B D A B NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y4.5M, 994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. 2X PIN ONE REFERENCE 0.0 C 2X 0.0 C ÍÍÍ ÍÍÍ ÍÍÍ E MILLIMETERS DIM MIN MAX A 0.45 0.55 A 0.00 0.05 A3 0.27 REF b 0.25 0.35 D 2.00 BSC D2.50.70 E 2.00 BSC E2 0.80.00 e 0.65 BSC K L 0.20 0.25 --- 0.35 6X 0.0 C 0.08 C A A3 A C SEATING PLANE SOLDERING FOOTPRINT* 0.95 6X 0.47 6X 0.40 D2 6X L 3 e 4X.70 E2 2.30 0.65 PITCH 6X K 6 4 BOTTOM VIEW 6X b 0.0 C 0.05 C A B DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 8027 USA Phone: 303 675 275 or 800 344 3860 Toll Free USA/Canada Fax: 303 675 276 or 800 344 3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800 282 9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 42 33 790 290 Japan Customer Focus Center Phone: 8 3 5773 3850 4 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your loca Sales Representative NCP522B/D