PART MAX5480BEEE MAX5480AEEE TOP VIEW CS D0 (LSB)

Transcription

1 9-; Rev ; /97 General Description The is a CMOS, -bit digital-to-analog converter (DAC) that interfaces directly with most microprocessors. On-chip input latches make the DAC load cycle interface similar to a RAM write cycle, where and are the only control inputs required. Linearity of ±/ is guaranteed, and power coumption is less than 5µW. Monotonicity is guaranteed over the full operating temperature range. The can be operated in either voltage-output or current-output mode. It is available in a small 6-pin QSOP package. Applicatio Digitally Adjusted Power Supplies -Bit Parallel DAC in QSOP-6 Package Features QSOP-6 Package (same footprint as SO-) Single +5V Supply Operation VOUT or IOUT Operation -Bit Parallel Interface Guaranteed Monotonic Over Temperature Low Power Coumption µa max ±/ Linearity Over Temperature Ordering Information Programmable Gain Automatic Test Equipment PART ACEE TEMP. RANGE C to +7 C PIN- PACKAGE 6 QSOP ERROR () ±/ Portable, Battery-Powered Itruments BCEE C to +7 C 6 QSOP ±/ VCO Frequency Control RF Tramit Control in Portable Radios AEEE BEEE -4 C to +5 C -4 C to +5 C 6 QSOP 6 QSOP ±/ ±/ Typical Operating Circuit Pin Configuration V TOP VIEW DATA INPUTS 4 5 D7 D R k 4 6 OUT R k pf MAX4 V OUT OUT D7 (MSB) D6 D5 D4 D D () D D R AND R USED ONLY IF GAIN ADJUSTMENT IS REQUIRED. QSOP Maxim Integrated Products For free samples & the latest literature: or phone For small orders, phone ext. 46.

2 QSOP-6 Package ABSOLUTE MAXIMUM RATINGS to...-.v to +7V to...±5v to...±5v Digital Inputs to...-.v to ( +.V) OUT, to...-.v to Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditio beyond those indicated in the operational sectio of the specificatio is not implied. Exposure to absolute maximum rating conditio for extended periods may affect device reliability. ELECTRICAL CHARACTERISTI Operating Temperature Ranges _CEE... C to +7 C _EEE...-4 C to +5 C Storage Temperature Range C to +6 C Continuous Power Dissipation (T A = +7 C) EE (derate.mw/ C above +7 C)...667mW Lead Temperature (soldering sec)...+ C ( = +5V, V = +V, V OUT = V = V, Circuit of Figure,, unless otherwise noted.) Resolution PARAMETER DC ACCURACY Relative Accuracy Differential Nonlinearity Gain Error (Note ) Gain Temperature Coefficient (Note ) Supply Rejection Output Leakage Current (I OUT ) Output Leakage Current (I ) ERENCE INPUT Input Resistance DYNAMIC PERFORMANCE SYMBOL INL DNL PSR R All grades guaranteed monotonic over temperature pin 5 to CONDITIONS MIN TYP MAX ±/ A.. (Note )..6 %FSR/%. B. V = ±V ±5 DAC code = full scale ±4 na V = ±V ±5 DAC code = zero scale ±4 na ± ± ± 5 UNITS Bits ppm/ C kω Output Current Settling Time to / D D7 = V to or to V, = = V, OUT load = Ω pf A (Note ) B AC Feedthrough (OUT or ) V = ±V, khz sine wave, = = V A (Note ) B..5.5 ANALOG OUTPUTS OUT Capacitance (Note ) Capacitance (Note ) C OUT C D D7 =, = = V D D7 = V, = = V D D7 =, = = V D D7 = V, = = V pf pf

3 QSOP-6 Package ELECTRICAL CHARACTERISTI (continued) ( = +5V, V = +V, V OUT = V = V, Circuit of Figure,, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DIGITAL INPUTS Input High Voltage V IH.4 V Input Low Voltage V IL. V ; V IN = V to ± Input Current I IN ± Input Capacitance (Note ) C IN D D7, POWER REQUIREMENTS Supply Current I DD Digital inputs at V or 5 SWITCHING CHARACTERISTI (Figure 4) Chip-Select to Write- A t Setup Time B 5 Chip-Select to Write- A t CH Hold Time B Write Pulse Width t A B 5 Data-Setup Time t DS A 7 B 55 Data-Hold Time t DH A B -7 µa pf µa Note : Gain error is measured using internal feedback resistor. Full-scale range (FSR) = V. Note : Gain TempCo measured from +5 C to T MAX and from +5 C to T MIN. Note : Guaranteed by design. Pin Description PIN NAME OUT R-R Ladder Output R-R Ladder Output, complement of OUT Ground 4 D7 D Data Inputs, D7 is the most significant bit. Chip Select Input. Active Low. Write Control Input. Active Low. 4 Power Supply Input, +5V 5 Reference Voltage Input 6 Feedback Resistor Connection FUNCTION

4 QSOP-6 Package Detailed Description The is an -bit multiplying digital-to-analog converter (DAC) that coists of a thin-film R-R resistor array with CMOS current steering switches. Figure shows a simplified schematic of the DAC. The inverted R-R ladder divides the voltage or current reference in a binary manner among the eight steering switches. The magnitude of the current appearing at either OUT terminal depends on the number of switches selected; therefore, the output is an analog representation of the digital input. The two OUT terminals must be held at the same potential so a cotant current is maintained in each ladder leg. This makes the input current independent of switch state and also eures that the maintai its excellent linearity performance. Interface-Logic Information Mode Selection The inputs and control the s operating mode (see Table ). Write Mode When and are both low, the is in write mode, and its analog output responds to data activity at the D D7 data-bus inputs. In this mode, the data latches are traparent (see Tables and ). Hold Mode In hold mode, the retai the data that was present on D D7 just prior to or assuming a high state. The analog output remai at the value corresponding to the digital code locked in the data latch. Applicatio Information Using the in Voltage- Output Mode (Single Supply) The can be used either as a current-output DAC (Figures and 6) or as a voltage-output DAC (Figures and 5). To use the in voltage mode, connect OUT to the reference input and connect to ground., now the DAC output, is a voltage source with a cotant output resistance of kω (nominally). This output is often buffered with an op amp (Figure 5). An advantage of voltage-mode operation is singlesupply operation for the complete circuit; i.e., a negative reference is not required for a positive output. It is important to note that the range of the reference is restricted in voltage mode. The reference input (voltage at OUT) must always be positive and is limited to no more than - V. If the reference voltage exceeds this value, linearity is degraded. DATA INPUTS 4 L H X L X H 5 V D7 D R k 4 6 R FB OUT R k pf MAX4 R AND R USED ONLY IF GAIN ADJUSTMENT IS REQUIRED. V OUT Figure. Unipolar Binary Operation (Two-Quadrant Multiplication) INPUT* *( - V, max) OUT 6 +5V 4 D7 D 4 5 OUTPUT VOLTAGE (kω OUTPUT RESISTANCE) Figure. Typical Operating Circuit (Voltage Mode Unbuffered) Table. Mode-Selection Table MODE Write Hold Hold DAC Respoe DAC responds to data bus (D D7) inputs. Data bus (D D7) is locked out; DAC holds last data present when or assumed high state. L = Low State, H = High State, X = Don t Care 4

5 QSOP-6 Package Table. Unipolar Binary Code Table DIGITAL INPUT MSB ANALOG OUTPUT 55 -V V 56 Table. Bipolar (Offset Binary) Code Table DIGITAL INPUT MSB ANALOG OUTPUT +V 7 +V -V 56 = V 7 -V 56 -V -V 56 -V 7 -V = 56 -V NOTE : = V V 56 ( ) = ( ) 7 NOTE : = V V ( ) = ( ) kω S kω kω kω kω kω kω kω S7 S6 S t t t CH t DS D7 (MSB) INTERFACE LOGIC D6 D5 D () kω OUT (D7 D) V IH V IL STABLE NOTES:. FOR THE, ALL INPUT SIGNAL RISE AND FALL TIMES ARE MEASURED FROM % TO 9% OF. = +5V, t r = t f =.. TIMING MEASUREMENT ERENCE LEVEL IS (V IH + V IL ) /. t DH Figure. Functional Diagram Figure 4. Write-Cycle Timing Diagram 5

6 QSOP-6 Package +5V V IN MAX6 V OUT +.V N.C. 6 4 OUT 5.µF MAX4 V V OUT.4V (55/56) D7 D 4 k k Figure 5. Single-Supply Voltage-Output Mode (Buffered) ±V (AC OR DC) V DATA INPUTS 4 R kω D7 D OUT R kω C A / MXL TO -V R kω R4 kω R5 kω A / MXL V OUT R6 5kΩ NOTES:. ADJUST R FOR V OUT = V AT CODE.. C PHASE COMPENSATION (pf to 5pF) MAY BE REQUIRED IF A IS A HIGH-SPEED AMPLIFIER. Figure 6. Bipolar (Four-Quadrant) Operation Maxim cannot assume respoibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licees are implied. Maxim reserves the right to change the circuitry and specificatio without notice at any time. 6 Maxim Integrated Products, San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.