IR2117(S)/IR2118(S) & (PbF)
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- Darrell Haynes
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1 Data Sheet No. PD14 Rev N IR2117(S)/IR211(S) & (PbF) Features Floating channel designed for bootstrap operation Fully operational to +V Tolerant to negative transient voltage dv/dt immune Gate drive supply range from 1 to 2V Undervoltage lockout CMOS Schmitt-triggered inputs with pull-down Output in phase with input (IR2117) or out of phase with input (IR211) Also available LEAD-FREE Description The IR2117/IR211(S) is a high voltage, high speed power MOSFET and IGBT driver. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS outputs. The output driver features a high pulse current buffer stage designed for minimum cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high or low side configuration which operates up to volts. Typical Connection SGLE CHANNEL DRIVER Product Summary V OFFSET I O +/- V OUT t on/off (typ.) Packages -Lead PDIP IR2117/IR211 V max. 2 ma / 42 ma 1-2V 125 & 15 ns -Lead SOIC IR2117S/IR211S up to V COM V S TO LOAD IR2117 up to V (Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. COM V S IR211 TO LOAD 1
2 Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figures 5 through. Symbol Definition Max. Units High side floating supply voltage V S High side floating supply offset voltage V High side floating output voltage V S Logic supply voltage V Logic input voltage dv s /dt Allowable offset supply voltage transient (figure 2) 5 V/ns P D Package power T A +25 C ( lead PDIP) 1. ( lead SOIC).25 W Rth JA Thermal resistance, junction to ambient ( lead PDIP) 125 C/W ( lead SOIC) 2 T J Junction temperature 15 T S Storage temperature T L Lead temperature (soldering, 1 seconds) 3 V C Recommended Operating Conditions The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The V S offset rating is tested with all supplies biased at 15V differential. Symbol Definition Max. Units High side floating supply absolute voltage V S + 1 V S + 2 V S High side floating supply offset voltage Note 1 V High side floating output voltage V S V Logic supply voltage 1 2 V Logic input voltage T A Ambient temperature C Note 1: Logic operational for V S of -5 to +V. Logic state held for V S of -5V to -S. (Please refer to the Design Tip DT97-3 for more details). 2
3 Dynamic Electrical Characteristics IAS (, S ) = 15V, C L = 1 pf and T A = 25 C unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Figure 3. Symbol Definition Max. Units Test Conditions t on Turn-on propagation delay V S = V t off Turn-off propagation delay 15 1 V S = V ns t r Turn-on rise time 13 t f Turn-off fall time 4 5 Static Electrical Characteristics IAS (, S ) = 15V and T A = 25 C unless otherwise specified. The V, V TH and I parameters are referenced to COM. The V O and I O parameters are referenced to COM and are applicable to the respective output leads: or LO. Symbol Definition Max. Units Test Conditions V IH input voltage - logic 1 (IR2117) logic (IR211) 9.5 V IL Input voltage - logic (IR2117) logic 1 (IR211). V OH High level output voltage, IAS - V O 1 I O = A mv V OL Low level output voltage, V O 1 I O = A I LK Offset supply leakage current 5 = V S = V I QBS Quiescent S supply current 5 24 V = V or I QCC Quiescent Supply Current 7 34 V = V or I + Logic 1 input bias current (IR2117) 2 4 µa V = (IR211) V = V I - Logic input bias current (IR2117) 1. V = V (IR211) V = SUV+ S supply undervoltage positive going threshold SUV- S supply undervoltage negative going threshold V UV+ supply undervoltage positive going threshold UV- supply undervoltage negative going threshold I O+ Output high short circuit pulsed current 2 25 V O = V V = Logic 1 PW 1 µs ma I O- Output low short circuit pulsed current 42 5 V O = 15V V = Logic PW 1 µs V 3
4 Functional Block Diagram (IR2117) PULSE GEN HV LEVEL SHIFT UV DETECT PULSE FILTER R R S Q V S UV DETECT COM Functional Block Diagram (IR211) HV LEVEL SHIFT UV DETECT PULSE FILTER R R S Q PULSE GEN V S UV DETECT COM 4
5 Lead Definitions Symbol Description COM V S Logic and gate drive supply Logic input for gate driver output (), in phase with (IR2117) Logic input for gate driver output (), out of phase with (IR211) Logic ground High side floating supply High side gate drive output High side floating supply return Lead Assignments COM V S 3 COM V S Lead PDIP Lead SOIC IR2117 IR2117S COM V S 3 COM V S Lead PDIP Lead SOIC IR211 IR211S 5
6 (IR211) (IR2117) IR2117/IR211 <5 V/ns Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit (IR211) 5% 5% 5% 5% IR2117/IR211 (IR2117) t on t r t off 9% 9% t f 1% 1% Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition
7 5 5 Turn-on Delay Time (ns) Turn-on Delay Time (ns) Figure 4A. Turn-On Time IAS Figure 4B. Turn-On Time 5 5 Turn-Off Time (ns) Turn-Off Time (ns) Figure 5A. Turn-Off Time IAS Figure 5B. Turn-Off Time 7
8 5 5 Turn-On Rise Time (ns) Turn-On Rise Time (ns) IAS Fiure A. Turn-On Rise Time vs.temperature Figure B. Turn-On Rise Time Turn-Off Fall Time (ns) Turn-Off Fall Time (ns) IAS Figure 7A. Turn-Off Fall Time Figure 7B. Turn-Off Fall Time
9 13 13 Input Voltage (V) Input Voltage (V) Figure A. Logic "1" (IR211 "") Input Voltage Figure B. Logic "1" (IR211 "") Input Voltage 9 9 Input Voltage (V) 7 5 Input Voltage (V) Temperatre ( o C) Figure 9A. Logic "" (IR211 "1") Input Voltage Figure 9B. Logic "" (IR211 "1") Input Voltage 9
10 High Level Output Voltage (V) High Level Output Voltage (V) Figure 1A. High Level Output Figure 1B. High Level Output Low Level Output Voltage (V) Low Level Output Voltage (V) MAX Figure 11A. Low Level Output vs.temperature Figure 11B. Low Level Output 1
11 Offset Supply Leakage Current ( A) Offset Supply Leakage Current ( A) Boost Voltage (V) Figure 12A. Offset Supply Leakage Current Figure 12B. Offset Supply Leakage Current vs. VB Boost Voltage 1 1 V Supply Current ( ) V Supply Current ( ) S Figure 13A. S Supply Current Figure 13B. S Supply Current 11
12 1 1 Supply Current ( A) 4 2 Supply Current ( ) Figure 14A. Supply Current Figure 14B. Supply Current Logic "1" Input Current ( ) Logic "1" Input Current ( ) Figure 15A. Logic "1" (211 "") Input Current Figure 15B. Logic "1" (211 "") Input Current 12
13 Logic "" Input Current ( ) Logic "" Input Current ( ) Figure 1A. Logic "" (211"1") Input Current Figure 1B. Logic "" (211"1") Input Current 1 1 Supply Current ( ) Supply Current ( ) Max Figure 17A. Undervoltage Threshold (+) Figure 1A. Undervoltage Threshold (-) 13
14 1 1 S Supply Current ( ) Max. V Supply Current ( ) Figure 19A. S Undervoltage Threshold (+) Figure 2A. S Undervoltage Threshold (-) 5 5 Output Source Current ( ) Output Source Current ( ) IAS Figure 21A. Output Source Current Figure 21B. Output Source Current 14
15 1 1 Output Sink Current ( ) 4 2 Output Sink Current ( ) IAS Figure 22A. Output Sink Current vs.temperature Figure 22B. Output Sink Current vs Offset S Floting Figure 23B. Maximum VS Negative Offset 15
16 15 32V 14V 15 32V 14V Junction Temperature ( C) V Junction Temperature ( C) V E+2 1E+3 1E+4 1E+5 1E+ Frequency (Hz) Figure 24. IR2117/IR211 TJ vs. Frequency (IRFBC2) RGATE = 33Ω, VCC = 15V 1E+2 1E+3 1E+4 1E+5 1E+ Frequency (Hz) Figure 25. IR2117/IR211 TJ vs. Frequency (IRFBC3) RGATE = 22Ω, VCC = 15V 15 32V 14V 1V 15 32V 14V 1V Junction Temperature ( C) Junction Temperature ( C) E+2 1E+3 1E+4 1E+5 1E+ Frequency (Hz) Figure 2. IR2117/IR211 TJ vs. Frequency (IRFBC4) RGATE = 15Ω, VCC = 15V 1E+2 1E+3 1E+4 1E+5 1E+ Frequency (Hz) Figure 27. IR2117/IR211 TJ vs. Frequency (IRFPE5) RGATE = 1Ω, VCC = 15V 1
17 Case outlines -Lead PDIP (MS-1AB) A E X D e B H.25 [.1] A.4 [.255] 3X 1.27 [.5] FOOTPRT X.72 [.2] X 1.7 [.7] DIM C HE S MILLIMETERS M MAX M MAX A A b c D E e e1 H K L y BASIC 1.27 BASIC.25 BASIC.35 BASIC e1 A C y K x 45 X b A1.25 [.1] C A B.1 [.4] X L 7 X c NOTES: 1. DIMENSIONG & TOLERANCG PER ASME Y14.5M CONTROLLG DIMENSION: MILLIMETER 3. DIMENSIONS ARE SWN MILLIMETERS [CHES]. 4. OUTLE CONFORMS TO JEDEC OUTLE MS-12AA. -Lead SOIC 5 DIMENSION DOES NOT CLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED.15 [.]. DIMENSION DOES NOT CLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED.25 [.1]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERG TO A SUBSTRATE
18 LEADFREE PART MARKG FORMATION Part number IRxxxxxx Date code YWW? IR logo Pin 1 Identifier? MARKG CODE P Lead Free Released Non-Lead Free Released?XXXX Lot Code (Prod mode - 4 digit SPN code) Assembly site code Per SCOP 2-2 ORDER FORMATION Basic Part (Non-Lead Free) -Lead PDIP IR2117 order IR2117 -Lead PDIP IR211 order IR211 -Lead SOIC IR2117S order IR2117S -Lead SOIC IR211S order IR211S Leadfree Part -Lead PDIP IR2117 order IR2117PbF -Lead PDIP IR211 order IR211PbF -Lead SOIC IR2117S order IR2117SPbF -Lead SOIC IR211S order IR211SPbF IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 9245 Tel: (31) This product has been qualified per industrial level Data and specifications subject to change without notice. 4/2/24 1
19 This datasheet has been download from: Datasheets for electronics components.
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