Precision, Unity-Gain Differential Amplifier AMP03

Transcription

1 a FEATURES High CMRR: 1 db Typ Low Nonlinearity:.1% Max Low Distortion:.1% Typ Wide Bandwidth: 3 MHz Typ Fast Slew Rate: 9.5 V/ s Typ Fast Settling (.1%): 1 s Typ Low Cost APPLICATIONS Summing Amplifiers Instrumentation Amplifiers Balanced Line Receivers Current-Voltage Conversion Absolute Value Amplifier to 2 ma Current Transmitter Precision Voltage Reference Applications Lower Cost and Higher Speed Version of INA15 GENERAL DESCRIPTION The is a monolithic unity-gain, high speed differential amplifier. Incorporating a matched thin film resistor network, the features stable operation over temperature without requiring expensive external matched components. The is a basic analog building block for differential amplifier and instrumentation applications. The differential amplifier topology of the both amplifies the difference between two signals and provides extremely high rejection of the common-mode input voltage. By providing common-mode rejection (CMR) of 1 db typical, the solves common problems encountered in instrumentation design. As an example, the is ideal for performing either addition or subtraction of two signals without using expensive externally matched precision resistors. The large common-mode rejection is made possible by matching the internal resistors to better than.2% and maintaining a thermally symmetric layout. Additionally, due to high CMR over frequency, the is an ideal general amplifier for buffering signals in a noisy environment into data acquisition systems. The is a higher speed alternative to the INA15. Featuring slew rates of 9.5 V/µs and a bandwidth of 3 MHz, the offers superior performance to the INA15 for high speed current sources, absolute value amplifiers, and summing amplifiers. REV. F Precision, Unity-Gain Differential Amplifier FUNCTIONAL BLOCK DIAGRAM IN +IN 2 3 PIN CONNECTIONS REFERENCE 1 IN 2 +IN 3 V REFERENCE 1 IN 2 +IN 3 V REFERENCE 1 IN 2 +IN 3 8-Lead PDIP (P Suffix) TOP VIEW (Not to Scale) NC = NO CONNECT 8-Lead SOIC (S Suffix) TOP VIEW (Not to Scale) NC = NO CONNECT Header (J Suffix) NC 8 V NC = NO CONNECT NC 7 V+ 6 OUTPUT 5 SENSE 8 NC 7 V+ 6 OUTPUT 5 SENSE 7 V+ 6 OUTPUT 5 SENSE SENSE +V CC OUTPUT V EE REFERENCE Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 916, Norwood, MA , U.S.A. Tel: 781/ Fax: 781/ Analog Devices, Inc. All rights reserved.

2 * PRODUCT PAGE QUICK LINKS Last Content Update: 2/23/217 COMPARABLE PARTS View a parametric search of comparable parts. DOCUMENTATION Application Notes AN-2: A User's Guide to I.C. Instrumentation Amplifiers AN-25: Instrumentation Amplifiers Solve Unusual Design Problems AN-38: Avoiding Passive-Component Pitfalls AN-589: Ways to Optimize the Performance of a Difference Amplifier AN-671: Reducing RFI Rectification Errors in In-Amp Circuits Data Sheet : Military Data Sheet : Precision, Unity-Gain Differential Amplifier Data Sheet Technical Books A Designer's Guide to Instrumentation Amplifiers, 3rd Edition, 26 REFERENCE MATERIALS Technical Articles Auto-Zero Amplifiers High-performance Adder Uses Instrumentation Amplifiers Input Filter Prevents Instrumentation-amp RF- Rectification Errors The AD Setting a New Industry Standard for Instrumentation Amplifiers DESIGN RESOURCES Material Declaration PCN-PDN Information Quality And Reliability Symbols and Footprints DISCUSSIONS View all EngineerZone Discussions. SAMPLE AND BUY Visit the product page to see pricing options. TECHNICAL SUPPORT Submit a technical question or find your regional support number. DOCUMENT FEEDBACK Submit feedback for this data sheet. This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.

3 SPECIFICATIONS ELECTRICAL CHARACTERISTICS F B G Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit Offset Voltage V OS V CM = V µv Gain Error No Load, V IN = ± 1 V, R S = Ω % Input Voltage Range IVR (Note 1) ± 2 ± 2 ± 2 V Common-Mode Rejection CMR V CM = ± 1 V db Power Supply Rejection Ratio PSRR V S = ± 6 V to ± 18 V µv/v Output Swing V O R L = 2 kω ±12 ± 13.7 ± 12 ± 13.7 ± 12 ± 13.7 V Short-Circuit Current Limit I SC Output Shorted to Ground +5/ 15 +5/ 15 +5/ 15 ma Small-Signal Bandwidth ( 3 db) BW R L = 2 kω MHz Slew Rate SR R L = 2 kω V/µs Capacitive Load Drive Capability C L No Oscillation pf Supply Current I SY No Load ma NOTES 1 Input voltage range guaranteed by CMR test. Specifications subject to change without notice. ELECTRICAL CHARACTERISTICS B Parameter Symbol Conditions Min Typ Max Unit Offset Voltage V OS V CM = V µv Gain Error No Load, V IN = ± 1 V, R S = Ω.1.2 % Input Voltage Range IVR ± 2 V Common-Mode Rejection CMR V CM = ± 1 V db Power Supply Rejection Ratio PSRR V S = ± 6 V to ± 18 V.7 2 µv/v Output Swing V O R L = 2 kω ±12 ± 13.7 V Slew Rate SR R L = 2 kω 9.5 V/µs Supply Current I SY No Load 3.. ma Specifications subject to change without notice. ELECTRICAL CHARACTERISTICS F G Parameter Symbol Conditions Min Typ Max Min Typ Max Unit Offset Voltage V OS V CM = V µv Gain Error No Load, V IN = ± 1 V, R S = Ω % Input Voltage Range IVR ± 2 ± 2 V Common-Mode Rejection CMR V CM = ± 1 V db Power Supply Rejection Ratio PSRR V S = ± 6 V to ± 18 V µv/v Output Swing V O R L = 2 kω ±12 ± 13.7 ± 12 ± 13.7 V Slew Rate SR R L = 2 kω V/µs Supply Current I SY No Load ma Specifications subject to change without notice. (@ V S = 15 V,, unless otherwise noted.) (@ V S = 15 V, 55 C T A +125 C for B Grade) (@ V S = 15 V, C T A +85 C for F and G Grades) 2 REV. F

4 WAFER TEST LIMITS V S = 15 V, T A = 25 C, unless otherwise noted.)* GBC Parameter Symbol Conditions Limit Unit Offset Voltage V OS V S = ±18 V.5 mv max Gain Error No Load, V IN = ±1 V, R S = Ω.8 % max Input Voltage Range IVR ±1 V min Common-Mode Rejection CMR V CM = ±1 V 8 db min Power Supply Rejection Ratio PSRR V S = ±6 V to ±18 V 8 µv/v max Output Swing V O R L = 2 kω ±12 V max Short-Circuit Current Limit I SC Output Shorted to Ground +5/ 15 ma min Supply Current I SY No Load 3.5 ma max *Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing. ABSOLUTE MAXIMUM RATINGS 1 Supply Voltage ±18 V Input Voltage Supply Voltage Output Short-Circuit Duration Continuous Storage Temperature Range P, J Package C to +15 C Lead Temperature (Soldering, 6 sec) C Junction Temperature C Operating Temperature Range B C to +125 C F, G C to +85 C DICE CHARACTERISTICS 1. REFERENCE 2. IN 3. +IN. V EE 5. SENSE 6. OUTPUT 7. +V CC 8. NC Package Type 3 JA JC Unit Header (J) C/W 8-Lead PDIP (P) 13 3 C/W 8-Lead SOIC (S) 155 C/W NOTES 1 Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2 For supply voltages less than ± 18 V, the absolute maximum input voltage is equal to the supply voltage. 3 θ JA is specified for worst-case mounting conditions, i.e., θ JA is specified for device in socket for header and PDIP packages and for device soldered to printed circuit board for SOIC package. ORDERING GUIDE Temperature Package Package Model 1 Range Description Option 2 GP C to +85 C 8-Lead PDIP P-8 BJ C to +85 C Header H-8B FJ C to +85 C Header H-8B BJ/883C 55 C to +125 C Header H-8B GS C to +85 C 8-Lead SOIC S-8 GS-REEL C to +85 C 8-Lead SOIC S MGA 55 C to +125 C Header H-8B GBC Die NOTES 1 Burn-in is available on commercial and industrial temperature range parts in PDIP and header packages. 2 Consult factory for /883 data sheet. BURN-IN CIRCUIT DIE SIZE.76 inch.76 inch, 5,776 sq. mm (1.93 mm 1.93 mm, 3.73 sq. mm) SLEW RATE TEST CIRCUIT V IN = 1V +18V 18V +15V 15V.1 F.1 F V OUT = 1V CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as V readily accumulate on the human body and test equipment and can discharge without detection. Although the features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. F 3

5 Typical Performance Characteristics COMMON-MODE REJECTION (db) THD+N (%) A V = 1 R L = 6 R L = 1k TPC 1. Small Signal Transient Response k 1k 1k 1M TPC 2. Common-Mode Rejection vs. Frequency k 1k 2k TPC 3. Total Harmonic Distortion vs. Frequency TPC. Large Signal Transient Response POWER SUPPLY REJECTION (db) 12 T 11 A = +25 C PSRR PSRR k 1k 1k 1M TPC 5. Power Supply Rejection vs. Frequency DIM (%) k A V = 1 R L = 6, 1k 1k TPC 6. Dynamic Intermodulation Distortion vs. Frequency 5k INPUT OFFSET VOLTAGE ( V) TEMPERATURE ( C) TPC 7. Input Offset Voltage vs. Temperature CLOSED-LOOP GAIN (db) T A = +25 C 3 1 1k 1k 1k 1M 1M TPC 8. Closed-Loop Gain vs. Frequency OUTPUT IMPEDANCE ( ) T A = +25 C 1 1k 1k 1k 1M TPC 9. Closed-Loop Output Impedance vs. Frequency REV. F

6 .3.2 R S = R L = 2k 6 5 GAIN ERROR (%).1..1 SLEW RATE (V/ s) SUPPLY CURRENT (ma) TEMPERATURE ( C) TPC 1. Gain Error vs. Temperature TEMPERATURE ( C) TPC 11. Slew Rate vs. Temperature TEMPERATURE ( C) TPC 12. Supply Current vs. Temperature 15 SUPPLY CURRENT (ma) SUPPLY VOLTAGE (V) TPC 13. Supply Current vs. Supply Voltage MAXIMUM OUTPUT VOLTAGE (V) V S = 18V V S = 12V V S = 9V V S = 5V OUTPUT SOURCE CURRENT (ma) TPC 1. Maximum Output Voltage vs. Output Current (Source) MAXIMUM OUTPUT VOLTAGE (V) V S = 18V V S = 12V V S = 9V 2.5 V S = 5V OUTPUT SINK CURRENT (ma) TPC 15. Maximum Output Voltage vs. Output Current (Sink) Hz) 12 1 VOLTAGE NOISE DENSITY (nv/ V V 1 V +1 V V 1 V k 1k TPC 16. Voltage Noise Density vs. Frequency.1 TO 1Hz PEAK-TO-PEAK NOISE TPC 17. Low Frequency Voltage Noise NOTE: EXTERNAL AMPLIFIER GAIN = 1; THEREFORE, VERTICAL SCALE = 1 V/DIV. TPC 18. Voltage Noise from khz to 1 khz +1 V V 1 V REV. F NOTE: EXTERNAL AMPLIFIER GAIN = 1; THEREFORE, VERTICAL SCALE = 1 V/DIV. TPC 19. Voltage Noise from khz to 1 khz 5

7 V SIGNAL ECM +V.1 F V.1 F GROUND REFERENCE 1 GROUND REFERENCE 2 (GROUND REFERENCE 2) V OUT = V SIGNAL Figure 1. Serves to Reject Common-Mode Voltages in Instrumentation Systems. Common-Mode Voltages Occur Due to Ground Current Returns. V SIGNAL and E CM Must Be within the Common-Mode Range of. APPLICATIONS INFORMATION The represents a versatile analog building block. In order to capitalize on the fast settling time, high slew rate, and high CMR, proper decoupling and grounding techniques must be employed. Figure 1 illustrates the use of.1 µf decoupling capacitors and proper ground connections. MAINTAINING COMMON-MODE REJECTION In order to achieve the full common-mode rejection capability of the, the source impedance must be carefully controlled. Slight imbalances of the source resistance will result in a degradation of dc CMR even a 5 Ω imbalance will degrade CMR by 2 db. Also, the matching of the reactive source impedance must be matched in order to preserve the CMRR over frequency. APPLICATION CIRCUITS +15V.1 F IN E 1 R1 R2 REF1 +5V OUT E = E 2 E 1 5V OUT +IN E 2 R3 R Figure 2. Precision Difference Amplifier. Rejects Common-Mode Signal = (E 1 + E 2 )/2 by 1 db Figure 5. 5 V Precision Voltage Reference E 1 E = E 1 E 1 E = E 1 + E 2 E 2 Figure 3. Precision Unity-Gain Inverting Amplifier Figure 6. Precision Summing Amplifier +15V.1 F R1 R2 +1V OUT REF1 1V OUT E 1 E = (R2/R1+1) E 1 = E 2 2 E 2 Figure. 1 V Precision Voltage Reference Figure 7. Precision Summing Amplifier with Gain 6 REV. F

8 E 2 E 1 I = (E 1 E 2 )/R OP8EJ LOAD Figure 8. Differential Input Voltage-to-Current Converter for Low I OUT. OP8EJ maintains 25 fa max input current, allowing I O to be less than 1 pa. IN E 1 +IN E 2 R1 A1 R2 R2 A2 E = (1 + 2R2/R1) (E 2 E 1 ) I R E OUTPUT System Design Requirement Source Impedance Low, Need Low Voltage Noise Performance Source Impedance High OP8 (R S 15 kω). Need Low Current OP1 Noise OP3 OP29 OP97 Require Ultrahigh Input Impedance Need Wider Bandwidth and High Speed Suggested Op Amp For A1 and A2 OP27, OP37 OP227 (Dual Matched) OP27 (Dual) OP271 OP7 OP71 OP8 OP97 OP1 OP3 OP2 OP3 OP29 Figure 9. Suitable Instrumentation Amplifier Requirements Can Be Addressed by Using an Input Stage Consisting of A1, A2, R1, and R2. The following matrix suggests a suitable amplifier. REV. F 7

9 OUTLINE DIMENSIONS.18 (.57) MAX 8-Lead Plastic Dual In-Line Package [PDIP] [P Suffix] (N-8) Dimensions shown in inches and (millimeters).375 (9.53).365 (9.27).355 (9.2) (7.9).285 (7.2) (6.98).1 (2.5) BSC.15 (.38) MIN.15 (3.81).13 (3.3) SEATING PLANE.11 (2.79).6 (1.52).22 (.56).5 (1.27).18 (.6).5 (1.1).1 (.36).325 (8.26).31 (7.87).3 (7.62).15 (3.81).135 (3.3).12 (3.5).15 (.38).1 (.25).8 (.2). (.157) 3.8 (.197).25 (.98).1 (.) COPLANARITY.1 8-Lead Small Outline Package [SOIC] [S Suffix] (R-8) Dimensions shown in millimeters and (inches) 5. (.1968).8 (.189) SEATING PLANE 1.27 (.5) BSC 6.2 (.2) 5.8 (.228) 1.75 (.688) 1.35 (.532).51 (.21).31 (.122).25 (.98).17 (.67) 8.5 (.196) 5.25 (.99) 1.27 (.5). (.157) COMPLIANT TO JEDEC STANDARDS MS-12AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN C29 12/3(F) COMPLIANT TO JEDEC STANDARDS MO-95AA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 8-Lead Metal Can [TO-99] [J Suffix] (H-8B) Dimensions shown in inches and (millimeters).37 (9.).335 (8.51).335 (8.51).35 (7.75).185 (.7).165 (.19). (1.2) MAX. (1.2).1 (.25) REFERENCE PLANE.5 (12.7) MIN.25 (6.35) MIN.1 (2.5) BSC.5 (1.27) MAX.2 (5.8) BSC.19 (.8).16 (.1).21 (.53).16 (.1).1 (2.5) BSC BASE & SEATING PLANE (.86).28 (.71).16 (.6).1 (3.56) 5 BSC.5 (1.1).27 (.69) Revision History COMPLIANT TO JEDEC STANDARDS MO-2AK CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Location Page 12/3 Data Sheet changed from REV. E to REV. F. Changes to ELECTRICAL CHARACTERISTICS Changes to ORDERING GUIDE Updated OUTLINE DIMENSIONS REV. F

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