FSMD and Gezel. Jan Madsen

Transcription

1 FSMD and Gezel Jan Madsen Informatics and Mathematical Modeling Technical University of Denmark Richard Petersens Plads, Building 321 DK2800 Lyngby, Denmark Processors Pentium IV General-purpose func if... then... else... for {... IJVM Application-specific.. ASIC Single-purpose Embedded Systems Jan Madsen [2] Embedded Systems 1

2 Domain-Specific Processors MEMORY CPU RF Baseband Processing Crypto Chip Reconfigurable Interconnect Software Domain- Specific Hardware Networking Medium access Baseband Proc? Architecture Circuit Networking Protocol Algorithm Architecture? Architectre Circuit Security Courtesy Patrick Schaumont Embedded Systems Jan Madsen [3] Agenda inst mem controller datapath data mem FSMD execution Modeling Gezel Gezel example Embedded Systems Jan Madsen [4] Embedded Systems 2

3 FSMD execution Executes in a number of steps Step i-1 Step i Step i+1 Steps are controlled by a clock period T frequency f = 1/T Within a period we have to read, compute and save For now, all we need to know is that there is a clock Embedded Systems Jan Madsen [10] FSMD execution Step i-1 Step i Step i+1 F i-1 F i F i Embedded Systems Jan Madsen [11] Embedded Systems 3

4 Simple example time Embedded Systems Jan Madsen [12] Modelling Embedded Systems Jan Madsen [13] Embedded Systems 4

5 Modeling model type Mathematical domain model type model instance model instance When go==1 then blink leds five times specification Physical domain implementation Embedded Systems Jan Madsen [14] Modeling: Hardware design Gezel: fdlsim FSMD Mathematical domain FSMD VHDL: Modelsim Gezel Gezel: fdlvhd VHDL Xilinx When go==1 then blink leds five times specification Physical domain Xilinx FPGA Embedded Systems Jan Madsen [15] Embedded Systems 5

6 Modeling: Software design Imperative languages Mathematical domain Imperative languages C Compiler: gcc ASM linker When go==1 then blink leds five times specification Physical domain Pentium III Embedded Systems Jan Madsen [16] Gezel Embedded Systems Jan Madsen [17] Embedded Systems 6

7 Gezel Embedded Systems Jan Madsen [18] Domain-Specific Processors MEMORY CPU RF Baseband Processing Crypto Chip Reconfigurable Interconnect Software Domain- Specific Hardware Networking Medium access Baseband Proc? Architecture Circuit Networking Protocol Algorithm Architecture? Architectre Circuit Security Courtesy Patrick Schaumont Embedded Systems Jan Madsen [19] Embedded Systems 7

8 Purpose of GEZEL Create a Flexible Use-Model Software Domain- Specific Hardware Protocol Algorithm Architecture? Architectre Circuit Security Instruction Set Design Integration MoC-component Reduce Structural Flexibility with Domain Specialization Performance Energy Efficiency Area Courtesy Patrick Schaumont Embedded Systems Jan Madsen [20] GEZEL Design Flow Stepwise Refinement of high-level, functional descriptions into a hierarchy of descriptions at lower levels of abstraction. Software Domain- Specific Hardware Protocol Algorithm Architecture? Architectre Circuit Security System Model (SW) Gezel Processor Courtesy Patrick Schaumont Embedded Systems Jan Madsen [21] Embedded Systems 8

9 Elements in a Gezel Co-Processor Datapaths containing instructions Controllers to select datapath instructions Library Blocks Datapaths are composed in a System control control Gezel system data path data path library block Courtesy Patrick Schaumont Embedded Systems Jan Madsen [22] GEZEL Tool Architecture.fdl Domain Specific Description Language Simulation Kernel parser Object structure Simulation API Gezel Tool Codegen API Other domains System Simulation C++ HW SW Courtesy Patrick Schaumont Embedded Systems Jan Madsen [23] Embedded Systems 9

10 Gezel: FSMD dp Name 0 ( port list ) { local register and signal declarations possibly: use Name i (n 0, n 1, ); (i=0) sfg name 1 { simple (non-branching) actions sfg name 2 { simple (non-branching) actions... + fsm controller_name ( Name 0 ) { initial state declaration auxiliary state 0 transition 1 transition 1... hardwired controller_name ( Name 0 ) { action_name; sequencer controller_name ( Name 0 ) { action_name;... + system id {Name k ; Embedded Systems Jan Madsen [24] Gezel: adder x y adder z dp adder(in x, y: tc(32); out z: tc(32)) { sfg add { z = x + y; hardwired ctl(adder) { add; controller datapath controller datapath Embedded Systems Jan Madsen [25] Embedded Systems 10

11 Gezel: Testbench x y adder z dp adder(in x, y: tc(32); out z: tc(32)) { sfg add { z = x + y; hardwired ctl(adder) { add; y x adder_test z Embedded Systems Jan Madsen [26] Gezel: Testbench dp adder_test(in z: tc(32); out y, x: tc(32)) { sig sx, sy, sz: tc(32); sfg rep { sz = z; x = sx; y = sy; $display($dec,"x: ",sx, ", y: ",sy, ", z: ",sz); sfg a1 { sx = 100; sy = 350; sfg a2 { sx = 333; sy = 666; sfg a3 { sx = 20; sy = -99; dp adder(in x, y: tc(32); out z: tc(32)) { sfg add { z = x + y; hardwired ctl(adder) { add; fsm test(adder_test){ initial s0; state s1, (rep,a1) -> (rep,a2) -> (rep,a3) -> s0; Embedded Systems Jan Madsen [27] Embedded Systems 11

12 Gezel: System dp adder_test(in z: tc(32); out y, x: tc(32)) { sig sx, sy, sz: tc(32); sfg rep { sz = z; x = sx; y = sy; $display($dec,"x: ",sx, ", y: ",sy, ", z: ",sz); sfg a1 { sx = 100; sy = 350; sfg a2 { sx = 333; sy = 666; sfg a3 { sx = 20; sy = -99; fsm test(adder_test){ initial s0; state s1, (rep,a1) -> (rep,a2) -> (rep,a3) -> s0; dp adder(in x, y: tc(32); out z: tc(32)) { sfg add { z = x + y; hardwired ctl(adder) { add; system x y y x adder adder_ test z z Embedded Systems Jan Madsen [28] Gezel: System dp adder_test(in z: tc(32); out y, x: tc(32)) { sig sx, sy, sz: tc(32); sfg rep { sz = z; x = sx; y = sy; $display($dec,"x: ",sx, ", y: ",sy, ", z: ",sz); sfg a1 { sx = 100; sy = 350; sfg a2 { sx = 333; sy = 666; sfg a3 { sx = 20; sy = -99; fsm test(adder_test){ initial s0; state s1, (rep,a1) -> (rep,a2) -> (rep,a3) -> s0; dp adder(in x, y: tc(32); out z: tc(32)) { sfg add { z = x + y; hardwired ctl(adder) { add; dp topcell() { sig a,b,c: tc(32); use adder(a,b,c); use adder_test(c,b,a); hardwired ctl(topcell) { system testbench {topcell; Embedded Systems Jan Madsen [29] Embedded Systems 12

13 Gezel: A complete example dp adder_test(in z: tc(32); out y, x: tc(32)) { sig sx, sy, sz: tc(32); sfg rep { sz = z; x = sx; y = sy; $display($dec,"x: ",sx, ", y: ",sy, ", z: ",sz); sfg a1 { sx = 100; sy = 350; sfg a2 { sx = 333; sy = 666; sfg a3 { sx = 20; sy = -99; fsm test(adder_test){ initial s0; state s1, (rep,a1) -> (rep,a2) -> (rep,a3) -> s0; dp adder(in x, y: tc(32); out z: tc(32)) { sfg add { z = x + y; hardwired ctl(adder) { add; dp topcell() { sig a,b,c: tc(32); use adder(a,b,c); use adder_test(c,b,a); Hardwaired ctl(topcell) { system testbench {topcell; Embedded Systems Jan Madsen [30] Simple example in Gezel dp timing( out data : ns(32) ){ reg r1, r2, r3, r4 : ns(32); sfg init{r1 = 0; r2 = 0; r3 = 0; r4 = 0; data = r4; $display("start simulation"); sfg exec{ r2 = r1+1; r3 = r2+1; r4 = r3+1; data = r4; sfg dump{ $display($cycle," r1=",r1," r2=",r2, " r3=",r3," r4=",r4," data=",data); fsm run(timing){ initial s0; state (init, dump) -> (exec, dump) -> s1; dp topcell() { sig a: ns(32); use timing(a); system S { topcell; Embedded Systems Jan Madsen [31] Embedded Systems 13

14 Simple example in Gezel start simulation 0 r1=0/0 r2=0/0 r3=0/0 r4=0/0 data=0 1 r1=0/0 r2=0/1 r3=0/1 r4=0/1 data=0 2 r1=0/0 r2=1/1 r3=1/2 r4=1/2 data=1 3 r1=0/0 r2=1/1 r3=2/2 r4=2/3 data=2 4 r1=0/0 r2=1/1 r3=2/2 r4=3/3 data=3 5 r1=0/0 r2=1/1 r3=2/2 r4=3/3 data= Embedded Systems Jan Madsen [32] Embedded Systems 14