Xenomai: integration and qualification of a real time operating system ARMadeus Systems

Transcription

1 : integration and qualification of a real time operating system ARMadeus Systems Gwenhaël 8 july / 22

2 Plan of in a Buildroot environment / 22

3 : basics Real time extension for Linux. Second kernel in charge of real time tasks Linux stays in charge of shared time applications Keep existing working environment and applications Easy port of applications to a real time environment 3 / 22

4 : structure Adeos concurrent access to hardware software cooperative with Linux easy port of applications process Domain B Linux rt_task rt_task skins rt_task Domain A Nucleus Adeos/I pipe user space kernel space 4 / 22

5 platform APF9328 board: based on a Freescale i.mx CPU providing an ARM9 core 16 MB RAM Xilinx Spartan 3 FPGA shares data, adress and control busses with the CPU OE_n EB3_n Chip_Select Horloge Interruption 5 / 22

6 of No packages for in Buildroot framework manual install Patch: Ipipe provided by Adeos applied to Linux by prepare kernel Configure and compile kernel Compile and install libraries in user space Complex and time consuming Automated install Interaction with the kernel Libraries installs immediately 6 / 22

7 Presentation Objective: monitor the performances of applications. Concept: generate signals using dedicated hardware (synthesizer) and display the results on a digital storagescope. An application loads the system to disturb the periodic phenomenom Carte APF 9328 GPIO PA.6 PA.9 Lcd voie1 voie2 Oscilloscope Synthétiseur basse fréquence 7 / 22

8 : principle Two kinds of behaviours are observed: Periodic timer handling interrupt servicing Exemples are tested in user space and kernel space, Linux and. 8 / 22

9 Periodic timer handling: user space Linux declare a handler: sa.sa handler = isr ; sigaction (SIGVTARLM, &sa, NULL); trigger the counter: setitimer (ITIMER VIRTUAL, &timer, NULL); configure the counter: rt task set periodic (NULL, TM NOW,SLEEP); wait: rt task wait period (NULL); 40 ms incertitudes 9 / 22

10 Results: periodic timer in user space (a) Linux, 5ms/div (b), 20µs/div Linux min? -32 max? +74,9 10 / 22

11 : summary available on an ARM9 architecture Better global performances on a weakly loaded OS Better tolerance to loading Expensive, hardly convenient and not always suitable: 2 GS/s digital storagescope euros. Connect GPIO outputs Results are not always usable (counter on Linux). 11 / 22

12 s : concept Purpose: no additional hardware no changes to the kernel LCD Principle: use the FPGA able to measure performances of several codes at a given time usable in user space and kernel space under Linux and. 12 / 22

13 Structure VHDL components: acquire and store mesurements generate signals kernel module: configure IPs. transfer (read) acquired data MACROS: atomic usable in user space and kernel space can be disabled 13 / 22

14 FPGA part Multiple measurements Compatible with data transfer on a Wishbone bus Uses POD IP_xxx logger i2cocore00 irq 14 / 22

15 VHDL components 15 / 22

16 Measurements Replaces the oscilloscope. Computes and stores the time differences between start and stop events START STOP RESET Store the current counter value 16 / 22

17 Measurements Replaces the oscilloscope. Computes and stores the time differences between start and stop events START STOP RESET recover the starting value comparison with the current value increase cycle number update min update max 16 / 22

18 Measurements Replaces the oscilloscope. Computes and stores the time differences between start and stop events START STOP RESET min max number of cycles duration of the test 16 / 22

19 Event gen Configurable signal generator Remplaces the dedicated hardware synthesizer Interaction with Measure and the application 17 / 22

20 Kernel module Access: /proc/driver /dev LOGGER GET ID LOGGER MEMBASE /proc/drivers/log 0 attr name type pid measures min max nb_trig nb_meas total_time params trigger ext_start ext_stop reset clock start stop add del prescaler 18 / 22

21 MACROS Known and deterministic access time memory mapped data transfers... i n t main ( void ) { OPEN LOGGER( ) ; CREATE ALL(nom) CREATE ALL( f o o ) ; OPEN LOGGER... FPGA START(nom) FPGA START( f o o ) ; // Code a t e s t e r FPGA STOP(nom) FPGA STOP( f o o ) ;... } 19 / 22

22 : summry Autonomous Simple to use Quantitative data oscilloscope tool min max min max Linux?? , / 22

23 Buildroot Package available runs on APF9328. Embedded evaluation for quantitative analysis of applications and kernel modules 21 / 22

24 Questions questions? / 22