Program Interference in MLC NAND Flash Memory: Characterization, Modeling, and Mitigation

Transcription

1 Progra Interference in MLC NAND Flash Meory: Characterization, Modeling, and Mitigation Yu Cai, Onur Mutlu, Erich F. Haratsch 2 and Ken Mai. Data Storage Systes Center, Departent of Electrical and Coputer Engineering, Carnegie Mellon University, Pittsburgh, PA 2. LSI Corporation, San Jose, CA yucaicai@gail.co, {outlu, kenai}@andrew.cu.edu Abstract As NAND flash eory continues to scale down to saller process technology nodes, its reliability and endurance are degrading. One iportant source of reduced reliability is the phenoenon of progra interference: when a flash cell is prograed to a value, the prograing operation affects the threshold voltage of not only that cell, but also the other cells surrounding it. This interference potentially causes a surrounding cell to ove to a logical state (i.e., a threshold voltage range) that is different fro its original state, leading to an error when the cell is read. Understanding, characterizing, and odeling of progra interference, i.e., how uch the threshold voltage of a cell shifts when another cell is prograed, can enable the design of echaniss that can effectively and efficiently predict and/or tolerate such errors. In this paper, we provide the first experiental characterization of and a realistic odel for progra interference in odern MLC NAND flash eory. To this end, we utilize the read-retry echanis present in soe state-of-the-art 2Y-n (i.e., 20-24n) flash chips to easure the changes in threshold voltage distributions of cells when a particular cell is prograed. Our results show that the aount of progra interference received by a cell depends on ) the location of the prograed cells, 2) the order in which cells are prograed, and 3) the data values of the cell that is being prograed as well as the cells surrounding it. Based on our experiental characterization, we develop a new odel that predicts the aount of progra interference as a function of threshold voltage values and changes in neighboring cells. We devise and evaluate one application of this odel that adjusts the read reference voltage to the predicted threshold voltage distribution with the goal of iniizing erroneous reads. Our analysis shows that this new technique can reduce the raw flash bit error rate by 64% and thereby iprove flash lifetie by 30%. We hope that the understanding and odels developed in this paper lead to other error tolerance echaniss for future flash eories. Keywords NAND flash, progra interference, reliability, read retry, error correction, error odel I. INTRODUCTION Continued decrease in per-bit cost of NAND flash eory has enabled it to be widely adopted as a low-latency storage ediu in a wide variety of systes ranging fro obile devices to enterprise servers. This scaling has been enabled due to continued reductions in the feature size of flash eory cells as well as the use of the ultilevel cell (MLC) technology. Unfortunately, as feature size reduces (beyond 20n today) and MLC technology is applied ore aggressively, NAND flash eory cells becoe increasingly ore subject to circuit level noise, leading to reduced reliability and endurance [5][6]. As a result, ore sophisticated echaniss to tolerate (i.e., prevent and/or correct) errors becoe increasingly necessary. To design effective and efficient error tolerance echaniss, a strong understanding of the causes of errors and the echaniss that lead to the anifestation of different error causes is necessary. This paper builds such an understanding by providing the first characterization and odeling of an iportant class of NAND flash eory errors, called progra interference errors. Past works characterized flash eory errors into four types: erase, progra interference, retention, and read [5][6]. Retention errors, which occur due to flash cells gradually losing charge over tie, were shown to be the doinant cause of errors in state-of-the-art MLC NAND flash eories, whereas progra interference errors, which occur when the data stored in a cell/page changes unintentionally while a neighboring page is prograed, were shown to be the second doinant cause [5][6]. Building upon this understanding, we developed techniques to reduce retention errors by adaptively refreshing and correcting flash cells [2], showing that retention errors can be effectively itigated. Unfortunately, a detailed characterization and analysis of the second ost doinant cause of errors, progra interference, along with itigation echaniss for it, has not been provided in previous works. Our goal in this paper is to build a detailed understanding of the phenoenon of progra interference in state-ofthe-art MLC NAND flash eory via experiental characterization of existing coercial 2Y-n (i.e., 20-24n) flash eory chips. In MLC NAND flash eory, the logical value stored in a eory cell is deterined by the threshold voltage range into which the cell s actual threshold voltage falls [8]. Progra interference is the phenoenon in which the threshold voltage of a flash cell, called the victi cell, unintentionally changes (i.e., gets disturbed) while another cell s value is being prograed [3][4][5][6]. This is due to parasitic capacitance coupling between neighboring cells, which gets worse as cells becoe closer to each other in distance with the reduction in feature size. If the change in threshold voltage due to progra interference causes the victi cell s voltage to shift to a different threshold voltage range, then the victi cell s value becoes incorrect, leading to an error when the cell is read. In this work, we first experientally characterize how progra interference changes the threshold voltage distribution of neighboring cells under a wide variety of prograing conditions. In particular, we analyze the effects of the locations of prograed and victi cells, prograing order of cells, the nuber of P/E (progra/erase) cycles endured so far by the victi cell, and the values stored in the victi cell and its neighbors. Using the results of this characterization, we next build a odel that can predict the change in the threshold voltage of a victi cell due to progra interference caused by the prograing of another cell. Unlike previous odels developed in the past for this purpose [3][4], our odel does not require the knowledge of cell-to-cell parasitic coupling capacitances, which are unknown to the designers of the flash controllers and which could vary fro cell to cell. As a result, our odel is ore realistic to be ipleented in a flash controller. Finally, we use our predictive odel to develop a new technique to adjust the read reference voltage (i.e., the voltage level used to distinguish different threshold voltage ranges) to the predicted threshold voltage distribution such that the logical value read fro a cell that is affected by progra interference is ore likely to be the correct original value stored in the cell. This paper is the first to ake the following contributions and observations: ) We provide detailed rigorous experiental characterization and analyses of the progra interference phenoenon in odern 2Y-n flash eory chips. Our characterization shows that how uch a cell is affected by the progra interference it receives depends on three factors: i) the location of the prograed cells (wordline to wordline interference is uch greater than bitline to bitline), ii) the order in

2 which cells are prograed (out-of-order prograing of flash pages leads to uch ore interference than in-order prograing), and iii) the data values of the cell that is being prograed as well as the cells surrounding it. We find that the aount of P/E cycles a cell has endured is not a significant factor that deterines the progra interference it receives. 2) We show that progra interference can be accurately odeled as additive noise following Gaussian-ixture distributions. We build a new odel for predicting the threshold voltage change in a cell due to progra interference fro surrounding cells. This linear regression based odel is realistically ipleentable in the flash controller, unlike past works, because it does not require knowledge of coupling capacitance values between cells. We find that this odel can predict the threshold voltage change of a victi cell with 96.8% accuracy. 3) We introduce a new error tolerance echanis that can adjust the read reference voltage dynaically based on the predictive threshold voltage odel. The key observation is that the threshold voltage distribution of a cell shifts to the right and widens with progra interference in a anner that is predictable via online learning of the distribution. As a result, the optiu read reference voltage between different threshold voltage ranges (i.e., logical values) can be predicted. Our evaluations show that doing so with our online echanis reduces the raw bit error rate (BER) by 64% and iproves the P/E cycle lifetie of NAND flash eory by 30% copared to a baseline that uses state-of-the-art error-correcting codes (ECC). II. BACKGROUND AND RELATED WORK A. All Bit Line (ABL) Flash A NAND flash eory chip is divided into thousands of twodiensional arrays of flash cells, called blocks. Within a block, all the cells in the sae row share a wordline. A wordline typically spans 32k to 64k cells. Our experiental flash designs use an all-bit-line (ABL) architecture wherein all the cells on the sae wordline are read and prograed as a group [] to achieve high perforance as ore cells can be prograed or read siultaneously. In a 2-bit MLC ABL design, all the least significant bits (LSB) on a wordline for what is called the LSB page and all the ost significant bits (MSB) for the MSB page. Each page is assigned a unique page nuber. The LSB and MSB page nubers on wordline n are (2n-) and (2n+2) respectively, as shown in the exaple in Fig. (a) (Wordline 0, where LSB and MSB page nubers are 0 and 2, is the only exception to this rule). Flash eory is prograed page by page: the MSB page of a wordline is prograed at a different tie fro the LSB page of the sae wordline. In general, flash eory anufacturers recoend that the pages inside a flash block be prograed sequentially in page nuber order (0,, 2,...). We will explain the order of prograing in Section III as it affects progra interference. Fig.. (a) All-bit-line NAND flash block architecture with victi cell circled in red and aggressor cells circled in grey; (b) Two-bit MLC flash prograing schee. Cell states are encoded in forat (LSB, MSB) A conteporary two-bit-per-cell MLC flash cell is prograed to a desired value in two stages, as shown in Fig. (b). After an erase operation (applied to the page the cell resides in), the cell starts out at the erased state (ER). If the LSB of the cell is prograed as 0 (during the prograing of the corresponding LSB page), the flash cell oves into a teporary progra state (Tep). Otherwise it reains in the ER state. During the prograing of the corresponding MSB page, if bit value is prograed into the cell s MSB, the flash cell either reains in the ER state or oves fro the Tep state into the P2 state. If 0 is prograed into the cell s MSB, the flash cell oves either fro the ER state to the P state or fro the Tep state to the P3 state. B. Progra Interference and Related Work on Modeling It In MLC NAND flash eory, the logical value stored in a eory cell is deterined by the threshold voltage range into which the cell s actual threshold voltage falls. MLC NAND flash chips use increental step pulse prograing (ISPP) [2] to set the state of the cell s threshold voltage to a value within the voltage range corresponding to the logical value to be stored. However, due to coupling capacitance between neighboring floating gates, the prograed threshold voltage of a cell ay change when neighbor cells are prograed later. Progra interference is the phenoenon in which the threshold voltage of a flash cell, called the victi cell, unintentionally changes (i.e., gets disturbed) while another cell, called the aggressor cell, is being prograed [3][4]. If the change in threshold voltage due to progra interference causes the victi cell s voltage to shift to a different threshold voltage range, then the victi cell s value becoes incorrect, leading to an error when the cell is read. An exaple victi cell and its aggressor cells are shown in Fig (a). C. Previous Work on Modeling Progra Interference In previous work [3][4], the threshold voltage change of the victi cell is odeled as a function of the coupling capacitance and threshold voltage changes of the aggressor cells: Δ V victi = ( 2Cxx + C yy + 2C xyxy ) / C () total where V victi is the estiated threshold voltage change of the victi cell. C total is the total capacitance of the victi floating gate, C x, C y and C xy are the coupling capacitances between the victi cell and its neighbors in the horizontal, vertical and diagonal directions, respectively. V x, V y and V xy are the threshold voltage changes of the aggressor cells in the horizontal, vertical and diagonal directions, respectively. This odel assues linear correlation between the progra interference induced threshold voltage change of the victi cell and the threshold voltage changes of the aggressor cells. Unfortunately, the odel has a fundaental shortcoing: the coupling capacitance and total capacitance of each flash cell are process and design dependent, and can be affected by the systeatic and rando variations of the anufacturing process. Thus, the exact values for coupling capacitance are extreely difficult to deterine, even by the flash anufacturers. Due to this, the previously proposed odel cannot realistically be used by a flash controller. We will overcoe this fundaental shortcoing in the odel we develop, as described in Section IV. Past works on odeling progra interference had several other shortcoings, which we overcoe in this paper. First, past odels were verified only in 20-n [4] and 60-n [3] flash eory; we expect progra interference to be a uch bigger proble at 2Y-n flash eory we test as the distance between neighboring cells is saller. Second, these works only considered aggressors that are nearest neighbors to the victi cell. Third, these previous works [3][4] did not show the threshold voltage distribution shifts due to progra interference, which we rigorously analyze in this paper. Finally, there are several other works that provided odels for progra interference [5][6][7], yet their odels were based on siulations which in turn were based on intuitive assuptions that were not verified via experiental characterization of real flash eory chips. In this work, our goal is to provide a coprehensive and rigorous characterization of progra interference based on experiental data fro real 2Y-n flash eory chips. D. Experiental Testing Platfor and Methodology To characterize threshold voltage changes due to progra interference, we use an FPGA based flash testing platfor that allows us to issue coands to raw flash chips without ECC [9]. We test 2- bit MLC NAND flash eory devices anufactured in 2Y-n technology. We use the read-retry feature present in these devices to accurately read threshold voltages of cells, as described in [8]. Our previous work describes our characterization platfor in detail [8][9].

3 III. PROGRAM INTERFERENCE CHARACTERIZATION There are two types of progra interference: () bitline to bitline interference, where the interference is due to the aggressor cells on the neighboring bitlines of the victi cell that are on the sae wordline; (2) wordline to wordline interference, where the interference is due to the aggressor cells in the neighboring wordlines of the victi cell. Section III.A characterizes bitline to bitline interference and shows that it is negligible for ABL flash eory because all the cells in the sae wordline are prograed at the sae tie. The effect of wordline to wordline interference depends on the page prograing order. Generally, flash eory anufacturers recoend that the pages inside a flash block be prograed sequentially in page nuber order. With this prograing policy, pages in Fig. (a) would be prograed in the following order: page 0 (LSB of WL 0), page (LSB of WL ), page 2 (MSB of WL 0), page 3 (LSB of WL 2), page 4 (MSB of WL ), and so on. This is called in-page-order prograing. On the other hand, a flash block can be prograed without following this recoendation, a ethod called out-of-pageorder prograing. This increases the flexibility in prograing flash. This ethod can have any variants. For exaple, pages in a block can be prograed in a copletely rando order, or the pages in a block can be prograed in their wordline nuber order. Section III.B and III.C respectively characterize potential progra interference caused by both in-order and out-of-order prograing. A. Bitline to Bitline Progra Interference In ABL flash, the cells on the sae wordline are prograed siultaneously. Thus, it is very difficult to isolate the bitline to bitline interference by coparing the threshold voltage of the victi cell before and after only its neighbor aggressor cells are prograed. To evaluate bitline to bitline progra interference, we investigate what happens to the threshold voltage distribution of a victi cell when its value X is kept constant over ultiple prograing cycles, but the values of its left and right neighbors (L and R, respectively) are varied. Fig. 2(a) shows L, X, R pictorially. All other cells in the sae wordline are prograed to rando values, and neighboring wordlines are not prograed. For each prograed state X (i.e., P, P2 and P3 states), we record the threshold voltage distribution for different L-R data patterns prograed in the neighboring bitlines (after thousands of prograing cycles). Since L and R each can take 4 values (in 2-bit MLC flash), this results in 6 different threshold voltage distributions which are plotted in Fig. 3. WL<N+2> WL<N+> WL<N> WL<N-> Victi Cell L X R (a) (b) WL<N+2> Far-Neighbor WL<N+> Direct-Neighbor WL<N> Victi Wordline WL<N-> Fig. 2. Terinology used for our progra interference characterization. (a) Bitline to bitline interference; (b) Wordline to wordline interference. Each distribution in Fig. 3 represents the voltage of the victi cell for a different data pattern in its iediate left and right neighbors. The figure shows that the 6 distributions ostly overlap. For exaple, the noralized ean V th values of all 6 distributions for P2 State (00) are between and and the difference between the axiu and iniu is less than.%. This eans that the value of the victi cell does not significantly depend on the values prograed in left and right neighbor cells. Hence, we conclude that the bitline to bitline progra interference is sall. We hypothesize that the reason for the lack of bitline to bitline interference is fundaental to all-bit-line flash eory. This is because ISPP (Increental Step Pulse Prograing) [2] used for prograing the cells in the entire wordline can be (and is likely) optiized such that bitline to bitline interference that ight occur during prograing is iniized [3]. For exaple, flash cells are prograed such that the prograing of all cells within the sae wordline finishes at the sae tie [3], and the aount of voltage that is applied to each cell in the wordline can be custoized such that voltage shifts due to bitline interference are taken into account [3]. P State P2 State P3 State Fig. 3. Victi cell threshold voltage distributions with different values prograed on left and right aggressor cells (6 distributions are plotted). B. WL to WL Interference with In-Page-Order Prograing When pages are prograed in order (see the beginning of Section III), there are two types of wordline to wordline interference suffered by a victi cell in wordline N: () direct-neighbor, (2) far neighbor interference. Direct neighbor interference is the interference caused by prograing of data on the MSB page of WL N+, which is directly above the wordline of the victi cell. Note that the prograing of data on the LSB page of N+ happens before the prograing of data on the MSB page of WL N, so it cannot cause interference to WL N. Far neighbor interference is caused by the prograing of data on either the LSB or the MSB page of WL N+2 (and other wordlines with WL nuber greater than N+2). For exaple, the threshold voltage of a cell in WL can change when the LSB page (page 5) and MSB page (page 8) of WL3 in Fig. (a) are prograed. We find that the far neighbor interference caused by wordlines with nubers greater than N+2 (i.e., wordlines that are farther than two wordlines above the victi cell) is negligible, so we do not discuss this further. Using our testing platfor described in Section II-D, we first record the threshold voltage of each cell on the victi wordline (WL N), which gives us the voltage distribution with no progra interference. Then, we do three different experients to easure direct and far neighbor interference: ) after prograing the victi wordline, we progra the MSB page of the wordline directly above the victi wordline (WL N+), after which we read and record the threshold voltage of the victi wordline (this gives us the voltage distribution after direct neighbor interference ), 2) we repeat the first experient except we progra the LSB page of WL N+2 (to easure the distribution after far neighbor (LSB) interference, 3) we repeat the first experient except we progra both the LSB and MSB pages of WL N+2 (to easure the distribution for far neighbor (LSB+MSB) interference. Fig. 4 shows the respective threshold voltage distributions of the victi cells with and without interference. We average the ean shifts of the distributions with interference and the standard deviations of the distributions for all prograed states and plot the in Fig. 5(a) and Fig. 5(b) respectively. Fig. 4. Victi cell threshold voltage distributions before and after interference (with in-page-order prograing). We ake two ajor observations. First, progra interference caused by both near and far neighbor cells can disturb the data stored in victi cells by increasing the threshold voltage of the victi cells. This effect is seen clearly in Fig. 4 and Fig. 5, which show that the

4 threshold voltage distributions of prograed states of the victi cells systeatically shift to the right and widen due to progra interference fro neighboring wordlines. Since flash cells can only be prograed fro low threshold voltage to high using ISPP [2] to inject electrons to the floating gates, the threshold voltage changes of the aggressor cells, i.e. Vx, Vy, Vxy values in equation (), are always non-negative. As the coupling capacitance values between victi and aggressor cells (also in equation ()) are also positive, progra interference can only increase the threshold voltage of the victi cell, which causes its threshold voltage distribution to systeatically shift to the right. The distribution also widens with progra interference due to the effects of process variation across cells. Due to process variations, both the threshold voltage changes of the aggressor cells as well as the coupling capacitance values across different victi-aggressor cell pairs vary, even if the sae data values are prograed across all cells. As a result of this, the effect of progra interference on different victi cells is different, leading to the widening of the distributions. that of when the victi cells receive interference only once (i.e., after only the LSB of the direct-neighbor is prograed). Third, the standard deviation also increases linearly with the nuber of ties of interference. This is because the progra interference received by different victi cells varies due to process variations, as we explained in Section III-B. Fig. 6. Victi cell threshold voltage distributions before and after interference (with out-of-page-order prograing). Fig. 5. Victi cell threshold voltage distribution (a) ean value shifts due to progra interference (b) standard deviations (with in-order prograing). Second, progra interference due to the direct-neighbor wordline is doinant. The voltage distribution ean shift caused by directneighbor interference is approxiately 4.2 ties larger than that caused by far-neighbor (LSB+MSB) interference, as Fig. 5(a) shows. However, progra interference due to far-neighbor wordline also exists and is observable in the 2Y-n flash eory we test. Hence, the aount of progra interference correlates with the distance between the victi wordline and the aggressor wordline. This is because the coupling capacitance between the victi and aggressor cells, which causes the progra interference, is deterined by the distance between the wordlines. C. WL to WL Interference with Out-of-Page-Order Prograing When pages are prograed out of order (see the beginning of Section III), victi cells in a wordline can potentially receive interference due to the prograing of both the LSB and the MSB of the neighboring wordline above and the neighboring wordline below. Note that with out-of-page-order prograing, a victi wordline can receive interference fro both the LSB and MSB page of any of its direct neighbors, whereas this is not possible with in-order prograing. As such, the victi wordline can receive interference once (after only LSB of the direct-neighbor above is prograed), twice (fro both LSB and MSB of the direct-neighbor above), three ties (fro all pages of the above direct-neighbor and LSB of the below direct-neighbor), or four ties (fro all pages of both directneighbors), depending on how any of its four neighboring pages are prograed. Fig. 6 shows the effect of all four types of interference on the threshold voltage distributions of the victi cells. Fig. 7(a) and Fig. 7(b) suarize the ean shifts and standard deviations of distributions. We ake several observations. First, out-of-page-order prograing also leads to significant progra interference on the victi cells. The interference caused by the first page prograed in the above direct neighbor (indicated by once in the figures) is siilar in aount to the interference caused by the above direct neighbor when using in-order prograing (as can be seen by coparing the distribution ean shift of once in Fig. 7(a) to that of direct-neighbor in Fig. 5(a)). Second, the ean shift in voltage distribution of victi cells shift correlates linearly with the nuber of ties the victi wordline receives interference. For exaple, when the victi cells receive interference four ties (i.e., after both the LSB and MSB pages on two neighboring wordlines are prograed), the average ean shift is 85, which is about 4.4 ties Fig. 7. Victi cell Vth distribution (a) ean value shifts due to progra interference (b) standard deviations (with out-of-order prograing). Coparing interference with in-order and out-of-order prograing: It is clear fro these results that out-of-page-order prograing can potentially cause significantly ore interference to a victi wordline: with in-order prograing, interference is only due to the prograing of the MSB page of the direct neighbor wordline, but with out-of-order prograing, interference can be due to the prograing of both the LSB and the MSB pages of the direct neighbor wordlines above and below, leading to approxiately 4.4 ties as uch interference. However, this worst-case ay not always be exercised as how uch interference a victi wordline receives fro its direct neighbors is dictated by the exact prograing policy. This interference can vary fro once to four ties, as evaluated above. Note that one exaple out-of-order prograing policy is one in which pages in the sae wordline are prograed consecutively and wordlines are prograed in order. In other words, with this prograing policy, pages in Fig. (a) would be prograed in the following order: page 0 (LSB of WL 0), page 2 (MSB of WL 0), page (LSB of WL ), page 4 (MSB of WL ), page 3 (LSB of WL 2), and so on. This policy is called in-wordline-order prograing policy, and it causes a victi wordline to receive interference exactly twice fro its direct-neighbor wordlines. If we think of the flash cell as storing a signal (i.e., the originally prograed value) and the progra interference as adding noise to this signal, we can evaluate the signal to noise ratio (SNR) of different prograing policies. The higher the SNR, the better the storage quality of the flash cell and the ore likely it will be read correctly (i.e., the less susceptible to error it is). Fig. 8 shows this SNR value for ) no progra interference, 2) in-page-order prograing (page order), 3) in-wordline-order prograing (wordline order), and other potential versions of out-of-order prograing (OoO) which respectively cause interference, 2, 3, 4 ties fro the direct neighbor to the victi (indicated by once, twice, three ties, and four ties). We ake two conclusions. First, in-page-order prograing leads to significantly higher SNR than in-wordline order prograing. Second, the SNR of the flash cell degrades significantly with ore interference it receives fro neighboring wordlines. Hence, out-of-page-order prograing can greatly degrade the signal quality of the stored value in the flash cell due to progra interference. Both of these provide a potential explanation of why flash eory vendors recoend the use of inorder prograing, i.e. to aintain signal integrity of data stored in flash cells.

5 Fig. 8. Signal-to-noise ratio of flash cells under various progra orders. D. Data Value Dependence of Progra Interference We investigate the effect of the values stored in victi and aggressor cells on the aount of threshold voltage change of the victi cell caused by progra interference. Fig. 9 shows the easured average threshold voltage shift in the victi cell as a function of the direct-above-neighbor aggressor cell and victi cell data values when respectively the LSB (Fig. 9 (a)), the MSB (Fig. 9 (b)), and both the LSB and the MSB (Fig. 9 (c)) prograing of the aggressor cell affect the victi. We draw three ajor conclusions. Fig. 9. Average threshold voltage increase in victi cell as a function of victi cell and direct-above-neighbor aggressor cell values when respectively (a) the LSB, (b) the MSB, and (c) both the LSB and the MSB are prograed in the aggressor cell. First, the aount of progra interference received by the victi cell depends greatly on the value prograed into the aggressor cell. This is because different values prograed into the aggressor cell cause different aounts of threshold voltage increase/shift in the aggressor cell, which in turn deterines the aount of threshold voltage increase in the victi cell. As shown in Fig. 9 (a), if the aggressor cell s LSB is prograed to, then the interference is very low, since the aggressor cell reains in the Erased (ER) state (see Fig. (b)), without incurring a large change in its own threshold voltage. In contrast, if the aggressor cell s LSB is prograed to 0 (cell prograed to the interediate Tep state as in Fig. (b)), then the aggressor cell s threshold voltage shifts significantly, causing the victi cell s threshold voltage to also shift due to capacitive coupling between the two cells floating gates. When the aggressor cell s MSB is prograed, the largest interference is exerted on the victi when the target aggressor value is 0 or 0, as shown in Fig. 9 (b). These two target values again cause the largest threshold voltage increase in the aggressor cell: either fro erased state to P state or fro Tep state to P3 state, as shown in Fig. (b). A target value of 00 leads to less interference, as it only causes the state to change fro Tep state to P2 (see Fig. (b)) state with a saller threshold voltage change. A target value of leads to the sallest interference as the aggressor cell still reains in erased state (Fig. (b)) with very odest threshold voltage change. Siilar observations can be ade for when both the LSB and the MSB prograing of the aggressor cell cause interference to the victi cell (Fig. 9(c)): the target values of the aggressor cell that cause larger threshold shifts in the aggressor cell lead to higher aounts of threshold voltage shifts in the victi cell. Second, the target values of the aggressor cells that lead to ost interference depends on whether or not LSB, MSB, or both LSB and MSB prograing of the aggressor cell affect the victi cell. For exaple the highest interference is caused by target aggressor values of 0 and 0 when only MSB prograing affects the victi cell (Fig. 9(b)), but the highest interference is caused by target aggressor values of 00 and 0 when both the LSB and MSB prograing of the aggressor affects the victi cell (Fig. 9(c)). A direct result of this observation is that different page prograing orders would have different aggressor cell data patterns that would lead to the ost interference: with in-page-order prograing only the MSB page prograing of the direct neighbor affects the victi, leading to the data pattern dependence shown in Fig. 9(b). Third, the aount of progra interference received by the victi cell also depends on the data value in the victi cell. For exaple, for the sae aggressor target data value, the interference in the victi cell is the highest for a victi cell value of 0 and the lowest for a victi cell value of 0. This is because soe states of the victi cell are ore likely to receive additional electrons when neighbor cells are prograed. If the victi cell is in a state with fewer electrons (e.g. state 0), ore electrons are likely to be injected into the victi cell due to progra interference (because the effective electric field on the tunnel oxide between the floating gate and the substrate is relatively high in a state with few electrons). If the victi cell is already in a state with ore electrons (e.g., state 0), the electrons in the floating gate partly counteract the electric field due to the high prograing voltage applied to the aggressor cell, aking it ore difficult for electrons to be injected into the victi cell. Fourth, the value to be prograed on the aggressor cell has uch ore ipact on the progra interference received by the victi than the value of the victi cell. This is because for odern flash designs (such as ABL 2Y-n MLC flash), the effects of coupling capacitance between neighboring cells is ore doinant than the susceptibility of a prograed state to electron injection. E. Suary of Progra Interference Characterization We ake the following ajor conclusions fro the above characterization: () Progra interference increases the threshold voltage of victi cells and thus causes threshold voltage distributions to shift to the right and becoe wider; (2) Direct neighbor wordline progra interference is the doinant source of interference, while neighbor bitline interference and far-neighbor wordline interference are orders of agnitude lower; (3) The aount of progra interference depends on the prograing order of pages in a block: in-page-order prograing likely causes the least aount of interference and out-of-page-order prograing causes uch ore interference; (4) The aount of progra interference depends on the values of both the aggressor cells and the victi cells, with aggressor cell value having a greater affect as it deterines the aount of threshold voltage shift on both the aggressor cell and the victi. IV. MODELING AND PREDICTING PROGRAM INTERFERENCE A. Linear Regression Model to Predict Progra Interference Feature extraction: As we discussed in section III, the aount of progra interference on the victi cell correlates with ) the threshold voltage changes of its aggressor cells prograed after the victi cell, 2) the threshold voltage of the victi cell before interference. Thus, we can extract the relative weights/coefficients of the threshold voltage changes of aggressor cells and threshold voltage of the victi cell as features to predict the progra interference on the victi cell. Extended Interference Model: As noted in Sec. II-C, threshold voltage change of the victi cell can be odeled as a linear cobination of the threshold voltage changes of aggressor cells. Thus, we can use linear regression with least-square-error estiation to build a odel that represents how the progra interference vector V depends on the feature atrix X, which have correlations with V on the victi cells. We enhanced the previous linear odel [3][4], shown in Equation (), by considering ore features. Our new odel includes the threshold voltage changes of the indirect adjacent neighbors and the threshold voltage of the victi cell itself before progra interference (Sec. III.D showed these values affect the aount of progra interference). Suppose the victi cell is on the n-th wordline and j-th bitline as in Fig. (a). We incorporate all the cells in the region up to K cells to the left and right of the victi cell in the horizontal direction and up to M wordlines adjacent above the victi cell as part of our new linear odel, rewritten as: victi j+ K n+ M before ( n, j) = α ( x, y) ( x, y) + α V ( n, j (2) y= j K x= n+ neighbor 0 victi )

6 where α(x,y) and α 0 are fitting coefficients, while V before victi is the threshold voltage of the victi cell before interference. We can cobine all these coefficients as a p regression coefficient vector, called α, and p equals to (2K+) M to include all the coefficients. The recorded threshold voltage changes in all the victi cells of one wordline fors an n vector Y, where n is the nuber of cells on one wordline. The features for each victi cell fors a p vector and thus the features of all the victi cells for an n p feature atrix X. Each row of atrix X corresponds to the features of one victi cell, which is a p vector. Thus the coplete learning odel considering all the victi cells can be expressed as: Y = Xα + ε (3) where ε is the noise error to be iniized to iprove the prediction accuracy of the odel. We easure Y by recording the threshold voltage changes of all victi cells. Each row of X is fored by recording the threshold voltage changes of up to (2K+) M- neighbor aggressor cells and the threshold voltage of each victi cell before progra interference. We use the linear regression odel to learn the coefficient vector α. Note that this vector α can be different for different anufacturers, generations, and even locations in a flash chip. Model Coefficient Learning and Analysis: The task of learning of coefficients can be forulated as a linear regression proble as progra interference approxiately follows a linear odel. We select LASSO with L regularization [4] to learn the coefficients because LASSO can shrink the fitting coefficients, set non-iportant factors to be zero and retain only the highly relevant features to siplify the odel without losing accuracy. In the coefficient learning stage, the goal is to learn the estiate of fitting coefficients α such that the learning errors are as sall as possible, expressed as: arg 2 in ( X α Y + λ α ) (4) 2 α where λ is the paraeter to control the aount of shrinkage that is applied to the estiates. Using our flash testing data and LASSO learning, the non-zero fitting coefficients are characterized. Fig. 0 provides the learned values of the odel coefficients α, based on our experiental data. Several conclusions are in order. Fig. 0. Model coefficient distribution for equation (2). First, different features (i.e., neighbor cells) contribute very differently to progra interference as there is a wide variance in their coefficients. The physical eaning of α(x,y) in Fig. 0 is the ratio of coupling capacitance between the aggressor cell (x, y) and the victi cell over the total capacitance of the victi cell. We can see that the interference of the top direct neighbor contributes ost (58%) to the total progra interference. The interference fro the cells on the leftdiagonal and right-diagonal ranks the second and contributes about %, which is /5th of the contribution of the top adjacent cell. The cells at the 2-adjacent diagonal contribute alost /5th of the contribution of the cells at the -adjacent diagonal, which shows that the coupling capacitance decreases exponentially with the distance between the aggressor cell and the victi cell. Thus, the progra interference introduced by neighbors, which are two cells away, can likely be neglected for current 2Y-n NAND flash. Note that our learning techniques can capture those coefficients if their effects ay no longer be negligible when flash eory further scales down and the distance between neighbor cells further decreases. Second, the threshold voltage already prograed on the victi cell has negative ipact on the progra interference (the coefficient α 0 is negative). The larger the original threshold voltage prograed on the victi cell, the less the interference on the victi cell would be. This is expected as a cell with a large threshold voltage is less likely affected by progra interference, as shown in detail in Sec. III-D. Model Accuracy Evaluation: After learning the paraeters of the odel in the training stage using easured training data fro a set of flash eory cells, we apply this odel to the flash cells in other locations in the sae flash chip to evaluate the accuracy of our proposed odel. Our odel would be considered accurate if it correctly predicts the threshold voltage changes in cells due to progra interference. Fig. (top) shows the threshold voltage of cells before interference (x axis) and after interference (y axis), showing that threshold voltages shift up (as we observed earlier). Fig. (botto) shows the predicted threshold voltage with our odel (y axis) versus the threshold voltage before interference. The predicted threshold voltage is obtained by subtracting the predicted threshold voltage change (estiated by our odel) fro the easured threshold voltage after progra interference. Fig.. (a) Measured Vth vs. prograed Vth (b) Vth using our odel in Equation (2) vs. prograed Vth. Black curve show the ideal case where easured and predicted Vth should be the sae as the prograed Vth. We ake two ajor observations fro Fig.. First, if we siply read the threshold voltage of cells easured after interference as an estiate of the prograed threshold voltage of cells, there is an obvious systeatic deviation and the accuracy of the easured threshold voltage is only about 83%, as shown in Fig. (top). Note that this is the state-of-art in existing literature, where flash cells are directly read without any progra interference cancellation techniques. Second, our odel in Equation (2) is effective at accurately predicting the threshold voltage of cells by cancelling the effects of progra interference, as shown in Fig. (botto). The predicted value fluctuates around the prograed value, and the accuracy of the predicted voltage is 96.8%. We conclude that our odel can accurately eliinate the error in threshold voltage easureents caused by progra interference. B. Progra Interference Noise Distribution Model In Sec. III, we observed that the progra interference coupling causes the threshold voltage of the victi cells to increase. Thus, we can odel the progra interference as additive noise to previously prograed data as: ( after) ( before) noise Vth = Vth + pg + ε (5) where V (before) th and V (after) th are the threshold voltages of the victi cells before and after neighbor cell progra interference respectively. V noise pg is the progra interference noise, which is systeatic and predictable depending on the threshold voltage changes of the neighboring aggressor cells and the original threshold voltage of the victi cell, as described in Section III. ε is rando residual noise. Progra interference on the victi cell can be caused by up to nearest neighbors and each neighbor cell ay experience K possible state changes (e.g., fro erased state to soe prograed state). Without loss of generality, we denote the state change of the i-th neighbor as N i, which is likely to be a rando event that is deterined by the data pattern prograed in the neighboring cells. Thus, the - diension vector (N, N 2,, N ) represents the state changes of all the neighbors of the victi cell. There are up to K possible rando state change event cobinations caused by neighboring cells. Thus, the probability density function (PDF) of the rando variable V noise pg of the victi cell can be expressed as:

7 p( = K i= noise pg ) = p( N, N K i= 2 p(,..., N noise pg ) p(, N, N noise pg 2,..., N N, N 2 ),..., N ) where p(n, N 2,, N ) is the expected probability of the particular cobination of state changes in neighboring cells and p( V pg noise N, N 2,, N ) is the conditional probability distribution of the progra interference given a certain cobination of neighboring cell state changes. The probability distribution of progra interference V can be odeled as a ixture of these conditional probability distributions. The coplexity of the ixture of distributions increases exponentially with the nuber of neighboring interference cells. However, as we have shown, the ost doinant source of progra interference is the direct-above-neighbor cell, which is on the sae bitline as the victi cell and the adjacent direct-neighbor wordline, i.e., cell (n+, j) to the victi cell (n, j) as in Fig. (a). Thus, the ixture distribution odel can be further siplified by considering the interference fro only this neighbor. This way, the probability density function (PDF) of progra interference noise can be siplified fro the su of K conditional probability density functions (as in Equation 6) to the su of only K conditional PDFs. We ake this siplification to ease the analysis below. For two-bit-per-cell MLC, if the progra operations are executed strictly following the sequential page order, the direct-above-neighbor aggressor cell ay have four possible state changes (i.e., Erased Erased, Erased P, Tep P2, and Tep P3, as in Fig. (b)). When rando data are prograed into the aggressor wordline, each state change is expected to occur with 25% probability. Fig. 2 shows the conditional probability distribution of the progra interference noise (i.e., threshold voltage change of the victi cells) for each possible state change. Fig. 2 also shows the cobined probability distribution, which aounts to the su of the four conditional probability distributions. This cobined distribution is the distribution one would see if the state change of the neighboring cell is not known. We conclude that the noise caused by progra interference is a ixed ulti-odal Gaussian distribution, consisting of individual discernible truncated Gaussian distributions, each corresponding to a particular state change in aggressor cells. Fig. 2. Progra interference noise distribution of one victi wordline when pages are prograed in page order with rando data. C. Effect of P/E Cycles on Progra Interference Noise Fig. 3 shows the distribution of progra interference noise under different progra/erase (P/E) cycles endured by the victi cells. Note that the noinal lifetie of 2Y-n flash eory is about 3000 P/E cycles and we explore beyond 5 ties over this noinal lifetie in our testing. The ain observation is that progra interference noise experienced by victi cells does not change significantly with P/E cycles (i.e., as flash cells age). This is because progra interference is ainly caused by the coupling capacitance between neighboring flash cells. Coupling capacitance is ainly deterined by two factors: ) aterial properties and 2) distance between neighboring floating gates. Neither of these two factors is affected by P/E cycles. The aterial used between neighboring floating gates is siply air gap [] since its relative static perittivity is alost and it can achieve sall coupling capacitance to iniize progra interference. This aterial s properties do not significantly change over P/E cycles. The distance between floating gates also do not change over P/E cycles as distance (6) is a function of anufacturing and not use of the circuit. Therefore, we conclude that the aount of progra interference does not significantly depend on P/E cycles. We observe that the progra interference noise distribution widens slightly as the nuber of P/E cycles endured by the victi cells increases. This is because progra and erase operations ay accuulate defects in the tunnel oxide which sits between floating gate and the substrate, when electrons are tunneling through due to Fowler- Nordhei echaniss during progra and erase operations. Such defects ay ake it easier for additional electrons to be inadvertently injected into the floating gate of the victi cell when neighboring cells are prograed. However, the data shown in Fig. 3 indicates that the effect of such defects on progra interference is sall copared to the large effect of coupling capacitance. Fig. 3. The probability distribution of progra interference noise for different nuber of P/E cycles endured by the victi cell. (Aggregated over one illion victi cells). D. Suary of Progra Interference Noise Modeling We ake the following ajor conclusions fro the above odeling studies: ) Progra interference can be odeled as positive and additive noise, which can be predicted by a odel that linearly cobines threshold voltage changes of aggressor cells and the threshold voltage of the victi cell before progra interference. 2) The odel coefficients can be learned by the flash controller using LASSO with L regularization [4] via online testing. Unlike past odels [3][4] this does not require any knowledge of coupling capacitance, which is unknown to the flash controller. 3) Progra interference noise follows a ulti-odal Gaussian-ixture distribution, which is coposed of a few truncated Gaussian distributions, each due to one type of neighborcell state change. 4) Progra interference noise distribution does not change significantly with P/E cycles. We believe these findings and odels can enable new ethods to alleviate the effects of progra interference noise to increase flash eory reliability. We propose and evaluate one such ethod next. V. MITIGATION: READ REFERENCE VOLTAGE PREDICTION Since we can accurately estiate the threshold voltage shift due progra interference (Sec. IV), we can also estiate the threshold voltage distribution of cells after progra interference. In this section, we show one exaple of how to take advantage of this estiation to increase the reliability of reading data fro flash eory. Fig. 4. Illustration of optiu read reference voltage before and after progra interference. Basic Idea: We show an illustration of threshold voltage distributions before and after progra interference in Fig. 4(a) and Fig. 4(b) respectively. Here, f p (x), f p2 (x) and f p3 (x) represent the threshold voltage distribution probability density function (PDF) of P, P2 and P3 states, respectively, for 2-bit MLC. V 0 and V 0 represent the lower liit of the P3 state distribution before and after progra interference. V and V represent the upper liit of P2 state