Electronic Instrumentation

Transcription

1 Electrnic Instrumentatin ENGR43 Experiment 4 Experiment 4 OpAmp Circuits Purpse: In this experiment, yu will learn abut peratinal amplifiers (r pamps). Simple circuits cntaining peratinal amplifiers can be used t perfrm mathematical peratins, such as additin, subtractin, and multiplicatin, n signals. They can als be used t take derivatives and integrals. Anther imprtant applicatin f an pamp circuit is the vltage fllwer, which serves as an islatr between tw parts f a circuit. Several pamp chips have the same pin cnfiguratin, tw examples are the 74 pamp and the LF35 pamp. The dem versin f Capture desn t have the LF35 versin available, s the mdeling will be dne using the 74 pamp (a.k.a. µ74 pamp.) The LF35 is smewhat better fr ur applicatin and will extend the battery lifetime. Mdel the experiment in PSpice using the 74 but build it using the LF35 if yu experience prblems with the 74 in the circuit. Equipment Required: DMM (HP 344A 6/ Digit Multimeter) Rensselaer IOBard Rev D (with Mbile Studi Desktp) D ltage Surce (Rensselaer IOBard, and tw 9 batteries) Students in JEC 47/44 shuld use the HP pwer supply, and avid battery issues. Analg I/O (Rensselaer IOBard) Prtbard Sme Resistrs (5, k, k and kω) ua74 r LF35 pamp (LF35 is used if ua74 in kit is bad) Helpful links fr this experiment can be fund n the links page fr this curse: Part A Intrductin t OpAmp Circuits Backgrund Elements f an pamp circuit: Figure A belw is a schematic f a typical circuit built with an pamp. Rf eedback Rf eedback k 9 k 9 3 U 7 B 6 OUT ut 6 R k R k OUT ut 5 4 B Rlad 4 OS LF35/NS ua74 Rlad in in 9 9 Figure A. Drawn with bth 74 and a LF35 pamps (Rlad kω). The circuit perfrms a mathematical peratin n an input signal. This particular pamp circuit will invert the input signal, in, and make the amplitude times larger. This is equivalent t multiplying the input by. Nte that there are tw DC vltage surces in additin t the input. These tw DC vltages pwer the pamp. The circuit needs additinal pwer because the utput is bigger than the input. Opamps always need this additinal pair 3 U3 7 OS 5 K.A. Cnnr, S. Bnner, P. Schch f 6 Revised: /3/8 Rensselaer Plytechnic Institute Try, New Yrk, USA

2 Electrnic Instrumentatin ENGR43 Experiment 4 f pwer surces. The tw resistrs R feedback and R determine hw much the pamp will amplify the utput. If we change the magnitude f these resistrs, we d nt change the fact that the circuit multiplies by a negative cnstant; we nly change the factr that it multiplies by. The lad resistr R lad is nt part f the amplifier. It represents the resistance f the lad n the amplifier. Pwering the pamp: The tw DC surces, (labeled as and, but als ften labeled as ± CC ), that prvide pwer t the pamp are typically set t have an equal magnitude but ppsite sign with respect t the grund f the circuit. This enables the circuit t handle an input signal which scillates arund, like mst f the signals we use in this curse. (Nte the signs n the surces in the circuit abve.) The schematic in Figure A shws a standard ± CC cnfiguratin fr pamps. The schematic symbls fr a battery are used in this schematic t remind us that these supplies need t be a cnstant DC vltage. They are nt signal surces. Figure A. Students in JEC 4 use tw 9 batteries fr pwer. Batteries are self explanatry. Students in JEC 47/44 shuld use the HP E363A supplies fr pwer. The HP E363A pwer supply prvides tw variable supplies with a cmmn grund (fr ± CC ) plus a variable lw vltage supply (nt used in this lab). The pwer supply jack labeled "COM" between the CC supplies shuld be cnnected t circuit grund. When yu supply pwer t the pamp, adjust the tw vltage levels s that CC and CC are equal, but ppsite in sign, at 9. These are independent and adjusted separately. Nte that in PSpice, there are tw ways t represent a surce with a negative sign. Figure A3 shws the tw ptins: yu can either set the vltage surce t a negative value, r yu can reverse the plarity f the surce. = Figure A3. The pamp chip: Study the chip layut f the LF35 and 74 pamps is shwn in Figure A4. Bth have the same pin numbers and names. Either pamp can be used withut changing the circuit. The standard prcedure n DIP (dual inline package) "chips" is t identify pin with a ntch in the end f the chip package. The ntch always separates pin frm the last pin n the chip. In the case f the LF35, the ntch is between pins and 8. Pin is the inverting input. Pin 3 is the nninverting input, and the amplifier utput, O, is at pin 6. These three pins are the three terminals that nrmally appear in an pamp circuit schematic diagram. The CC and CC cnnectins (7 K.A. Cnnr, S. Bnner, P. Schch f 6 Revised: /3/8 Rensselaer Plytechnic Institute Try, New Yrk, USA

3 Electrnic Instrumentatin ENGR43 Experiment 4 and 4) MUST be cmpleted fr the pamp t wrk, althugh they usually are mitted frm simple circuit schematics t imprve clarity. CC CC Figure A4. The balance (r null ffset) pins ( and 5) prvide a way t eliminate any ffset in the utput vltage f the amplifier. The ffset vltage (usually dented by s) is an artifact f the integrated circuit. The ffset vltage is additive with O (pin 6 in this case). It can be either psitive r negative and is nrmally less than m. Because the ffset vltage is s small, in mst cases we can ignre the cntributin OS makes t O and we leave the null ffset pins pen. Pin 8, labeled "NC", has n cnnectin t the internal circuitry f the 74 r LF35, and is nt used. Opamp limitatins: Just like all real circuit elements, pamps have certain limitatins which prevent them frm perfrming ptimally under all cnditins. The ne yu are mst likely t encunter in this class is called saturatin. An pamp becmes saturated if it tries t put ut a vltage level beynd the range f the pwer surce vltages, ± CC, Fr example, if the gain tries t drive the utput abve 9, the pamp is nt supplied with enugh vltage t get it that high and the utput will cut ff at the mst it can prduce. This is never quite as high as 9 because f the lsses inside the pamp. Anther cmmn limitatin is amunt f current an pamp can supply. Large demands fr current by a lw resistance lad can interfere with the amunt f current available fr feedback, and result in less than ideal behavir. Als, because f the demands f the internal circuitry f the device, there is nly s much current that can pass thrugh the pamp befre it starts t verheat. A third limitatin is called the slew rate and is the result f limit internal currents in the pamp. Delays caused by the slew rate can prevent the pamp circuit frm displaying the expected utput instantaneusly after the input changes. The final cautin we have abut pamps is that the equatins fr pamps are derived using the assumptin that an pamp has infinite intrinsic (internal) gain, infinite input impedance, zer current at the inputs, and zer utput impedance. Naturally these assumptins cannt be true, hwever, the design f real pamps is clse enugh t the assumptins that circuit behavir is clse t ideal ver a large range. The inverting amplifier: Figure A5 shws an inverting amplifier. Figure A5. K.A. Cnnr, S. Bnner, P. Schch 3 f 6 Revised: /3/8 Rensselaer Plytechnic Institute Try, New Yrk, USA

4 Electrnic Instrumentatin ENGR43 Experiment 4 Its behavir is gverned by the fllwing equatin: ut Rf Rin =. The negative sign indicates that the circuit will invert the signal. (When yu invert a signal, yu switch its sign. This is equivalent t an8 phase shift f a sinusidal signal.) The circuit will als amplify the input by Rf/Rin. Therefre, the ttal gain fr this circuit is (Rf/Rin). Nte that mst pamp circuits invert the input signal because pamps stabilize when the feedback is negative. Als nte that even thugh the cnnectins t and (± CC ) are nt shwn, they must be made in rder fr the circuit t functin in bth PSpice and n yur prtbard. The nninverting amplifier: Figure A6 shws a nninverting amplifier. Its behavir is gverned by the fllwing equatin: ut Rf = in. Rin in Figure A6. This circuit multiplies the input by (Rf/Rin) and, unlike the previus pamp circuit, the utput is nt an inversin f the input. The verall gain fr this circuit is, therefre, (Rf/Rin). The inverting amplifier is mre cmmnly used than the nninverting amplifier. That is why the smewhat dd term nninverting is used t describe an amplifier that des nt invert the input. If yu lk at the circuits, yu will see that in the inverting pamp, the chip is cnnected t grund, while in the nninverting amplifier it is nt. This generally makes the inverting amplifier behave better. When used as a DC amplifier, the inverting amp can be a pr chice, since its utput vltage will be negative. Hwever, fr AC applicatins, inversin des nt matter since sines and csines are psitive half the time and negative half the time anyway. Experiment The Inverting Amplifier In this part f the experiment, we will wire a very simple pamp circuit using PSpice and lk at its behavir. Wire the circuit shwn in Figure A7 belw in PSpice. R3 k 9 in R k U ua74 9 OS OUT OS ut RL k Figure A7. The input shuld have m amplitude, khz and n DC ffset. The pamp is called ua74 and is lcated in the EAL library. K.A. Cnnr, S. Bnner, P. Schch 4 f 6 Revised: /3/8 Rensselaer Plytechnic Institute Try, New Yrk, USA

5 Electrnic Instrumentatin ENGR43 Experiment 4 Be careful t make sure that the and inputs are nt switched and that the tw DC vltage supplies have ppsite signs. Nte the lcatin f the input vltage, in. In this case, R is the input resistr, Rin, s the marker ges t its left. Run a transient simulatin f this circuit that displays three cycles. What des the equatin fr this type f circuit predict fr its behavir? Use the cursrs t mark the amplitudes f the input and utput f the circuit. Calculate the actual gain n the circuit. Is this clse t the gain predicted by the equatin? Print ut this plt and include it with yur reprt. Run a transient f the circuit with a much higher input amplitude. Change the amplitude f the surce t 5 and rerun the simulatin. What des the equatin predict fr the behavir this time? Des the circuit display the utput as expected? What happened? Use the cursrs t mark the maximum value f the input and utput f the circuit. What is the magnitude f the utput f the circuit at saturatin? Print ut this plt and include it with yur reprt. Build an Inverting Amplifier In this part f the circuit, yu will build an inverting amplifier. Build the circuit using the 74 r LF35 pamp. Students in JEC 4 use batteries t prvide the 9 and 9 pwer surces. Build the inverting pamp circuit in Figure A7 n yur prtbard. Dn t neglect t wire the DC pwer vltages at pins 4 and 7. D nt cnnect pin 4 and 7 t grund. They g thrugh the pwer supply t grund. Fr students in JEC 47/44, d nt frget t set bth the psitive and negative values n the DC pwer supply. One des nt autmatically set when yu set the ther. D nt frget t attach the cmmn grund fr the pwer supply vltages t the grund fr the circuit as a whle. Examine the behavir f yur circuit. Take a picture with the IOBard sftware f the input and utput f the circuit at khz and m amplitude and include it in yur reprt. What was the gain f yur circuit at this amplitude and frequency? [Use the signals t calculate the gain, nt the values f the resistrs.] Saturatin: Change R feedback t a kω resistr. ary the amplitude f the functin generatr until the pamp utput starts t saturate. At abut what input amplitude des this happen? What is the magnitude f the utput f the circuit at saturatin? Hw des this cmpare with the saturatin vltage fund using PSpice? Summary As lng as ne remains aware f sme f their limitatins, pamp circuits can be used t perfrm many different mathematical peratins. That is why cllectins f pamp circuits have been used in the past t represent dynamic systems in what is called an analg cmputer. There are sme very gd pictures f analg cmputers and ther cmputers thrugh the ages at H.A. Layer s Mind Machine Web Museum. A link is lcated n the curse links page. Part B ltage Fllwers Backgrund The vltage fllwer: The pamp cnfiguratin in Figure B is called a vltage fllwer r buffer. Nte that the circuit abve has n resistance in the feedback path. Its behavir is gverned by the equatin: =. K.A. Cnnr, S. Bnner, P. Schch 5 f 6 Revised: /3/8 Rensselaer Plytechnic Institute Try, New Yrk, USA ut in

6 Electrnic Instrumentatin ENGR43 Experiment 4 in B A 3 ua OS OUT OS 5 6 ut If ne cnsiders nly the equatin ut in Figure B. =, this circuit wuld appear t d nthing at all. In circuit design, hwever, vltage fllwers are very imprtant and extremely useful. What they allw yu t d is cmpletely separate the influence f ne part f a circuit frm anther part. The circuit supplying in will see the buffer as a very high impedance, and (as lng as the impedance f the input circuit is nt very, very high), the buffer will nt lad dwn the input. (This is similar t the minimal effect that measuring with the scpe has n a circuit.) On the utput side, the circuit sees the buffer as an ideal surce with n internal resistance. The magnitude and frequency f this surce is equal t in, but the pwer is supplied by ± CC. The vltage fllwer is a cnfiguratin that can serve as an impedance matching device. Fr an ideal pamp, the vltages at the tw input terminals must be the same and n current can enter r leave either terminal. Thus, the input and utput vltages are the same and Z in = in /I in. In practice Z in is very large which means that the vltage fllwer des nt lad dwn the surce. Experiment A ltage Fllwer Applicatin In this part, we will investigate the usefulness f a vltage fllwer using PSpice. Begin by creating the circuit pictured in Figure B belw in PSpice. OFF = AMPL =. FREQ = k R k R k R3 Figure B. The surce has amplitude f m and a frequency f khz. The impedance f the functin generatr is assumed t be negligible and has been left ut. R and R are a vltage divider and R3 is the lad n the vltage divider. Run a simulatin that displays three cycles f the input. Run the simulatin, mark the amplitude f the vltages shwn, and print the plt fr yur reprt. If we cmbine R3 and R4 in parallel, we can demnstrate that the amplitude f the utput is crrect fr this circuit. What if ur intentin when we built this circuit was t have the input t the Ω resistr be the utput f the vltage divider? i.e. We want the vltage acrss the lad (R4) t be ½ f the input vltage. Clearly the relatinship between the magnitudes f the Ω resistr and the kω resistr in the vltage divider will nt let this ccur. A vltage fllwer is needed. K.A. Cnnr, S. Bnner, P. Schch 6 f 6 Revised: /3/8 Rensselaer Plytechnic Institute Try, New Yrk, USA

7 Electrnic Instrumentatin ENGR43 Experiment 4 Mdify the circuit yu created by adding an pamp vltage fllwer between R3 and R4, as shwn in Figure B3 n the next page: R k 9 in R3 k 3 ua74 U 7 4 OS OUT OS 5 6 ut R4 hm 9 Figure B3. The pamp is called ua74 and is lcated in the EAL library. Be careful t make sure that the and inputs are nt switched and that the tw DC vltage supplies have ppsite signs. Rerun the simulatin Place vltage markers at the three lcatins shwn. Rerun the simulatin, mark the amplitude f the vltages shwn, and print the plt fr yur reprt. What is the vltage acrss the Ω lad nw? Have we slved ur prblem? The vltage fllwer has islated the vltage divider electrically frm the lad, while transferring the vltage at the center f the vltage divider t the lad. Because every piece f a real circuit tends t influence every ther piece, vltage fllwers can be very handy fr eliminating these interactins when they adversely affect the intended behavir f ur circuits. It is said that the vltage fllwer is used t islate a signal surce frm a lad. Frm yur results, can yu explain what that means? ltage fllwers are nt perfect. They are nt able t wrk prperly under all cnditins. T see this, change R4 t Ω. Rerun the simulatin, mark the amplitude f the vltages shwn, and print the plt fr yur reprt. What d yu bserve nw? Can yu explain it? Refer t the spec sheet fr the 74 pamp n the links page. Hw have we changed the current thrugh the chip by adding a smaller lad resistance? Finally, it was nted abve that the input impedance f the vltage fllwer shuld be very large. Determine the input impedance by finding the rati f the input vltage t the input current fr the fllwer. Return the value f R4 back t the riginal Ω. Recall that R=/I. We can btain the vltage we need by placing a vltage marker at the nninverting input (U:) f the pamp. PSpice will nt allw us it place a current marker at the psitive pamp input. We can find the current anyway by finding the difference between the current thrugh R and R3. Place a current marker n R and anther n R3. Set up an AC sweep fr the circuit frm t khz. Frm yur AC sweep results, add a trace f (U:)/(I(R)I(R3)). (Nte that yur vltage divider resistrs might have different names if yu placed them n the schematic in a different rder.) Include this plt in yur reprt. What is the input impedance f the pamp in the vltage fllwer at lw frequencies? (Since PSpice tries t be as realistic as pssible, yu shuld get a large but nt infinite number.) Run the sweep again frm khz t MegHz. Is the input impedance still high at very high frequencies? (Nte M is mega and m is milli in PSPice vltage displays.) K.A. Cnnr, S. Bnner, P. Schch 7 f 6 Revised: /3/8 Rensselaer Plytechnic Institute Try, New Yrk, USA

8 Electrnic Instrumentatin ENGR43 Experiment 4 Summary The vltage fllwer is ne f the mst useful applicatins f an pamp. It allws us t islate a part f a circuit frm the rest f the circuit. Circuits are typically designed as a series f blcks, each with a different functin. The utput f ne blck becmes the input t the next blck. Smetimes the influence f ther blcks in a circuit prevents ne blck frm perating in the way we intended. Adding a buffer can alleviate this prblem. Part C Integratrs and Differentiatrs Backgrund Ideal differentiatr: Figure C shws an ideal differentiatr. Its behavir is gverned by the fllwing equatin: din = RfCin dt ut. Figure C. The utput f this circuit is the derivative f the input INERTED and amplified by Rf Cin. Fr a sinusidal input, the magnitude f the gain fr this circuit depends n the values f the cmpnents and als the input frequency. It is equal t (ω Rf Cin). The circuit will als cause a phase shift f 9. It is imprtant t remember that there is an inversin in this circuit. Fr instance, if the input is sin(t), then yu wuld expect the utput f a differentiatr t be cs(t) (a 9 phase shift). Hwever, because f the inversin, the utput phase f this circuit is 9 (9 8). Als nte that, because ne cannt build a circuit with n input resistance, there is n such thing as an ideal differentiatr. A real differentiatr differentiates nly at certain frequencies. This distinctin is discussed in the pwer pint ntes fr the curse. Ideal integratr: The circuit shwn belw in Figure C is an ideal integrating amplifier. Its behavir is gverned by the fllwing equatin: ut = in dt Rin Cf. Figure C. K.A. Cnnr, S. Bnner, P. Schch 8 f 6 Revised: /3/8 Rensselaer Plytechnic Institute Try, New Yrk, USA

9 Electrnic Instrumentatin ENGR43 Experiment 4 The utput f this circuit is the integral f the input INERTED and amplified by /(Rin Cf). Fr a sinusidal input, the magnitude f the gain fr this circuit depends n the values f the cmpnents and als the input frequency. It is equal t /(ω Rin Cf). The circuit will als cause a phase shift f 9. It is imprtant t remember that there is an inversin in this circuit. Fr instance, if the input is sin(t), then yu wuld expect the utput f an integratr t be cs(t), a 9 phase shift. Hwever, because f the inversin, the utput phase shift f this circuit is 9 (9 8). Als, because the integratin f a cnstant DC ffset is a ramp signal and there is n such thing as a real circuit with n DC ffset (n matter hw small), wiring an ideal integratr will result in an essentially useless circuit. A Miller integratr is an ideal integratr with an additinal resistr added in parallel with Cf. It will integrate nly at certain frequencies. This distinctin is discussed in the pwer pint ntes fr the curse. Experiment Using an Opamp Circuit t Integrate an AC Signal in PSpice In this sectin, we will bserve the peratin f a Miller integratr n a sinusid. Yu will examine the way in which the prperties f the integratr change bth the amplitude and the phase f the input. Build the integratin circuit shwn belw in Figure C3. shuld have a m amplitude and khz frequency. R k k C uf 9dc OFF = AMPL =. FREQ = k AC =. Run a transient analysis. in R k 3 ua74 U 9dc 7 4 OS OUT OS Figure C3. We want t set up the transient t shw five cycles, but we als want t display the utput starting after the circuit has reached its steady state. Set the run time t 5ms, the start time t ms, and the step size t 5us. Obtain a plt f yur results. Just like in mathematical integratin, integratrs can add a DC ffset t the result. Adjust yur utput s that it is centered arund zer by adding a trace that adds r subtracts the apprpriate DC value. After yu have dne this, mark the amplitude f yur input and utput with the cursrs. Print this plt and include it in yur reprt. 5 6 ut Rlad k Use the equatins fr the ideal integratr t verify that the circuit is behaving crrectly. The equatin that gverns the behavir f this integratr at high frequencies is given by: TO ADC if ω c >> then vut ( t) vin( t) dt R C R C Recall that the integratin f sin(ωt) = (/ω)cs(ωt). Therefre, the circuit attenuates the integratin f the input by a cnstant equal t /ωrc. The negative sign means that the utput shuld als be inverted. What is there abut the transient respnse that tells yu that the circuit is wrking crrectly? Is the phase as expected? The amplitude? Abve what frequencies shuld we expect this kind f behavir? Nw we can lk at the behavir f the circuit fr all frequencies. TO ADC K.A. Cnnr, S. Bnner, P. Schch 9 f 6 Revised: /3/8 Rensselaer Plytechnic Institute Try, New Yrk, USA

10 Electrnic Instrumentatin ENGR43 Experiment 4 D an AC sweep frm m t khz. Add a secnd plt and plt the phase f the vltage at ut. (Either add a p(ut) trace r add a phase marker at the utput f the circuit.) What shuld the value f the phase be (apprximately) if the circuit is wrking mrerless like an integratr? Mark the regin n the plt where the phase is within ± f the expected value. Print this plt Yu will mark this sweep with the data frm the circuit that yu build. We can als use PSpice t check the magnitude t see when this circuit acts best as an integratr. Rerun the sweep. D nt add the phase this time. Using the equatin abve, we knw that at frequencies abve fc, ut = in /(ωrc), where R = R, C = C, and ω = πf. [We plt the negatin f the input because the equatin fr the transfer functin f the circuit has an inversin. In a sweep, nly the amplitude matters, s the sign is nt imprtant.] Change the plt fr the AC sweep f the vltage t shw just ut and in /(ωrc). Nte that yu need t input the frequency ω as *pi*frequency in yur PSpice plt. (Pspice recgnizes the wrd pi as the value f π and the wrd Frequency as the current input frequency t the circuit. Als nte that yu must enter numbers fr R and C.) When are these tw signals apprximately equal? It is at these frequencies that the circuit is acting like an integratr. Mark the pint at which the tw traces are within m f each ther. Calculate fc=/(πrc). Hw clse are the amplitudes f the tw signals at that frequency? At a frequency much greater than fc, the circuit shuld start behaving like an integratr. Mark the crner frequency n yur plt. Print this plt. Using an Opamp Integratr t Integrate a DC Signal Anther way t demnstrate that integratin can be accmplished with this circuit is t replace the AC surce with a DC surce and a switch. R k k C uf 9dc TO ADC. TCLOSE =. U3 R k U ua74 9dc OS OUT OS 5 6 ut Rlad k TO ADC Figure C4. Mdify yur circuit by replacing the AC surce with a DC surce and a switch as shwn in Figure C4. Nte that the switch is set t clse at time t=.sec. Use a vltage f. t avid saturatin prblems. The switch is called Sw_tClse and is in the EAL library. Analyze the circuit with PSpice. D a transient analysis fr times frm t 5ms with a step f us. Rather than pltting the utput vltage (vltage at ut), plt the negative f the utput vltage. Yu shuld see that this circuit des seem t integrate reasnably well. Print this plt. K.A. Cnnr, S. Bnner, P. Schch f 6 Revised: /3/8 Rensselaer Plytechnic Institute Try, New Yrk, USA

11 Electrnic Instrumentatin ENGR43 Experiment 4 Hw clse is the utput f yur circuit t an integratin f the input? The integratin f a cnstant shuld be a ramp signal f slpe equal t the cnstant. The utput f an integrating pamp circuit shuld be the inversin f the ramp signal multiplied by a cnstant equal t (/(RC)). Calculate the apprximate slpe f the utput. Write it n yur utput plt. Als write the theretical slpe n the plt. Fr what range f times des it integrate reasnably well? (This is smewhat subjective.) Mdify the feedback capacitr Decrease C t.µf and repeat the simulatin. Only run it frm t 4ms this time. Dn t frget t plt the negative f the utput vltage. Print yur utput. Mark the theretical slpe n the plt. Calculate the theretical slpe f the utput. Dn t frget that the cnstant, /(RC), is different because C has changed. Des the circuit integrate even apprximately fr any perid f time? Can yu think f any reasn why we might prefer t use a smaller capacitr in the feedback lp, even thugh the circuit des nt integrate as well ver as lng a perid f time? Create an ideal integratr The circuit we have been lking at is a Miller integratr. An ideal integratr des nt have an extra resistr in the feedback path. What wuld happen if we changed ur circuit t an ideal integratr? Set the feedback capacitr back t its initial value f uf. Remve the resistr frm the feedback lp and run yur transient analysis again. Yu shuld see that the circuit n lnger wrks. Negate the utput vltage again. Print yur utput. What is wrng with the utput? The ideal integratr circuit will perate n bth the AC and DC inputs. In any real circuit n matter hw gd yur equipment is nise will create a small variable DC ffset vltage at the inputs. The prblem with this circuit is that there is n DC feedback t keep the DC ffset at the input frm being integrated. Therefre, the utput vltage will cntinuusly increase and, in additin, it will be amplified by the full intrinsic gain f the pamp. This immediately saturates the pamp. Building an Opamp Integratr and an Opamp Differentiatr In this part f the experiment, we will build an pamp integratr and an pamp differentiatr n the prtbard and lk at the utput fr a variety f inputs. Build the pamp integratr circuit as shwn in Figure C3. Observe the behavir f the circuit at three representative frequencies. Use the sine wave frm the functin generatr fr the vltage surce, set the amplitude t. (.4 PP ). Obtain measurements f the input and utput vltages at frequencies f 5Hz, khz, and 5kHz. Add yur experimental pints fr bth the amplitude and phase t yur PSpice AC sweep plt fr the abve circuit. Obtain a picture f each f these signals with the Mbile Studi sftware. Observe the utput f the integratr fr different types f inputs Set the functin generatr t a frequency that gives reasnable signal amplitude and integrates fairly well. This is smewhat subjective; we just want yu t see the shapes f the utputs fr different input wave shapes. Set the functin generatr t the fllwing types f inputs: sine wave triangular wave square wave What shuld the integratin f each f these types f inputs be? Take a picture f the utput fr each input with the Mbile Studi sftware. Create a differentiatr. K.A. Cnnr, S. Bnner, P. Schch f 6 Revised: /3/8 Rensselaer Plytechnic Institute Try, New Yrk, USA

12 Electrnic Instrumentatin ENGR43 Experiment 4 R k 9dc 3 in C n uf 3 ua74 U 7 4 OS OUT OS 5 6 ut 9dc R4 k Figure C5. Remve the feedback capacitr, C. Replace R with an input capacitr, C=µF. Replace the k feedback resistr with a k resistr, R. Yur circuit shuld nw lk like Figure C5. Set the functin generatr t a frequency that gives a reasnable signal amplitude and differentiates fairly well. This is smewhat subjective; we just want yu t see the shapes f the utputs fr different input wave shapes. Observe the utput f the differentiatr fr different types f inputs. Set the functin generatr t the fllwing types f inputs: sine wave triangular wave square wave What shuld the differentiatin f each f these types f inputs be? Take a picture f each situatin with the Mbile Studi sftware. Summary Opamp circuits can be used t d bth integratin and differentiatin. The ideal versins f bth circuits are nt realizable. Therefre, the real versins f these circuits d nt wrk well at all frequencies. Als, as bth types f circuits apprach ptimal mathematical perfrmance, the amplitude f the utput decreases. This makes designing an integratr r a differentiatr a tradeff between the desired mathematical peratin and signal strength. Part D Using OpAmps t Add and Subtract Signals Backgrund Opamp adders: Figure D belw shws an adder. Its behavir is gverned by the fllwing equatin: = Rf R R ut. K.A. Cnnr, S. Bnner, P. Schch f 6 Revised: /3/8 Rensselaer Plytechnic Institute Try, New Yrk, USA

13 Electrnic Instrumentatin ENGR43 Experiment 4 Figure D. The gain fr each input t the adder depends upn the rati f the feedback resistance f the circuit t the value f the resistr at that input. The adder is smetimes called a weighted adder because it prvides a means f multiplying each f the inputs by a separate cnstant befre adding them all tgether. It can be used t add any number f inputs and multiply each input by a different cnstant. This makes it useful in applicatins like audi mixers. The differential amplifier: The circuit in Figure D is a differential amplifier, als called a difference amplifier. Its Rf Rin behavir is gverned by the fllwing equatin: ( ) ut =. Figure D. It amplifies the difference between the tw input vltages by Rf/Rin, which is the verall gain fr the circuit. Nte that the ability f this amplifier t effectively take the difference between tw signals depends n the fact that it uses tw pairs f identical resistances. Als nte that the signal that is subtracted ges int the negative input t the pamp. Be careful with the term differential. In spite f its similarity t the term differentiatin, the differential amplifier des nt differentiate its input. Amplifying the utput f a bridge circuit: Yu may recall frm Experiment 4, that it was difficult t measure the AC vltage acrss the utput f the bridge circuit because bth f the utput cnnectins had a finite DC vltage. Withut a special prbe, the black leads f the scpe are always attached t grund. That meant that ne culd nt just cnnect ne f the scpe channels acrss the utput, since the scpe wuld shrt ne f the vltages t grund. The differential amplifier allws us t get by this prblem, since neither input is grunded. A very large fractin f measurement circuits use sme kind f a bridge cnfiguratin r are based n sme kind f cmparisn between tw vltages. Thus, the peratin f the differential amplifier is very imprtant t understand fr prject. Experiment PSpice Simulatin f an Adder Set up the circuit shwn in Figure D3 in PSpice. Nte the plarity f the vltage surces prviding ±cc t the pamp. Nte that the amplitude f the surce, 3, is and that the amplitude f the surce, 4, is. K.A. Cnnr, S. Bnner, P. Schch 3 f 6 Revised: /3/8 Rensselaer Plytechnic Institute Try, New Yrk, USA

14 Electrnic Instrumentatin ENGR43 Experiment 4 Run a simulatin that shws 3 cycles f the input. What is the gain f the adder? What shuld it d t the tw input signals? Is the adder wrking crrectly? Include this simulatin with yur reprt. Adders are ften used as mixers that give different emphasis t each input signal and then cmbine the inputs tgether int ne signal. What wuld we have t set R t, if we wanted twice as much f the signal frm 3 t pass thrugh the adder as the signal frm 4. [Nte: This des nt mean changing nthing because 3 already has twice the amplitude as 4. It means mixing in twice as much f the amplitude f 3 as the amplitude f 4 int the final utput signal.] Mdify resistr R, rerun the simulatin, and verify that the utput f the signal is as expected. Include the utput f the simulatin in yur reprt. Summary Figure D3. In this experiment we used an adder t add tw signals. Then, we mdified it s that it wuld cmbine the signals with different emphasis, as in an audi mixer. Reprt and Cnclusins The fllwing shuld be included in yur written reprt. Everything shuld be clearly labeled and easy t find. Partial credit will be deducted fr pr labeling r unclear presentatin. Part A (4 pints) Include the fllwing plts:. PSpice transient f inverting amplifier with input amplitude f m and bth traces marked. ( pt). PSpice transient f inverting amplifier with input amplitude f 5 and bth traces marked. ( pt) 3. IOBard picture f inverting amplifier circuit. ( pt) K.A. Cnnr, S. Bnner, P. Schch 4 f 6 Revised: /3/8 Rensselaer Plytechnic Institute Try, New Yrk, USA

15 Electrnic Instrumentatin ENGR43 Experiment 4 Answer the fllwing questins:. What is the theretical gain f yur inverting amplifier? What gain did yu find with PSpice when the input amplitude was m? Hw clse are these? ( pt). What was the actual gain yu gt fr the inverting amplifier yu built? Hw did this cmpare t the theretical gain? Hw did this cmpare t the PSpice gain? ( pt) 3. What value did yu get fr the saturatin vltage f the 74 pamp in PSpice? What value did yu get fr the saturatin vltage f the real pamp in yur circuit? Hw d they cmpare? ( pt) 4. At what input vltage did the pamp in the amplifier yu built n the prtbard begin t saturate? ( pt) Part B ( pints) Include the fllwing plts:. PSpice transient f the vltage divider with Ω lad and n vltage fllwer. ( pt). PSpice transient f the vltage divider with Ω lad and a vltage fllwer. ( pt) 3. PSpice transient f the vltage divider with Ω lad and a vltage fllwer. ( pt) 4. PSpice AC sweep f the input impedance fr the vltage fllwer. ( pt) Answer the fllwing questins:. Cmpare the transients f the utput with and withut the buffer circuit in place. What is the functin f the buffer circuit? ( pt). Why is the fllwer unable t wrk prperly with a small lad resistr? ( pt) 3. What is the typical value f the input impedance f the vltage fllwer when it is wrking prperly at lw frequencies? ( pt) 4. Is the magnitude f the input impedance f the vltage fllwer high enugh at high frequencies fr it t wrk effectively? ( pt) Part C (38 pints) Include the fllwing plts:. PSpice transient plt f the integratr. ( pt). AC sweep f amplitude (with three experimental pints marked) and phase (with three experimental pints marked.) The frequency at which the phase gets clse t ideal shuld als be marked. (3 pt). AC sweep plt f the integratr vltage and in/ωrc with the lcatin f fc and the place where the vltage gets clse t ideal indicated. ( pt) 3. PSpice plts f the integratr with DC surce with slpe and theretical slpe (if any) indicated n plt. One shuld be when C=uF and the ther fr C=.uF ( plts) ( pt) 4. PSpice plt f the ideal integratr (withut feedback resistr) ( pt) 5. IOBard pictures f yur circuit trace (input vs. utput) at 5Hz, khz and 5kHz. (3 plts) (3 pt) 6. IOBard pictures f yur integratr utput with sine wave, triangular wave and square wave inputs (input vs. utput) (3 plts) (3 pt) 7. IOBard picture f yur differentiatr utput with sine wave, triangular wave and square wave inputs (input vs. utput) (3 plts) (3 pt) Answer the fllwing questins:. Using the rules fr analyzing circuits with pamps, derive the relatinship between ut and in fr the integratr circuit. (3 pt). Why is the integratr als called a lwpass filter? Take the limits f the transfer functin at high and lw frequencies t demnstrate this. (3 pt) 3. What are the features f the AC sweep and transient analysis f an integratr that shw it is wrking mrerless as expected accrding t the transfer functin? Fr abut what range f frequencies des it act like an inverting amplifier? Fr abut what range f frequencies des it act like an integratr? (3 pt) 4. Cnsider the phase shift and the change in amplitude f the utput in relatin t the input when the circuit is behaving like an integratr. Use the expected change in phase and amplitude (frm the ideal equatin) t demnstrate that the circuit is actually integrating. (3 pt) 5. Why wuld we prefer t use the.uf capacitr in the feedback lp even thugh the circuit des nt integrate quite as well ver as large a range? ( pt) K.A. Cnnr, S. Bnner, P. Schch 5 f 6 Revised: /3/8 Rensselaer Plytechnic Institute Try, New Yrk, USA

16 Electrnic Instrumentatin ENGR43 Experiment 4 6. What happens when we try t use an ideal integratr? ( pt) 7. In the hardware implementatin, yu used a squarewave input t demnstrate that the integratr was wrking apprximately crrectly. If it were a perfect integratr, what wuld the utput wavefrm lk like? Is it clse? (3 pt) 8. When we built the differentiatr, what did the utput wavefrm lk like fr the squarewave input? What did the differentiatr circuit utput lk like fr a triangular wave input? If it were a perfect differentiatr, what wuld the utput wavefrm lk like? Is it clse? (3 pt) Part D ( pints) Include the fllwing plts:. Transient simulatin f the utput f the adder with bth input resistrs set t k. ( pt). Transient simulatin frm PSpice with R mdified. ( pt) Answer the fllwing questins:. Demnstrate that the riginal adder circuit (plt D) wrks as expected. (3 pt). Demnstrate that the mdified adder circuit (plt D) wrks as expected. (3 pt). 3. Give an example f a system (electrical, mechanical, chemical r sme cmbinatin) with negative feedback and an example f a system with psitive feedback. ( pt) Overall (8 pints). Material shuld be in lgical rder, easy t fllw and cmplete. (6pt). List member respnsibilities. ( pt) Ttal: 8 pints fr write up fr attendance = pints Attendance: 3 classes ( pints), classes ( pints), class ( pints), ut f pssible pints Minus 5 pints fr each late. N attendance at all = N grade fr experiment. K.A. Cnnr, S. Bnner, P. Schch 6 f 6 Revised: /3/8 Rensselaer Plytechnic Institute Try, New Yrk, USA