IPv6 Lookups using Distributed and Load Balanced Bloom Filters for 100Gbps Core Router Line Cards


 MargaretMargaret Morrison
 1 years ago
 Views:
Transcription
1 This full text pape was pee eviewed at the diectin f IEEE Cmmunicatins Sciety subject matte expets f publicatin in the IEEE INFOCOM 2009 pceedings IPv6 Lkups using Distibuted and Lad Balanced Blm Filtes f 00Gbps Ce Rute Line Cads Hayu Sng, Fang Ha, Muali Kdialam, TV Lakshman Bell Labs, AlcatelLucent Hlmdel, NJ, 07733, USA {hayusng, fangh, mualik, Abstact Intenet line speeds ae expected t each 00Gbps in a few yeas T match these line ates, a single ute line cad needs t fwad me than 50 millin packets pe secnd This equies a cespnding amunt f lngest pefix match peatins Futheme, the inceased use f IPv6 equies ce utes t pefm the lngest pefix match n seveal hunded thusand pefixes vaying in length up t 64 bits It is a challenge t scale existing algithms simultaneusly in the thee dimensins f inceased thughput, table size and pefix length Recently, Blm filtebased IP lkup algithms have been ppsed While these algithms can take advantage f hadwae paallelism and fast nchip memy t achieve high pefmance, they have significant dawbacks (discussed in the pape) that impede thei use in pactice In this pape, we pesent the Distibuted and Lad Balanced Blm Filtes t addess these dawbacks We develp the pactical IP lkup algithm f use in 00Gbps line cads The egula and mdula hadwae achitectue f u scheme diectly maps t the statefat ASICs and FPGAs with easnable esuce cnsumptin Als, u scheme utpefms TCAMs n mst metics including cst, pwe dissipatin, and bad ftpint I INTRODUCTION T keep up with eveinceasing ptical tansmissin ates, Intenet ce utes need t fwad packets as fast as pssible This equies faste and faste implementatins f packetpcessing functins such as IP lkup the Lngest Pefix Matching (LPM) peatin needed t detemine the nexthp f incming packets The next hp is detemined by fist pefming a lngest pefix match f the destinatin IP addess f incming packets against a set f pefixes sted in a pefix table Once a match is fund, the nexthp infmatin assciated with the matched pefix is etieved The pefix table can typically have a few hunded thusand pefixes, with pefix lengths vaying fm 8 t 32 f IPv4 addesses F IPv6, the pefix lengths can vay fm 6 t 64 bits The challenges in implementing the lkup peatin ae in accmmdating lage table sizes, achieving the 50 millin me lkups pe secnd needed f the new 00Gbps intefaces while keeping memy, pwe cnsumptin and bad ftpint lw The numbe f IPv4 pefixes in a ce ute BGP table has exceeded 250K ecently, and is inceasing at a ate f a few tens f thusands f pefixes a yea [3] While the cuent IPv6 table is still elatively small, the envisaged lage scale deplyment f IPv6 will esult in table sizes at least as lage as that f IPv4 Highend ce utes such as Cisc s CRS [4] and Junipe s T640 [5] cuently can have 40G line cads with a packet fwading ate f abut 50Mpps Meanwhile, 00GbE standads ae expected t be cmpleted by 200 T meet evegwing taffic needs, pestandad 00GbE pducts (needing a fwading ate f 50 Mpps) ae expected t be available in the maket in abut the same time fame One pssibility f IP lkups is the use f TCAMs TCAMs suppt 250M+ lkups pe secnd Hweve, thei high pwe dissipatin and lage ftpint ae maj disadvantages T limit the veall system pwe cnsumptin, nly a few hunded watts ae typically budgeted f each line cad A TCAM chip alne easily cnsumes me than 20W f pwe F 00Gbps line cads it is cnceivable that many the necessay cmpnents such as the high speed tansceives will inevitably cnsume me pwe necessitating a cespnding eductin in pwe cnsumptin elsewhee in de t stay within the alltted pwe budget In additin, me and me functins and mdules need t fit n a line cad making ftpint an imptant metic It is desiable t avid the use f lw density chips when pssible It has lng been agued that the butefce way f seaching pefixes in TCAM esults in vey inefficient stage and uses t many bits pe pefix F example, a TCAM uses 6 tansists t ste a bit while an SRAM uses nly six IPv6 esults in a twfld wsening ve IPv4 because f the much lnge pefixes that need t be sted In additin t these disadvantages, an incemental pefix update in TCAM invlves as many memy peatins as the numbe f unique pefix lengths This causes an exta pefmance penalty f IPv6 Because f these disadvantages, TCAMs ae bette suited when the pefmance f algithmic altenatives cannt match as in the case f packet classificatin and deep packet inspectin F IP lkup, algithmic appaches can achieve high ates with cmpact stage needs Cmpact stage pemits the use f fast memies such as SRAMs ecnmically and als the effective use f nchip memy t achieve high thughputs The fist IP lkup algithms wee implemented in sftwae unning n hstbased utes with slw SDRAMs used f stage The next geneatin f chassisbased utes had dedicated line cads f packet fwading, with faste but smalle SRAMs n the line cads used t ste the pefix table As the thughput needs utpaced SRAM speeds, nchip memy began getting used as caches f the pefix table /09/$ IEEE
2 This full text pape was pee eviewed at the diectin f IEEE Cmmunicatins Sciety subject matte expets f publicatin in the IEEE INFOCOM 2009 pceedings t facilitate faste IP lkups Cuently, a few tens f megabits f fast memy n a chip is feasible and effective use f nchip memy has pved t be vey citical in satisfying the thughput equiements f the next geneatin netwk applicatins [8] In this pape, we pesent a new lkup scheme based n a new data stuctue called Distibuted and Lad Balanced Blm Filtes (DLBBF) This scheme is scalable t vey high line speeds, can handle lage table sizes, and many pefix lengths Its hadwae achitectue can be diectly mapped t statefat ASICs and FPGAs with easnable esuce cnsumptin and can suppt the nnstp linespeed fwading needed in the next geneatin 00Gbps ce ute line cads The pape is ganized as fllws: Sectin II discusses elated wk, dawbacks f sme existing schemes and the mtivatin f u wk Sectin III descibes u new data stuctue and lkup algithm in detail The pefmance f the algithm is analyzed in Sectin IV Sme pactical hadwae implementatin issues ae discussed and an FPGA pttype is evaluated in Sectin V Cncluding emaks ae in Sectin VI II BACKGROUND A Cnventinal IP Lkup Algithms IP lkup algithms have been well studied in the past The tiebased algithms, such as LCtie [22], Lulea [7], Multibit Tie [27], Tee Bitmap [0], and Shape Shifting Tie [26], ae simple and memy efficient Hweve, thei pefmance degades linealy as the tee depth inceases and this makes them unsuitable f 00Gbps IPv6 lkups Anthe appach t fast IP lkups is the use f memy pipelines [2], [8], [9] A deep pipeline can be used t pduce ne lkup esult evey clck cycle but this appach has seveal dawbacks Althugh the pblem f imbalanced memy size f each pipeline stage has been slved ecently, the aggegated memy bandwidth needed by all the pipeline stages is vey high making it difficult t implement with cmmdity memy devices The lnge pefix lengths f IPv6 wsen this pblem and even the use f a dedicated lkup engine with embedded memy in the pipeline stages des nt educe the cmplexity sufficiently Caching ecent lkup esults using nchip memy is discussed in [6] This appach wks fine if thee is sufficient tempal lcality in the lkups Hweve, such lcality is lw in ce utes whee flws ae well intemixed and the cache hit ate is lw In additin, it is pefeable t use schemes that ae deteministic and nt subject t the vaiability in lkup times esulting fm cache misses Althugh caching using nchip memy may nt be desiable, the idea f using fast nchip memy t achieve speedup has mtivated the use f Blm filtes as cmpact datastuctues that can be used f implementing fast lkups B Blm Filte The use f Blm filtes [] in netwking applicatins has been f much ecent eseach inteests [3] Numeus vaiatins f the basic Blm filte have been ppsed f diffeent applicatins [4], [5], [] The basic Blm filte is a memyefficient data stuctue that stes a signatue f an item using just a few bits, egadless f the size f the item itself Given a set f n items and an mbit aay, each item sets up t k bits in the aay using k independent hashes t index int the aay Due t hash cllisins, a bit can be set by multiple items When queying the membeship f an item, the item is fist hashed using the same set f hash functins and then the k bits t which the hash values pint ae examined If any bit is ze, ne can be cetain that the item is nt a membe If all the k bits ae ne, the item can be claimed t be a membe with a small false psitive pbability The false psitive pbability p f is a functin f m, n, and k and can be cmputed as belw: p f =( e kn/m ) k () Blm filtes have the advantage that they can epesents a set f items vey cmpactly and hence making them amenable f nchip stage Hweve, seveal issues need t be cnsideed in making Blm filtes viable f fast IP lkups Fist, t minimize false psitive pbabilities, the numbe f hash functins needed by the Blm filte can be lage (specifically, k = m ln 2/n is the ptimal value) If the Blm filte is implemented using a singlept memy blck, ne Blm filte lkup takes as many memy accesses as the numbe f hash functins This can make the achievable thughput fa belw what is desied Multipt memies can eslve this issue by pemitting multiple simultaneus accesses t memy An Npt memy leads t N speedup ve a singlept memy Hweve, seveal pactical cnstaints limit the numbe f memypts Multiple pts incease the pin cunt, the pwe cnsumptin, and the ftpint f the memy mdule Theefe, N cannt be lage Althugh memies with 3 me pts ae pssible, the mst pactical ptin is a 2pt memy This pt cnstaint has t be accunted f in the design f fast Blmfilte based lkup schemes Secnd, a gd univesal hash functin is cmputatinally intensive and can lwe thughput Ideally, the hash functin must be cmputable in ne clck cycle with lw lgic needs and withut the use f pipelines that can intduce latency Fast cmputatin f a lage numbe f gd, independent hash functins is a challenge Thid, the pssibility f false psitives equies a secnd veificatin step This secnd step is als needed t access the nexthp and the assciated infmatin since the Blm filte itself cannt diectly ste this infmatin This secnd step must als be pefmed in an efficient manne t avid pefmance bttlenecks that might ffset the gains fm use f the Blm filte We addess all these issues in u ppsed Blmfilte based methd f fast IP lkups
3 This full text pape was pee eviewed at the diectin f IEEE Cmmunicatins Sciety subject matte expets f publicatin in the IEEE INFOCOM 2009 pceedings Fig Using Blm Filtes f IP Lkup C IP Lkup using Blm Filtes The idea f using Blm filtes f IP lkup was fist ppsed in [8] We efe t this scheme as PBF in the est f the pape PBF essentially is a hashbased algithm IP lkup using hash tables has been ppsed befe [2], [24], but Blm filtes use nchip memy much bette and explit the intinsic hadwae paallelism Figue shws the basic achitectue f PBF Fist, IP pefixes ae patitined int gups based n thei pefix lengths Next, each gup is assigned a Blm filte that stes the pefixes in that gup F IP lkup, the Blm filtes f all gups ae checked in paallel A subset f the Blm filtes may ept a match This culd be due t finding matching pefixes in the Blm filtes due t false psitives T veify that thee is an actual match, we stat with the Blm filte cespnding t the lngest pefix (since we ae inteested in finding the lngest matching pefix) and check the match using an ffchip pefix table If a tue match is fund, we etieve the necessay nexthp infmatin Othewise, we cntinue the check using the next lngest match indicated by the Blm filtes Typically, we expect nly ne ffchip lkup using a hash table t find the eal match since the false psitive pbabilities ae lw by design This scheme is simple and can have gd aveage case pefmance Hweve, as we discuss belw, it has seveal dawbacks that makes pactical use difficult One issue is that when multiple Blm filtes indicate false psitives, the ffchip pefix table has t be seached multiple times (equal t the numbe f pefix lengths in the wst case) Althugh this may happen vey infequently, the esulting vaiability in fwading ate culd be an issue since wstcase pefmance is an imptant metic in ute design One methd f impving the wstcase pefmance hee is t educe the numbe f pefixlength gups This equies aggegating pefixes f diffeent lengths int a single Blm filte s that the numbe f gups ( Blm filtes) is educed This aggegatin can be dne by using pefix expansin [27] The tadeff is that the impvement in the wstcase pefmance cmes at the cst f highe memy use because pefix expansin can significantly incease the size f the pefix table [27] Expeiments shw a geate than fivefld table size expansin when the numbe f pefixlength gups is educed t 3 (with theshlds f 20, 24, and 32) f a mdeate sized IPv4 table with abut 00K pefixes [8] The expansin is wse f lage tables In additin, pefix expansin makes uting updates, which happen faily fequently in ce utes, much me timecnsuming and cmplex Multiple expanded pefixes need t be mdified when nly a single iginal pefix is inseted deleted Hence, the algithm is nt well suited f lage tables and lnge pefixes Anthe issue is that the numbe f pefixes in each pefixlength gup is highly vaiable and changes dynamically with uting updates A ecent snapsht f the IPv4 BGP table cntains abut 34K pefixes f the lagest gup (pefix length f 24) but nly 9 f the smallest gup (pefix length f 9) Meanwhile, the aveage pefix length keeps shifting between 2 and 24 The pecentage f pefixes in the lagest gup f length 24 can vay fm 40% t 70% [3] T educe the false psitive ate and t best utilize scace nchip memy, we need t custmize the size f each Blm filte as well as the numbe f hash functins based n the numbe f pefixes in that gup We als need t be able t adapt t the cuent pefix distibutin by adjusting the memy allcatin dynamically Engineeing such a system is difficult and expensive it equies vepvisining f memy the capability t ecnfigue hadwae Neithe f this is feasible since nchip memy is scace and ecnfiguing FPGAs in pactice takes seveal secnds Als, fwading functins ae ften hadcded in ASICs which cannt be ecnfigued A thid issue is that necycle lkups assume that the Blm filtes ae implemented using kpt memy whee k is the numbe f hash functins As discussed ealie, this is impactical unless k is 2 3 In the next sectin, we ppse a new data stuctue, Distibuted and Lad Balanced Blm Filtes (DLBBF), that we use t addess all these issues Ou ppsed lkup scheme is wellsuited f hadwae implementatin and can be used in 00Gbps line cads pefming IPv6 lkups III DLBBF FOR IP LOOKUPS A Basic Achitectue While the ttal numbe f pefixes is elatively stable, thei distibutin n length is highly dynamic Ovepvisining multiple vaiablesized Blm filtes esults in inefficient memy use It is desiable t use just ne ptimized Blm filte t ste all the n pefixes Als, if we use just ne Blm filte we d nt have the pefix expansin pblem n the pblem f managing memy allcatin f Blm filtes that vay widely in the numbe f elements sted (fm a few pefixes t seveal hundeds f thusands) Figue 2(a) illustates the scheme using a single Blm filte (SBF) Even thugh a single Blm filte is used, each pefix gup has its wn set f hash functins A nice featue is that
4 This full text pape was pee eviewed at the diectin f IEEE Cmmunicatins Sciety subject matte expets f publicatin in the IEEE INFOCOM 2009 pceedings B l D is t ib u te d m F ilte B l m F ilte B l m F ilte 2 D is tib u te d B l m F ilte k D is tib u te d (a) (b) Fig 2 Distibuted and Lad Balanced Blm Filtes all pefix gups need the same numbe f hash functins, k, that is ptimal f the SBF Let thee be x i pefixes in pefix gup i Each pefix is hashed k times t set at mst k bits in the Blm filte Oveall, at mst Σ g i= x ik = nk bits can be set Althugh this SBF achitectue has many desiable ppeties it has a seius dawback in that it des nt pemit paallel seaches and a sequential seach is needed n each pefix length In the wst case, up t g sequential seaches ae needed if g distinct pefixlength gups ae pesent T vecme this dawback while etaining the advantages f SBF, we develp the DLBBF achitectue As shwn in Figue 2(b), we patitin the Blm filte int k equal sized distibuted Blm filtes We name each patitin a distibuted Blm filte even thugh each patitin by itself is n lnge a eal Blm filte in the classical sense We futhe egup the g hash functin gups, each with k hash functins, t k new hash functin gups, each with g hash functins This is dne as descibed belw: the ith hash functin f each iginal gup fms the ith new gup, whee i anges fm tk Each gup f g hash functins is assciated with a distibuted Blm filte Nw in any new hash functin gup, each hash functin maps t a diffeent pefix length This means that in the pefix stage pcess each pefix will set exactly ne bit in the cespnding distibuted Blm filte and s at mst n bits can be set Since we have k distibuted Blm filtes, kn bits can be set veall This is the same numbe f bits as the SBF case We call the new achitectue DLBBF This is because we have t cnside all the distibuted Blm filtes as a whle t check pefix membeship and because all the distibuted Blm filtes have the same lad This lad balancing is imptant f a egula and mdula implementatin In Sectin IV, we will fmally pve that the false psitive pbability f DLBBF is identical t the SBF as well as t that f [8] in the ideal cnfiguatin The new data stuctue allws IP lkups t be pefmed in paallel n all the DLBBFs Each DLBBF seach utputs a gbit vect If bit i is set, it indicates a pefix match ( pssibly a false psitive) in pefixlength gup i When we pefm a bitwise AND peatin n all the kbit vects, the esulting bit vect indicates the eal match with a vey high pbability just as in the SBF case B Futhe Impvements Since all the DLBBFs can be seached in paallel, the system thughput is detemined by the lkup ate f a single DLBBF, which in tun is detemined by the hash functin calculatin speed and the numbe f memy pts, as discussed in Sectin II We defe the hash functin issue t Sectin V Hee, We fcus n the DLBBF access speed pblem assuming that a singlecycle hashfunctin cmputatin is pssible Assume that nly pt SRAM blcks ae available, we futhe patitin a DLBBF int t patial DLBBFs with each being implemented in ne pt SRAM blck T ste pefixes in the DLBBF, each value geneated by a hash functin cmpises tw pats: the SRAM blck ID and the bucket addess in the SRAM blck By ding this, the lad f each patial DLBBF is balanced statistically, accepting abut n/t hashes The shaded aea in Figue 2 is enlaged in Figue 3 t shw the details F IP lkups, the g hash values in each DLBBF is sent t the schedule fist The task f the schedule is t maximize the numbe f SRAM blcks and pts used in ne cycle The cllect is espnsible f eganizing the SRAM utputs and geneating the gbit matching vect Ideally, if each SRAM blck eceives n me than access equests, the seach n each DLBBF can be dne in just ne clck cycle Hweve, in the wstcase when all the g accesses t a DLBBF happen t be cncentated t the same SRAM blck, g/ cycles ae needed We analyze the aveage numbe f accesses needed t finish ne DLB BF lkup in Sectin IV and shw that this scheme indeed
5 This full text pape was pee eviewed at the diectin f IEEE Cmmunicatins Sciety subject matte expets f publicatin in the IEEE INFOCOM 2009 pceedings S c h e d u le Fig 3 S R A M # S R A M # 2 S R A M # t p t b it p t b it p t b it Patitin DLBBF f Speedup significantly impves the lkup pefmance Nte that the functinality f this mdule actually mimics a g t switch schedule with the speedup f, whee each input pt has nly ne equest t an utput pt Implementing such a switch schedule is nt tivial We will intduce in Sectin V a simplified scheduling scheme which can still pvide satisfacty Blm filte lkup accuacy while being easy t implement C Ad Hc Pefix Expansin One maj agument against the use f Blm filtes f IP lkups is its p wstcase pefmance when packets cme at the highest pssible ate and all the Blm filtes shw false psitives Althugh this is highly unlikely, we still have t addess this issue t cmply with the pefmance equiements impsed n utes The eal cncen is that nce a packet ( me specifically, an addess pefix) happens t hit a bad case (ie multiple false psitives ae geneated), all subsequent packets having the same addess pefix ae als pblematic unless a lnge pefix hits a eal match These packets can slw dwn the packet lkup ate and might eventually cause packet dps Next, we pesent a scheme that can educe cnsecutive false psitives egadless f the packet aival patten Ou design assumes a cetain magin f tleatin f a few false psitives F example, assume a 400MHz clck ate, the lkup budget is 400M/50M = 27 cycles f the maximum packet ate that can be seen n a 00GbE pt, which means we have 7 cycles pe packet t deal with the Blm filte false psitives in the wst case If a paticula packet esults in many false psitives, we need t pevent subsequent packets belnging t the same flw fm causing false psitives, since the fwading ate can slw dwn if these packets ae cnsecutive We use an adhc pefix expansin scheme f this When a packet causes seveal false psitives and the lngest false psitive match is f length k, we extact the kbit pefix f the packet s IP addess and inset it int the ffchip pefix table alng C le c t with the next hp infmatin F example, let us say we nly allw tw false psitive matches, but a packet with addess esults in thee false matches and the fist (als the lngest) false match happens at length f 24 T cpe with this bad case, we inset a new expanded pefix 92680/24 int the pefix table This new pefix is assciated with the same next hp infmatin as the eal matching pefix Any subsequent packets fm the same flw will then be guaanteed t find the cect next hp infmatin in just ne Blm filte access This scheme has thee advantages: () Unlike the iginal pefix expansin scheme which is pedetemined and can expnentially incease the table size, u pefix expansin scheme is invked dynamically, geneates nly ne new pefix, and is used nly when abslutely necessay (2) Me imptantly, the nchip Blm filtes emain intact We nly need t inset ne new pefix in the ffchip pefix table The new pefix des nt change the Blm filte lad n affect its false psitive pbability (3) The actual false psitive ate bseved is nt a functin f the aived packets but a functin f the unique flws (ie unique destinatin IP addesses) When n new flw is seen, thee ae n me false psitives The entie expansin scheme is managed by the system sftwae An expanded pefix can be evked at any time if it is n lnge necessay The scheme significantly educes the veall table size, simplifies the wk lad f incemental updates, and suppts faste packet lkups When the numbe f expanded pefixes becmes t lage (afte the system has been peatinal f a lng time) and causes pefmance degadatin in the ffchip table lkup, epgamming the DLBBFs using the cuent set f pefixes (excluding thse expanded nes) will help eset the state Hweve, due t the small Blm filte false psitive pbability it is unlikely that this will need t be dne anyway D Offchip Pefix Table Optimizatin Afte the nchip DLBBF is seached, the ffchip pefix table als needs t be seached t veify the match and t fetch the next hp infmatin The ffchip pefix table is typically ganized as a hash table In PBF, it is assumed that the hash table lkup takes just ne memy access [8] This is nt always tue due t hash cllisins Unbunded hash cllisins can cause seius pefmance degadatin We can take advantage f high memy bandwidths f SRAMS t alleviate this pblem We aange multiple cllided ndes int ne hash bucket such that they can be etieved with ne memy access and aviding tavesal f linked lists when hash cllisin happens Cuently, 500+ MHz QDRIII SRAMs which suppt 72 bit ead and wite peatins pe clck cycle ae available A bust ead access using tw clck cycles can etieve 44 bits This is sufficient t pack thee IPv4 pefixes tw IPv6 pefixes plus the next hps With a 44bit bucket size, a 72 Mbit memy can cntain 500K buckets which can hld 5 millin IPv4 pefixes ne millin IPv6 pefixes
6 This full text pape was pee eviewed at the diectin f IEEE Cmmunicatins Sciety subject matte expets f publicatin in the IEEE INFOCOM 2009 pceedings A key pblem is aviding bucket veflw entiely keep its ccuence t a minimum The Fast Hash Table [25] and Peacck Hash [20] wee designed t impve hash table pefmance T simplify design, we adpt the scheme in [2] whee each pefix is hashed using tw hash functins and the pefix is sted in the less laded bucket Cnsequently, a pefix lkup needs t access the hash table tw times using tw hash functins All pefixes sted in the tw accessed buckets need t be cmpaed t find the match Althugh each pefix has tw chices and each bucket can ste 2 3 pefixes, bucket veflw can still happen Hweve, analysis and simulatin shw that the veflws ae extemely ae Given u cnfiguatin, when we inset 250K IPv6 pefixes in the table, nly 3 pefixes cause veflw These veflw pefixes can be put in a small nchip CAM with a handful f enties F 250K IPv4 pefixes, a 36Mbit memy can achieve the same pefmance Since each lkup needs t access memy tw times and each memy access takes tw clck cycles, a 500MHz SRAM can suppt 25M lkups pe secnd This is a little sht f the wstcase 50Mpps lkup ate equied f 00GbE line cads We can get aund this pblem in tw ways: () We can use faste SRAM devices A 600MHz SRAM device can satisfy the wstcase equiement (2) We can use tw 36 8Mbit SRAM devices in paallel, with each addessed by a hash functin This scheme pvides 250M lkups pe secnd which is way beynd the wstcase equiement and leaving me than 67% f memy bandwidth t deal with the DLBBF false psitive matches Nte that this scheme dubles the memy bandwidth but des nt incease the memy size E Nnstp Fwading Changing netwk cnditins cnfiguatin changes cause the uting infmatin t be updated The cntl pcess, which uns the uting ptcls, cmputes the new pefix, nexthp infmatin and updates the fwading table data stuctue n line cads accdingly The updates must happen withut inteupting the packet fwading causing packet misuting The update pcedue f u scheme is simple: We fist inset delete the pefix t be updated fm the ffchip hash table We then mdify the nchip DLBBFs This can guaantee the efee updates F a pefix update, thee is at mst ne memy access t each DLBBF, and all the memy accesses can be cnducted in paallel S the impact t the system thughput is minimized The ffchip hash table is sted in QDR SRAM, whee a sepaate witing pt is dedicated f table updates The mdificatin t the nchip DLBBF f pefix inseting and deleting needs t use the ffline mi Cunting Blm Filtes, just as descibed in [8] IV PERFORMANCE ANALYSIS All pevius IP lkup slutins based n TCAM, Tie, and pipeline achitectues ae sensitive t the lngest pefix length Theefe, when used f IPv6, they suffe a pefmance degadatin f up t tw times that f the IPv4 case The stage is als significantly inceased A key featue f u algithm is that it is insensitive t bth the pefix length as well as t the numbe f unique pefix lengths Only pefix table size is imptant Hence u algithm wks equally well f bth IPv6 and IPv4 and is wellsuited t be used f IPv6 lkups in ce utes Nw, we pve that u scheme is equivalent t PBF in its ideal cnfiguatin The pf is split int tw pats Theem : The SBF is identical t the DLBBF in tems f the false psitive pbability Pf: In SBF, althugh pefixes with diffeent lengths use diffeent sets f hash functins, each pefix is hashed k times S f any pefix lkup, the false psitive pbability is exactly the same as that shwn in Equatin : SBF pf = ( e kn/m ) k, whee n is the ttal numbe f pefixes and m is the ttal numbe f Blm filte buckets In DLBBF thee ae k distibuted Blm filtes Each pefix is hashed just nce, in each distibuted Blm filte, by using ne f the g hash functins Theefe, f a pefix lkup, a bit is set in a distibuted Blm filte with the pbability f e n/m, whee m is the size f the distibuted Blm filte Since thee ae k independent distibuted Blm filtes, the false psitive pbability f DLBBF is DLBBF pf = ( e n/m ) k Since m = m/k, we get SBF pf = DLBBF pf Similaly, we can pve the fllwing theem: Theem 2: The DLBBF is identical t the PBF in its ideal cnfiguatin in tems f the false psitive pbability and the numbe f hash functins used Pf: In the PBF algithm, assume thee ae g unique pefix lengths, each with n i pefixes, and each pefix length is assigned a Blm filte with m i buckets and k i hash functins It was ppsed t assign m i pptinal t the pefix distibutin, that is m i /n i = m/n while Σ g i= n i = n and Σ g i= m i = m The false psitive pbability f each Blm filte is p fi =( e kini/mi ) ki =( e kin/m ) ki The ptimal value f k i is equal f all the Blm filtes, which is m ln 2/n In ttal gm ln 2/n hash functins need t be implemented We have shwn that the SBF achieves the same false psitive pbability The ptimal numbe f hash functins f each pefix length is als m ln 2/n, s the ttal numbe f hash functins is gm ln 2/n t Since DLBBF has the same numbe f hash functins and the same false psitive pbability as SBF, the theem is pved Althugh at the fist glance u algithm seems t have the same esuce cnsumptin and lkup false psitive pbability as the PBF algithm in its ideal cnfiguatin, in pactice the pefmance is much bette since we avid lage pefix expansin and dynamic esuce allcatin Als, the mdula achitectue f DLBBF geatly simplifies the actual implementatin We als analyze the pefmance f patitined DLBBF implementatin using multiple 2pt memy blcks Figue 4
7 This full text pape was pee eviewed at the diectin f IEEE Cmmunicatins Sciety subject matte expets f publicatin in the IEEE INFOCOM 2009 pceedings pbability E+00 E02 E04 E06 E08 E IPv6, x32, E=2 IPv6, x64, E=04 IPv4, x32, E=04 IPv4, x64, E=0 # memy access Fig 4 Distibutin f the Numbe f Sequential Blck Memy Accesses f Diffeent Scenais shws the pbability distibutin f the diffeent numbe f sequential accesses t a same memy blck Each plt shws the esult f a cmbinatin f pefix type (IPv6 IPv4) and numbe f memy blcks (32 64) It als shws the expected numbe f accesses (E) f each case In geneal, we expect slightly me than ne clck cycle t finish the DLB BF lkup The esults ae in line with u expectatin In the next Sectin, we will shw hw a simplified schedule can be used that esults in just ne clck cycle being used t finish the DLBBF lkup A Cmpaisn with TCAMs The cst pe bit f TCAM is abut 5 geate than that f SRAM, and TCAM cnsumes me than 50 as much pwe as SRAM des f each access [9] Ou algithm uses abut 320 SRAM bits (bth nchip and ffchip) pe IPv6 pefix The equivalent TCAMbased slutin uses 72 TCAM bits plus 8 SRAM bits Hence, cmpaed t the TCAM slutin, the DLBBF algithm has me than 3 cst advantage and pwe advantage Because f the lw cell density and the heat dissipatin equiement f TCAMs, the dimensin f a typical TCAM chip is 3mm 3mm [7] while a QDR SRAM chip s size is as small as 3mm 5mm [6] The TCAMbased slutin equies ne TCAM chip plus ne SRAM chip, and u algithm equies ne tw SRAM chips Hence, the ftpint f the TCAMbased slutin is at least 3 lage than that f the DLBBF algithm V IMPLEMENTATION CONSIDERATIONS A Refeence Design A efeence design uses 8Mbit nchip SRAMs f implementing 6 DLBBFs Each DLBBF is futhe ealized with pt SRAM blcks Thee ae blcks in ttal Each blck is 6 8Kb in size, cnfigued as bit aay This design is feasible in FPGA devices available in 2008 F example, Altea s Statix IV FPGA includes me than 22Mb embedded memy including 280 9Kbit mdules One tw 9Kbit mdules can be cmbined t fm ne memy blck With this cnfiguatin, each pefix is hashed 6 times and we need 6 48 = 768 hash functins in place f IPv6 and 6 24 = 384 hash functins f IPv4 F 250K pefixes, we achieve a false psitive pbability as lw as When the adhc pefix expansin is applied, this basically means that thee ae less than 4 expanded pefixes f evey 0 millin flws B Hadwae Hash Functins A Blm filte equies k independent hash functins t be cmputed f each lkup The pefmance citically depends n the pefmance f the hash functin cmputatin A family f hash functins H 3 studied in [23] is shwn t be suitable f fast hadwae implementatin with pefmance clse t the theetical bund Hweve, the lgic needs can be lage If the input key has bits and the hash table has s buckets, the hash functin needs t egiste lg 2 s bits and pefm lgic AND and XOR peatin n them When is lage, we need t beak the lgic peatins int multiple pipeline stages t impve the cicuit timing This will intduce exta lg 2 s flipflps pe pipeline stage Ou achitectue equies the use hundeds f hash functins (ie geneate hundeds f independent hash values f each key) Using existing hash functin t implement the Blm filtes equies t much esuces Hence, we develp an aea efficient hash scheme that can pduce n hash values using just O(lg n) seed hash functins f the same hash key The hash peatins use nly simple lgic peatins and ae fast enugh f the lkup applicatin Given a key λ, we can geneate n hash values H,, H n by using nly m seed univesal hash functins S,, S m,as if n unique hash functins ae used, whee { lg2 n + n =2 m = k,k N lg 2 n n 2 k,k N and each S i geneates an addess between 0 and t, whee t is pwe f 2 (ie the hash esult can be epesented as a bitvect with lg 2 t bits) The cnstuctin f H i, whee i [,n], isasfllws: Since f any i, we have a unique epesentatin f i = m 2 m + m 2 m i {0, } We let H i =( m S m ) ( m S m ) ( S ) whee is bitwise XOR peatin H i has the exactly same addess space as S i The fllwing is an example that uses thee seed hash functins t pduce seven new hash values H = S H 2 = S 2 H 3 = S 2 S H 4 = S 3 H 5 = S 3 S H 6 = S 3 S 2 H 7 = S 3 S 2 S
8 This full text pape was pee eviewed at the diectin f IEEE Cmmunicatins Sciety subject matte expets f publicatin in the IEEE INFOCOM 2009 pceedings Pecentage Fig 5 00% 90% 80% 70% 60% 50% 40% 30% 20% 0% 0% = =0 =2 > # items Hash Table Bucket Lad with 64K Buckets and 256 Hash Functins Nte that we can chse any fast hash functin as seed functins In this pape we use H 3 hash functins f the implementatin and simulatins The celatin pefmance f these new hash values cannt be analyzed theetically Theefe, we use simulatins t cmpae thei pefmance with the theetical esults Fist, we test each new hash functin t see if it is univesal and andm by inseting a numbe f keys int the hash table and measue the hash cllisins and the aveage lad f nnempty buckets Specifically, we implement a cunting Blm filte with diffeent numbe f hash functins and inset sme numbe f items int the filte We then tack the pecentage f buckets with diffeent lads We cmpae this numbe with the theetical value calculated fm andm insetins Figue 5 shws ne f the esults Nte that the theetical values match the expeimental values s well that the cespnding cuves ae almst nt distinguishable fm each the Secnd, we build a Blm filte with these hash functins t see if these hash functins ae independent Each key is 64 bit lng and the Blm filte has m =64K buckets We vay the numbe f keys n t be pgammed int the Blm filte Table I summaizes the Blm filte false psitive ate with diffeent m/n ati and diffeent numbe f hash functins (k) The simulatin esults meet the theetical values vey well In u efeence design, we can use just five seed hash functins t geneate a gup f 6 hash functins f each pefix length, which accunt f 69% hadwae esuce savings veall C DLBBF Memy Pt Scheduling Mapping the DLBBF ead equests t diffeent memy pts tuns ut t be the mst esuce cnsuming pat f the design Since we have nly 2pt memy, when me than tw ead equests ae t the same memy blck, we need me than ne clck cycle t schedule these equests This can significantly incease the design cmplexity and negatively impact the system thughput We, instead, use nly ne clck cycle t schedule the equests When me than tw equests ae f a memy blck, nly the tw equests f the tp tw lngest pefixes ae ganted The emaining equests ae simply discaded Hweve, we assume they all find a match, pssibly false, and as thugh they have all been ganted memy accesses The cespnding bits in the bit vect ae thus diectly set t ne withut actually lking up the DLBBF Recall that we have 6 DLBBFs wking in paallel, and each pefix length geneates ne ead equest in each DLB BF using independent hash functins Even when a equest f a pefix length is discaded in ne DLBBF, the equests in the the DLBBFs ae likely t be ganted S the effect is that f a pefix length, a educed numbe f hash functins ae used t seach the Blm filte Althugh the false psitive ate is then nt as gd as that when all the hash functins ae used, we tade this ff f a smalle and faste implementatin In additin, the simplified schedule shws sme pefeence t the lnge pefixes S geneally the lnge the pefix, the me the hash functins that ae applied and in tun the bette false psitive pbability that is achieved (Nte that the equests f the tp tw pefix lengths, 32 and 30, ae always ganted, accding t u scheduling stategy) This aangement cmplies with the seach de f the last step when multiple matches ae fund in the DLBBFs D Pttype and Simulatin We pttype the design using the Altea Statix III FPGA EP3SL340 The design is aimed at 40G line cad with an IPv4 lkup ate f 60Mpps Each ne f the 6 DLBBFs include 32 8Kbit 2pt memy blcks The design uses 50% f the lgic esuce and 25% f the blck memy esuce The synthesized cicuit can un at 50MHz clck ate A 36 Mbit 250MHz QDRII SRAM is used t ste the ffchip hash table Each table bucket has 44 bits, sting up t thee pefixes and the cespnding next hps As discussed befe, each pefix is sted in ne f tw candidate buckets f lad balancing A snapsht f IPv4 BGP Table, which cntains abut 80K pefixes and 24 unique pefix lengths, is used t test u design We cmbine the pefix value and its length as the key t the ffchip hash table, and find n veflw at all in the hash table T test the lkup pefmance, we fist use a synthesized packet tace which cntains the same numbe f packets as pefixes and matches each pefix exactly nce Due t u simplified memy pt scheduling algithm, the bseved false psitive ate is , which is slightly highe than the theetical value Hweve, afte the 5 pefixes that causes the false psitives ae sted in the ffchip hash table as expanded pefixes, f the same set f flws, n me false psitives happen again In the secnd expeiment, we lk up abut 80 millin unique IP addesses and find less than 5K false psitive ccuences The expanded pefixes cause nly a small pefix set inflatin f 26% Finally, we test the algithm with a eal Intenet packet tace F this case, we bseved 38 false psitive ccuences and a false psitive ate f This means f seven
9 This full text pape was pee eviewed at the diectin f IEEE Cmmunicatins Sciety subject matte expets f publicatin in the IEEE INFOCOM 2009 pceedings k=2 k=4 k=8 k=6 m/n simulatin they simulatin they simulatin they simulatin they 2 40e 400e 560e 559e 858e 863e 995e 995e 4 53e 55e 60e 60e 36e 32e 749e 744e 8 49e2 489e2 244e2 240e2 253e2 255e2 962e2 976e2 6 37e2 38e2 233e3 238e3 540e4 574e4 64e4 650e e3 367e3 88e4 9e4 600e6 573e6 340e7 330e7 TABLE I BLOOM FILTER FALSE POSITIVE RATE WITH FAST HASH FUNCTIONS millin flws, nly ne can cause false psitive with its fist packet In all f u tests, we bseved at mst ne false psitive f a pefix We cnducted each f the abve expeiments multiple times, each with a diffeent hash functin cnfiguatin (ie vaying the andm numbe set used t implement the seed H 3 hash functins) The esults wee all cnsistent VI CONCLUSIONS With the cntinued gwth in Intenet taffic, diven by the suge in mediaich taffic, deplyment f 00Gbps line cads in ce utes is vey likely as sn as standadizatin effts ae cmpleted Meve, Intenet uting tables cntinue t gw and IPv6 use is gwing as well It has als becme inceasingly imptant t minimize the pwe cnsumptin f line cads t the maximum extent pssible These facts lead us eexamine algithmic appaches t IP lkup Algithmic appaches can explit the inceasing amunts f nchip memy using new datastuctues and can cnsideably impve upn the high pwecnsumptin f TCAMs Hweve, it is still a challenge t devise lkup schemes usable f 00Gbps line cads suppting IPv6 and lage uting tables in an ecnmical, pweefficient manne We make the fllwing fu maj cntibutins t addess this challenge: () We design a nvel data stuctue, DLBBF, based n Blm filtes which is suitable f nchip stage and makes pssible fast pefixlength independent IPv4 and IPv6 lkups at 00Gbps line speed The ppsed scheme addesses seveal maj dawbacks f peviusly ppsed schemes including the need t use lage multipt memies (2) We avid the lage a pii pefix expansins that ae needed t educe the numbe f distinct pefix lengths and instead use an adhc pefix expansin methd that efficiently cpes with the Blm Filte false psitive pblem withut any changes t the nchip Blm filte itself (3) We design an aeaefficient algithm f cmputing a lage numbe f fast and high pefmance hash functins in hadwae These ae ideal f implementing Blm filtes (4) We design a simple and efficient memypt scheduling scheme that allws us t use pevalent 2pt memy blcks f implementing DLB BFs withut much degadatin in attainable false psitive pbabilities The cmpaisn shws that u algithm significantly utpefms the TCAMbased slutins in pwe cnsumptin, ftpint, and cst REFERENCES [] B Blm Space/Time Tadeffs in Hash Cding With Allwable Es Cmmunicatins f the ACM, July 970 [2] A Bde and M Mitzenmache Using Multiple Hash Functins t Impve IP Lkups In IEEE INFOCOM, 200 [3] A Bde and M Mitzenmache Netwk Applicatins f Blm Filtes: A Suvey In Intenet Mathematics, 2005 [4] J Buck, J Ga, and A Jiang Weighted Blm Filte In IEEE ISIT, 2006 [5] B Chazelle, J Kilian, R Rubinfeld, and A Tal The Blmie Filte: An Efficient Data Stuctue f Static Suppt Lkup Tables In The Fifteenth Annual ACMSIAM Sympsium n Discete Algithms, 2004 [6] I Chvets and M MacGeg Multizne Caches f Acceleating IP Ruting Table Lkups In Pceedings f HighPefmance Switching and Ruting, 2002 [7] M Degemak, A Bdnik, S Calssn, and S Pink Small Fwading Tables f Fast Ruting Lkups In ACM SIGCOMM, 997 [8] S Dhamapuika, P Kishnamuthy, and D Tayl Lngest Pefix Matching using Blm Filtes In ACM SIGCOMM, 2003 [9] S Dhamapuika, H Sng, J Tune, and J Lckwd Fast Packet Classificatin Using Blm Filtes In ACM ANCS, 2006 [0] W Eathetn, G Vaghese, and Z Dittia Tee Bitmap: hadwae/sftwae IP Lkups with Incemental Updates ACM SIGCOMM Cmpute Cmmunicatin Review, 2004 [] L Fan, P Ca, J Almeida, and A Bde Summay Cache: A Scalable Wideaea Web Cache Shaing Ptcl IEEE/ACM Tansactins n Netwking, Ma 2000 [2] J Hasan and T N Vijaykuma Dynamic Pipelining: Making IP Lkup Tuly Scalable In ACM SIGCOMM, 2005 [3] BGP Ruting Table Analysis Repts 2008 [4] Cisc CRS 2007 [5] Junipe Netwks Tseies Ruting Platfms 2007 [6] NEC Electnics [7] NetLgic [8] W Jiang and V K Pasanna Beynd TCAMs: An SRAMbased Multi Pipeline Achitectue f Teabit IP Lkup In IEEE INFOCOM, 2008 [9] S Kuma, M Becchi, P Cwley, and J S Tune CAMP: Fast and Efficient IP Lkup Achitectue In ACM/IEEE ANCS, 2006 [20] S Kuma, J Tune, and P Cwley Peacck Hash: Fast and Updatable Hashing f High Pefmance Packet Pcessing Algithms In IEEE INFOCOM, 2008 [2] J T M Waldvgel, G Vaghese and B Plattne Scalable High Speed IP Ruting Lkups In ACM SIGCOMM, 997 [22] S Nilssn and G Kalssn IP Addess Lkup using LCTies IEEE Junal n Selected Aeas in Cmmunicatins, June 999 [23] M Ramakishna, E Fu, and E Bahcekapili A Pefmance Study f Hashing Functins f Hadwae Applicatins In Pc 6th Int l Cnf Cmputing and Infmatin, 994 [24] R Sangieddy, N Futamua, S Aluu, and A K Smani Scalable, Memy Efficient, HighSpeed IP Lkup Algithms IEEE/ACM Tansactins n Netwking, Aug 2005 [25] H Sng, S Dhamapuika, J S Tune, and J W Lckwd Fast Hash Table Lkup Using Extended Blm Filte: an Aid t Netwk Pcessing In ACM SIGCOMM, 2005 [26] H Sng, J Tune, and J Lckwd Shape Shifting Ties f Faste IP Lkup In IEEE ICNP, 2005 [27] V Sinivasan and G Vaghese Faste IP Lkups Using Cntlled Pefix Expansin In ACM SIGMETRICS, 998
 r "   g Marsh SoMclannan Coml"'nies ... MERCER Human Resource Consulting. City of Philadelphia Municipal Retirement System ...
",,.J... Mach 2005 City f Philadelphia Municipal Retiement System July 1, 2004 Actuaial Valuatin Rept MERCER Human Resuce Cnsulting... g Mash SMclannan Cml"'nies Cntents I. Executive Summay I,,,... 2.
More informationBARTON COLLEGE PRACTICE PLACEMENT TEST. a) 4 b) 4 c) 12 d) 10.5. a) 7a 11 b) a 17 c) a 11 d) 7a 17. a) 14 b) 1 c) 66 d) 81
. Simplify: 0 + 4 (! 8) 4 4 0.. Simplify: (a 4) + (a ) (a+) 7a a 7 a 7a 7. Evaluate the expessin: 4a! 4ab + b, when a = and b = 4 8 4. Fiefightes use the fmula S = 0.P + t cmpute the hizntal ange S in
More informationUnit cell refinement from powder diffraction data: the use of regression diagnostics
Unit cell efinement fm pwde diffactin data: the use f egessin diagnstics T. J. B. HLLAND AND S. A. T. REDFERN Deptatment f Eath Sciences, Univesity f Cambidge, Dwning Steet, Cambidge, CB2 3EQ, UK Abstact
More informationThe ad hoc reporting feature provides a user the ability to generate reports on many of the data items contained in the categories.
11 This chapter includes infrmatin regarding custmized reprts that users can create using data entered int the CA prgram, including: Explanatin f Accessing List Screen Creating a New Ad Hc Reprt Running
More information1.3. The Mean Temperature Difference
1.3. The Mean Temperature Difference 1.3.1. The Lgarithmic Mean Temperature Difference 1. Basic Assumptins. In the previus sectin, we bserved that the design equatin culd be slved much easier if we culd
More informationAn important topic in marketing involves how manufacturers
Allen M. Weiss, Ein Andesn. & Debah J. Maclnnis Reputatin Management as a Mtivatin f Sales Stuctue Decisins The auths examine whethe eputatin cncens affect hw manufactues stuctue thei sales ganizatin.
More informationThings to Remember. r Complete all of the sections on the Retirement Benefit Options form that apply to your request.
Retiement Benefit 1 Things to Remembe Complete all of the sections on the Retiement Benefit fom that apply to you equest. If this is an initial equest, and not a change in a cuent distibution, emembe to
More informationConcept and Experiences on using a Wikibased System for Softwarerelated Seminar Papers
Concept and Expeiences on using a Wikibased System fo Softwaeelated Semina Papes Dominik Fanke and Stefan Kowalewski RWTH Aachen Univesity, 52074 Aachen, Gemany, {fanke, kowalewski}@embedded.wthaachen.de,
More informationChapter 3 Savings, Present Value and Ricardian Equivalence
Chapte 3 Savings, Pesent Value and Ricadian Equivalence Chapte Oveview In the pevious chapte we studied the decision of households to supply hous to the labo maket. This decision was a static decision,
More informationApplication Note: 202
Applicatin Nte: 202 MDKARM Cmpiler Optimizatins Getting the Best Optimized Cde fr yur Embedded Applicatin Abstract This dcument examines the ARM Cmpilatin Tls, as used inside the Keil MDKARM (Micrcntrller
More informationChapter 3: Cluster Analysis
Chapter 3: Cluster Analysis 3.1 Basic Cncepts f Clustering 3.1.1 Cluster Analysis 3.1. Clustering Categries 3. Partitining Methds 3..1 The principle 3.. KMeans Methd 3..3 KMedids Methd 3..4 CLARA 3..5
More informationUnit 2 Test Review. Force, Circular Motion, and Gravity Chapters 45
A.P. Physics B Unit Test Reiew Fce, Cicula Mtin, and Gaity Chaptes 45 * In studying f yu test, make sue t study this eiew sheet alng with yu quizzes and hmewk assignments. Multiple Chice Reiew: On this
More informationAN IMPLEMENTATION OF BINARY AND FLOATING POINT CHROMOSOME REPRESENTATION IN GENETIC ALGORITHM
AN IMPLEMENTATION OF BINARY AND FLOATING POINT CHROMOSOME REPRESENTATION IN GENETIC ALGORITHM Main Golub Faculty of Electical Engineeing and Computing, Univesity of Zageb Depatment of Electonics, Micoelectonics,
More informationNAVIPLAN PREMIUM LEARNING GUIDE. Analyze, compare, and present insurance scenarios
NAVIPLAN PREMIUM LEARNING GUIDE Analyze, cmpare, and present insurance scenaris Cntents Analyze, cmpare, and present insurance scenaris 1 Learning bjectives 1 NaviPlan planning stages 1 Client case 2 Analyze
More informationSTUDENT RESPONSE TO ANNUITY FORMULA DERIVATION
Page 1 STUDENT RESPONSE TO ANNUITY FORMULA DERIVATION C. Alan Blaylock, Hendeson State Univesity ABSTRACT This pape pesents an intuitive appoach to deiving annuity fomulas fo classoom use and attempts
More informationest using the formula I = Prt, where I is the interest earned, P is the principal, r is the interest rate, and t is the time in years.
9.2 Inteest Objectives 1. Undestand the simple inteest fomula. 2. Use the compound inteest fomula to find futue value. 3. Solve the compound inteest fomula fo diffeent unknowns, such as the pesent value,
More informationEfficient Redundancy Techniques for Latency Reduction in Cloud Systems
Efficient Redundancy Techniques fo Latency Reduction in Cloud Systems 1 Gaui Joshi, Emina Soljanin, and Gegoy Wonell Abstact In cloud computing systems, assigning a task to multiple seves and waiting fo
More informationFirstmark Credit Union Commercial Loan Department
Fistmak Cedit Union Commecial Loan Depatment Thank you fo consideing Fistmak Cedit Union as a tusted souce to meet the needs of you business. Fistmak Cedit Union offes a wide aay of business loans and
More informationOverview of the Edit Options Page for Individual Student Courses
Overview f the Edit Optins Page fr Individual Student Curses Edit Optins fr an Individual Student s Curse The Edit Optins page allws teachers t cntrl curse features such as passing threshlds, grade weights,
More informationContinuous Compounding and Annualization
Continuous Compounding and Annualization Philip A. Viton Januay 11, 2006 Contents 1 Intoduction 1 2 Continuous Compounding 2 3 Pesent Value with Continuous Compounding 4 4 Annualization 5 5 A Special Poblem
More informationMONDAY, MAY lg,20t4 SIGN IN BEGINS AT 6:15 P.M. HOUSTON COMMUNITY MANAGEMENT SERVICES
WE LOOK FORWARI} TO SBEING YOU OR YOUR REPRESENTATIVE! THANKS FOR YOT]R PARTICIPATION UNIVERSITY PARK PATIO HOMES HOMEOWNEROS ASSOCTATTON, INC. NOTICE OF ANNUAL MEETING MONDAY, MAY lg,20t4 SIGN IN BEGINS
More informationHow do I evaluate the quality of my wireless connection?
Hw d I evaluate the quality f my wireless cnnectin? Enterprise Cmputing & Service Management A number f factrs can affect the quality f wireless cnnectins at UCB. These include signal strength, pssible
More informationFaithful Comptroller s Handbook
Faithful Comptolle s Handbook Faithful Comptolle s Handbook Selection of Faithful Comptolle The Laws govening the Fouth Degee povide that the faithful comptolle be elected, along with the othe offices
More informationCSE 231 Fall 2015 Computer Project #4
CSE 231 Fall 2015 Cmputer Prject #4 Assignment Overview This assignment fcuses n the design, implementatin and testing f a Pythn prgram that uses character strings fr data decmpressin. It is wrth 45 pints
More informationTipsheet: Sending Out Mass Emails in ApplyYourself
GEORGETOWN GRADUATE SCHOOL Tipsheet: Sending Out Mass Emails in ApplyYurself In ApplyYurself (AY), it is very simple and easy t send a mass email t all f yur prspects, applicants, r students with applicatins
More informationHubs, Bridges, and Switches
Hubs, Bidges, and Switches Used fo extending LANs in tems of geogaphical coveage, numbe of nodes, administation capabilities, etc. Diffe in egads to: m collision domain isolation m laye at which they opeate
More informationComparing Availability of Various Rack Power Redundancy Configurations
Compaing Availability of Vaious Rack Powe Redundancy Configuations By Victo Avela White Pape #48 Executive Summay Tansfe switches and dualpath powe distibution to IT equipment ae used to enhance the availability
More informationWHITEPAPER SERIES. info@metavistech.com 610.717.0413 www.metavistech.com
WHITEPAPER SERIES Shredded Strage in SharePint 2013 What des Shredded Strage mean, hw much des it actually save and hw t take advantage f it in SharePint 2013. What is Shredded Strage? Shredded Strage
More informationThe impact of migration on the provision. of UK public services (SRG.10.039.4) Final Report. December 2011
The impact of migation on the povision of UK public sevices (SRG.10.039.4) Final Repot Decembe 2011 The obustness The obustness of the analysis of the is analysis the esponsibility is the esponsibility
More information9:6.4 Sample Questions/Requests for Managing Underwriter Candidates
9:6.4 INITIAL PUBLIC OFFERINGS 9:6.4 Sample Questions/Requests fo Managing Undewite Candidates Recent IPO Expeience Please povide a list of all completed o withdawn IPOs in which you fim has paticipated
More informationQuestions & Answers Chapter 10 Software Reliability Prediction, Allocation and Demonstration Testing
M13914 Questions & Answes Chapte 10 Softwae Reliability Pediction, Allocation and Demonstation Testing 1. Homewok: How to deive the fomula of failue ate estimate. λ = χ α,+ t When the failue times follow
More information2. When logging is used, which severity level indicates that a device is unusable?
Last updated by Admin at March 3, 2015. 1. What are the mst cmmn syslg messages? thse that ccur when a packet matches a parameter cnditin in an access cntrl list link up and link dwn messages utput messages
More informationThe Supply of Loanable Funds: A Comment on the Misconception and Its Implications
JOURNL OF ECONOMICS ND FINNCE EDUCTION Volume 7 Numbe 2 Winte 2008 39 The Supply of Loanable Funds: Comment on the Misconception and Its Implications. Wahhab Khandke and mena Khandke* STRCT Recently FieldsHat
More informationDatabase Management Systems
Contents Database Management Systems (COP 5725) D. Makus Schneide Depatment of Compute & Infomation Science & Engineeing (CISE) Database Systems Reseach & Development Cente Couse Syllabus 1 Sping 2012
More informationON THE (Q, R) POLICY IN PRODUCTIONINVENTORY SYSTEMS
ON THE R POLICY IN PRODUCTIONINVENTORY SYSTEMS Saifallah Benjaafa and JoonSeok Kim Depatment of Mechanical Engineeing Univesity of Minnesota Minneapolis MN 55455 Abstact We conside a poductioninventoy
More informationTRAINING GUIDE. Crystal Reports for Work
TRAINING GUIDE Crystal Reprts fr Wrk Crystal Reprts fr Wrk Orders This guide ges ver particular steps and challenges in created reprts fr wrk rders. Mst f the fllwing items can be issues fund in creating
More informationThe Role of Gravity in Orbital Motion
! The Role of Gavity in Obital Motion Pat of: Inquiy Science with Datmouth Developed by: Chistophe Caoll, Depatment of Physics & Astonomy, Datmouth College Adapted fom: How Gavity Affects Obits (Ohio State
More informationCATALYZED HYDROLYSIS OF AMIDE AND PEPTIDE BONDS IN PROTEINS 1
U. S. DEPARTMENT OF COMMERCE NATONAL BUREAU OF STANDARDS RESEARCH PAPER RP153 Pat f Junal f Reseach f the N:atinal Bueau f Standads, Vlume 29, N:vembe 1942 CATALYZED HYDROLYSS OF AMDE AND PEPTDE BONDS
More informationMANAGING CUSTOMER SERVICES: HUMAN RESOURCE PRACTICES, QUIT RATES, AND SALES GROWTH
Academy f Management Junal 2002, Vl. 45, N. 3, 587597. MANAGING CUSTOMER SERVICES: HUMAN RESOURCE PRACTICES, QUIT RATES, AND SALES GROWTH ROSEMARY BATT Cnell Univesity This study examined the elatinship
More informationSoftLayer Development Lab
SftLayer Develpment Lab Phil Jacksn, Chief Evangelist, SftLayer pjacksn@sftlayer.cm @underscrephil Brad DesAulniers, Sftware Engineer, Advanced Clud Slutins IBM GTS bradd@us.ibm.cm @cb_brad Angel TmalaReyes,
More informationEnergy Efficient Cache Invalidation in a Mobile Environment
Enegy Efficient Cache Invalidation in a Mobile Envionment Naottam Chand, Ramesh Chanda Joshi, Manoj Misa Electonics & Compute Engineeing Depatment Indian Institute of Technology, Rookee  247 667. INDIA
More informationDisk Redundancy (RAID)
A Primer fr Business Dvana s Primers fr Business series are a set f shrt papers r guides intended fr business decisin makers, wh feel they are being bmbarded with terms and want t understand a cmplex tpic.
More informationEffect of Contention Window on the Performance of IEEE 802.11 WLANs
Effect of Contention Window on the Pefomance of IEEE 82.11 WLANs Yunli Chen and Dhama P. Agawal Cente fo Distibuted and Mobile Computing, Depatment of ECECS Univesity of Cincinnati, OH 452213 {ychen,
More informationTips to Prepare for QuarterEnd and YearEnd
Tips t Prepare fr QuarterEnd and YearEnd Melissa Wd Cnsultant What We ll Cver 1. Tying ut A/P 2. Tying ut A/R 3. Tying ut I/N 4. Wrk In Prgress 5. Managing Jbs and PMs 6. Quarterly Payrll 7. Clsing a
More informationComparing Availability of Various Rack Power Redundancy Configurations
Compaing Availability of Vaious Rack Powe Redundancy Configuations White Pape 48 Revision by Victo Avela > Executive summay Tansfe switches and dualpath powe distibution to IT equipment ae used to enhance
More informationCloud Service Reliability: Modeling and Analysis
Cloud Sevice eliability: Modeling and Analysis YuanShun Dai * a c, Bo Yang b, Jack Dongaa a, Gewei Zhang c a Innovative Computing Laboatoy, Depatment of Electical Engineeing & Compute Science, Univesity
More informationBandwidth Management: New Use Cases
Bandwidth Management: New Use Cases An AdvOSS Slutin White Paper Authrs: Farhan Zaidi and Fawad Pasha Cntact: {farhan.zaidi, fawadpasha}@advss.cm Whitepaper URL www.advss.cm/resurces/whitepapers/bandwidth
More informationUniversity of South Florida Libraries New Degree Program for the Department of Mass Communications Master's Degree  Advertising
Univesity f Suth Flida Libaies New Degee Pgam f the Depatment f Mass Cmmunicatins Maste's Degee  Advetising Oveview f USF Libaies, Missin, and Pgam/iscipline Stengths The Univesity f Suth Flida is accedited
More informationefusion Table of Contents
efusin Cst Centers, Partner Funding, VAT/GST and ERP Link Table f Cntents Cst Centers... 2 Admin Setup... 2 Cst Center Step in Create Prgram... 2 Allcatin Types... 3 Assciate Payments with Cst Centers...
More information2 r2 θ = r2 t. (3.59) The equal area law is the statement that the term in parentheses,
3.4. KEPLER S LAWS 145 3.4 Keple s laws You ae familia with the idea that one can solve some mechanics poblems using only consevation of enegy and (linea) momentum. Thus, some of what we see as objects
More informationThe transport performance evaluation system building of logistics enterprises
Jounal of Industial Engineeing and Management JIEM, 213 6(4): 194114 Online ISSN: 213953 Pint ISSN: 2138423 http://dx.doi.og/1.3926/jiem.784 The tanspot pefomance evaluation system building of logistics
More informationRetirement Planning Options Annuities
Retirement Planning Optins Annuities Everyne wants a glden retirement. But saving fr retirement is n easy task. The baby bmer generatin is graying. Mre and mre peple are appraching retirement age. With
More informationINFLUENCE OF GRINDING TREATMENTS ON THE SUR FACE HARDNESS OF INTAGLIO PRINTING PLATES OF 0.33.PERCENT CARBON STEEL
U. S. DEPARTMENT OF COMMERCE NATIONAL BUREAU OF STANDARDS RESEARCH PAPER RP1374 Pat f Junal f Reseach f the }{atinal Bueau f Standads, Vlume 26, Mach 1941 INFLUENCE OF GRINDING TREATMENTS ON THE SUR FACE
More informationNew York University Computer Science Department Courant Institute of Mathematical Sciences
New Yrk University Cmputer Science Department Curant Institute f Mathematical Sciences Curse Title: Data Cmmunicatin & Netwrks Curse Number:CSCIGA.266200 Instructr: JeanClaude Franchitti Sessin: 2 Assignment
More informationOptimal Peer Selection in a FreeMarket PeerResource Economy
Optimal Pee Selection in a FeeMaket PeeResouce Economy Micah Adle, Rakesh Kuma, Keith Ross, Dan Rubenstein, David Tune and David D Yao Dept of Compute Science Univesity of Massachusetts Amhest, MA; Email:
More informationPower Monitoring and Control for Electric Home Appliances Based on Power Line Communication
I²MTC 2008 IEEE Intenational Instumentation and Measuement Technology Confeence Victoia, Vancouve Island, Canada, May 12 15, 2008 Powe Monitoing and Contol fo Electic Home Appliances Based on Powe Line
More informationAccess EEC s Web Applications... 2 View Messages from EEC... 3 Sign In as a Returning User... 3
EEC Single Sign In (SSI) Applicatin The EEC Single Sign In (SSI) Single Sign In (SSI) is the secure, nline applicatin that cntrls access t all f the Department f Early Educatin and Care (EEC) web applicatins.
More informationGroup 3 Flip Chart Notes
MDHDLI Sympsium  Meeting Mandates, Making the Cnnectin: Wrkers Cmpensatin Electrnic Health Care Transactins  Nvember 5, 2014 Grup 3 Flip Chart Ntes Meeting Mandates, Making the Cnnectin: Wrkers Cmpensatin
More informationThe Binomial Distribution
The Binomial Distibution A. It would be vey tedious if, evey time we had a slightly diffeent poblem, we had to detemine the pobability distibutions fom scatch. Luckily, thee ae enough similaities between
More informationTraffic monitoring on ProCurve switches with sflow and InMon Traffic Sentinel
An HP PrCurve Netwrking Applicatin Nte Traffic mnitring n PrCurve switches with sflw and InMn Traffic Sentinel Cntents 1. Intrductin... 3 2. Prerequisites... 3 3. Netwrk diagram... 3 4. sflw cnfiguratin
More informationChapter 2 Valiant LoadBalancing: Building Networks That Can Support All Traffic Matrices
Chapte 2 Valiant LoadBalancing: Building etwoks That Can Suppot All Taffic Matices Rui ZhangShen Abstact This pape is a bief suvey on how Valiant loadbalancing (VLB) can be used to build netwoks that
More informationFTE is defined as an employee who is employed on average at least 30 hours of service per week.
On March 23, 2010, President Barack Obama signed int law cmprehensive health care refrm legislatin, the Patient Prtectin and Affrdable Care Act (H.R. 3590) passed in the Senate. The Health Care and Educatin
More informationELEC 204 Digital System Design LABORATORY MANUAL
ELEC 204 Digital System Design LABORATORY MANUAL : Design and Implementatin f a 3bit Up/Dwn Jhnsn Cunter Cllege f Engineering Kç University Imprtant Nte: In rder t effectively utilize the labratry sessins,
More informationAdmin Guide Server Administration
Admin Guide Server Administratin Administratin Guide Server Table f Cntents TABLE OF CONTENTS... 2 1. INTRODUCTION... 3 2. WHY XGENPLUS ADMIN PANEL?... 3 3. XGENPLUS SERVER ADMINISTRATION FUNCTIONAL DESCRIPTION...
More informationDurango Merchant Services QuickBooks SyncPay
Durang Merchant Services QuickBks SyncPay Gateway PlugIn Dcumentatin April 2011 DurangDirect.cm 86641526361  QuickBks Gateway PlugIn Dcumentatin...  3  Installatin...  3  Initial Setup... 
More informationUsing PayPal Website Payments Pro UK with ProductCart
Using PayPal Website Payments Pr UK with PrductCart Overview... 2 Abut PayPal Website Payments Pr & Express Checkut... 2 What is Website Payments Pr?... 2 Website Payments Pr and Website Payments Standard...
More informationRecommended combinations of bars, sleeves and adaptors
Recmmended cmbinatins f bas, sleeves and adapts Tuning Ø 5 25 mm 131xxxx ylindical bas (fist chice) Ø 5 25 mm x391.27xx xxx as with flats Ø 6 50 mm x391.20xx xxx 132Lxxxx (ISO 9766) ylindical bas
More informationCustom Portlets. an unbiased review of the greatest Practice CS feature ever. Andrew V. Gamet
Custm Prtlets an unbiased review f the greatest Practice CS feature ever Andrew V. Gamet Descriptin In Practice CS, the firm can use any f the fur dashbards t quickly display relative infrmatin. The Firm,
More informationBank switching service  Regulation
versin 3.01/7/2011 Bank switching service  Regulatin This Regulatin cnstitutes the verall framewrk in which the participating banks in Belgium ffer cnsumers a bank switching service fr current accunts.
More informationCreating automated reports using VBS AN 44
Creating autmated reprts using VBS AN 44 Applicatin Nte t the KLIPPEL R&D and QC SYSTEM Publishing measured results is imprtant t custmers and clients. While the KLIPPEL database cntains all infrmatin
More informationOptimizing Content Retrieval Delay for LTbased Distributed Cloud Storage Systems
Optimizing Content Retieval Delay fo LTbased Distibuted Cloud Stoage Systems Haifeng Lu, Chuan Heng Foh, Yonggang Wen, and Jianfei Cai School of Compute Engineeing, Nanyang Technological Univesity, Singapoe
More informationConverting knowledge Into Practice
Conveting knowledge Into Pactice Boke Nightmae srs Tend Ride By Vladimi Ribakov Ceato of Pips Caie 20 of June 2010 2 0 1 0 C o p y i g h t s V l a d i m i R i b a k o v 1 Disclaime and Risk Wanings Tading
More informationLesson Study Project in Mathematics, Fall 2008. University of Wisconsin Marathon County. Report
Lessn Study Prject in Mathematics, Fall 2008 University f Wiscnsin Marathn Cunty Reprt Date: December 14 2008 Students: MAT 110 (Cllege Algebra) students at UWMarathn Cunty Team Members: Paul Martin Clare
More informationImplementing ifolder Server in the DMZ with ifolder Data inside the Firewall
Implementing iflder Server in the DMZ with iflder Data inside the Firewall Nvell Cl Slutins AppNte www.nvell.cm/clslutins JULY 2004 OBJECTIVES The bjectives f this dcumentatin are as fllws: T cnfigure
More informationWireless LightLevel Monitoring
Wireless LightLevel Mnitring ILT1000 ILT1000 Applicatin Nte Wireless LightLevel Mnitring 1 Wireless LightLevel Mnitring ILT1000 The affrdability, accessibility, and ease f use f wireless technlgy cmbined
More informationSoftware Engineering and Development
I T H E A 67 Softwae Engineeing and Development SOFTWARE DEVELOPMENT PROCESS DYNAMICS MODELING AS STATE MACHINE Leonid Lyubchyk, Vasyl Soloshchuk Abstact: Softwae development pocess modeling is gaining
More informationAdaptive Queue Management with Restraint on NonResponsive Flows
Adaptive Queue Management wi Restaint on NonResponsive Flows Lan Li and Gyungho Lee Depatment of Electical and Compute Engineeing Univesity of Illinois at Chicago 85 S. Mogan Steet Chicago, IL 667 {lli,
More informationHSBC Online Home Loan Application Process
HSBC Online Hme Lan Applicatin Prcess Versin 1.0 Nvember 2005 Cpyright. HSBC Bank Australia Limited 2005 ALL RIGHTS RESERVED N part f this publicatin may be reprduced, stred in a retrieval system, r transmitted,
More informationReady to upgrade the Turbo on your Diesel?
Ready t upgrade the Turb n yur Diesel? Tday s diesel engines represent the state f the art in technlgy with high pwer density, excellent drivability, and gd fuel ecnmy. Frtunately fr the diesel enthusiast,
More informationFundingEdge. Guide to Business Cash Advance & Bank Statement Loan Programs
Guide t Business Cash Advance & Bank Statement Lan Prgrams Cash Advances: $2,500  $1,000,000 Business Bank Statement Lans: $5,000  $500,000 Canada Cash Advances: $5,000  $500,000 (must have 9 mnths
More informationQuestions for Review. By buying bonds This period you save s, next period you get s(1+r)
MACROECONOMICS 2006 Week 5 Semina Questions Questions fo Review 1. How do consumes save in the twopeiod model? By buying bonds This peiod you save s, next peiod you get s() 2. What is the slope of a consume
More informationSTUDIO DESIGNER. Accounting 3 Participant
Accunting 3 Participant Thank yu fr enrlling in Accunting 3 fr Studi Designer and Studi Shwrm. Please feel free t ask questins as they arise. If we start running shrt n time, we may hld ff n sme f them
More informationTrends and Considerations in Currency Recycle Devices. What is a Currency Recycle Device? November 2003
Trends and Cnsideratins in Currency Recycle Devices Nvember 2003 This white paper prvides basic backgrund n currency recycle devices as cmpared t the cmbined features f a currency acceptr device and a
More informationThis page provides help in using WIT.com to carry out the responsibilities listed in the Desk Aid Titled Staffing Specialists
This page prvides help in using WIT.cm t carry ut the respnsibilities listed in the Desk Aid Titled Staffing Specialists 1. Assign jbs t yurself G t yur hme page Click n Yur Center has new jb pstings r
More informationIn this lab class we will approach the following topics:
Department f Cmputer Science and Engineering 2013/2014 Database Administratin and Tuning Lab 8 2nd semester In this lab class we will apprach the fllwing tpics: 1. Query Tuning 1. Rules f thumb fr query
More informationConnecting to Email: Live@edu
Cnnecting t Email: Live@edu Minimum Requirements fr Yur Cmputer We strngly recmmend yu upgrade t Office 2010 (Service Pack 1) befre the upgrade. This versin is knwn t prvide a better service and t eliminate
More informationWHITE PAPER. Vendor Managed Inventory (VMI) is Not Just for A Items
WHITE PAPER Vendr Managed Inventry (VMI) is Nt Just fr A Items Why it s Critical fr Plumbing Manufacturers t als Manage Whlesalers B & C Items Executive Summary Prven Results fr VMImanaged SKUs*: Stckuts
More informationslope Q So you can use relative slope to determine relative elasticity
Elasticity Intr Measures hw sensitive quantity (demanded r supplied) is t changes in price If Q D r Q S changes a lt in respnse t a price change, then the relatinship is elastic If changes a little, then
More informationAn Infrastructure Cost Evaluation of Single and MultiAccess Networks with Heterogeneous Traffic Density
An Infastuctue Cost Evaluation of Single and MultiAccess Netwoks with Heteogeneous Taffic Density Andes Fuuskä and Magnus Almgen Wieless Access Netwoks Eicsson Reseach Kista, Sweden [andes.fuuska, magnus.almgen]@eicsson.com
More informationResearch Findings from the West Virginia Virtual School Spanish Program
Research Findings frm the West Virginia Virtual Schl Spanish Prgram Funded by the U.S. Department f Educatin Cnducted by R0cKMAN ETAL San Francisc, CA, Chicag, IL, and Blmingtn, IN Octber 4, 2006 R0cKMAN
More informationModeling and Verifying a Price Model for Congestion Control in Computer Networks Using PROMELA/SPIN
Modeling and Veifying a Pice Model fo Congestion Contol in Compute Netwoks Using PROMELA/SPIN Clement Yuen and Wei Tjioe Depatment of Compute Science Univesity of Toonto 1 King s College Road, Toonto,
More informationAccess Control Algorithm for RPR MAC
Access Cntrl Algrithm fr RPR MAC Kanaiya Vasani Anp Ghanwani Lantern Cmmunicatins IEEE 802.17 Interim Meeting Orland, FL January 2002 kv_acc_02.pdf 1 Outline Overview MAC architecture Cmpnents f the bandwidth
More informationQAD Operations BI Metrics Demonstration Guide. May 2015 BI 3.11
QAD Operatins BI Metrics Demnstratin Guide May 2015 BI 3.11 Overview This demnstratin fcuses n ne aspect f QAD Operatins Business Intelligence Metrics and shws hw this functinality supprts the visin f
More informationAn Approach to Optimized Resource Allocation for Cloud Simulation Platform
An Appoach to Optimized Resouce Allocation fo Cloud Simulation Platfom Haitao Yuan 1, Jing Bi 2, Bo Hu Li 1,3, Xudong Chai 3 1 School of Automation Science and Electical Engineeing, Beihang Univesity,
More informationReduced Pattern Training Based on Task Decomposition Using Pattern Distributor
> PNN05P762 < Reduced Patten Taining Based on Task Decomposition Using Patten Distibuto ShengUei Guan, Chunyu Bao, and TseNgee Neo Abstact Task Decomposition with Patten Distibuto (PD) is a new task
More informationIlona V. Tregub, ScD., Professor
Investment Potfolio Fomation fo the Pension Fund of Russia Ilona V. egub, ScD., Pofesso Mathematical Modeling of Economic Pocesses Depatment he Financial Univesity unde the Govenment of the Russian Fedeation
More information9.5 Amortization. Objectives
9.5 Aotization Objectives 1. Calculate the payent to pay off an aotized loan. 2. Constuct an aotization schedule. 3. Find the pesent value of an annuity. 4. Calculate the unpaid balance on a loan. Congatulations!
More informationWriting a Compare/Contrast Essay
Writing a Cmpare/Cntrast Essay As always, the instructr and the assignment sheet prvide the definitive expectatins and requirements fr any essay. Here is sme general infrmatin abut the rganizatin fr this
More informationURM 11g Implementation Tips, Tricks & Gotchas ALAN MACKENTHUN FISHBOWL SOLUTIONS, INC.
URM 11g Implementatin Tips, Tricks & Gtchas ALAN MACKENTHUN FISHBOWL SOLUTIONS, INC. i Fishbwl Slutins Ntice The infrmatin cntained in this dcument represents the current view f Fishbwl Slutins, Inc. n
More informationProblem Set # 9 Solutions
Poblem Set # 9 Solutions Chapte 12 #2 a. The invention of the new highspeed chip inceases investment demand, which shifts the cuve out. That is, at evey inteest ate, fims want to invest moe. The incease
More information