Base Techological Solutios of «Basis.5» IMA Platform Dmitriy Kulikov, Kostati Taradevich
Base equiremets to Basis.5 IMA Platform 2 3 4 5 6 7 8 9 2 3 esources sharig by several applicatios Icremetal certificatio Part umber reductio ommo toolset for differet applicatios Module omeclature miimizatio Icreased umber of supported fuctios Scalability PN techologies ad high-speed switched fabric architectures High performace heterogeeous architectures Portable software esources recofigurability TS techologies Tools ad developmet processes itegratio Geeral system solutios stadardizatio 4 2
3 Basis.5 IMA Platform volutio VPX 6U VPX 6U (VITA46,VITA48) IMA G Platform Architecture Software Portability Implemetatio PM PM PM PM PM PM PM PM PM PM PM PM PM PM PM PM PN mbedded omputer Techologies ad Stadards Support, Platform High-Speed Switched Fabric Architecture ad Multiore Processor Module Architecture
4 Basis.5 IMA Platform volutio reatio of Itegrated viromet for Software Developmet Multilevel ecofiguratio of omputatioal esources IMA 2G Platform Architecture PM PM PM PM PM PM PM PM PM PM PM PM PM PM PM PM
Basis.5 IMA Platform Prototype VPX 3U (VITA46,VITA48) IMA 2G Platform (esource eter ofiguratio) PM/XM (VITA2,VITA42) PM etral Processig Module GPMm Graphic Processor Mezzaie Module M3m Mass Memory Mezzaie Module AIMm Avioics Iterface Mezzaie Module NSM AIN-664 Network Module МСM PM/XM- Mezzaie arrier Module IMA 2G Platform (ID ofiguratio) PSM Power Supply Module 5
Base System Solutios of Basis.5 IMA Platform 6
Base equiremets to AIN664p7 (AFDX) d System Jitter edudacy ocept Itegrity heckig edudacy Maagemet 7
Variats of AIN664p7 (AFDX) d System Implemetatio HW vs SW Implemetatio o lowperformace systems Lack of flexibility at adaptatio accordig to ew requiremets HW life cycle reductio Full recertificatio at substitutio of HW implemetatio (elemet base) Developmet costs icrease Higher requiremets to system performace Problems of multicore solutios certificatio High level of adaptatio to ew requiremets Scalability Low cost error correctio Portability at HW substitutio Icremetal certificatio at moderizatio Possibility of TS solutios usage at implemetatio Developmet costs ad time reductio 8
AIN664p7 (AFDX) d System Implemetatio i Basis.5 IMA Platform HW/SW Structure of AIN 664 (AFDX) d-system (AFDX S) i PM Jitter Itegrity checkig Implemetatio Features Timer core SW implemetatio accordig to AIN664p7 requiremets edudacy maagemet SW implemetatio accordig to AIN664p7 requiremets Itercommuicatio with AIN653 ST AIN65A support ofiguratio data origial format Shared memory (AM) or L2/L3 Via itercommuicatio with PM iitial loader XML Fuctioal testig AIM compay SW/HW test equipmet 9
Fuctioal Testig of AIN664p7 (AFDX) d Device esearched Issues: The possibility of AIN664p7 (AFDX) ed system SW implemetatio accordig to the requiremets of the stadard AIN664p7 (AFDX) ed system SW implemetatio fuctioig o multicore PU i combiatio with AIN653 compatible TS The possibility of TS solutios usage for applicatio-specific iterface creatio The possibility of testig usig HW/SW equipmet ad the methods of AFDX leadig maufacturer
Implemetatio of AIN664p7 (AFDX) d System Fuctioal Testig /2 2/2 d System Fuctioal Test Bech Structure
esults of Fuctioal Testig of AIN664p7 (AFDX) d Device SW Implemetatio Achieved esults: reatio of the effective AIN664p7 (AFDX) ed device SW implemetatio ( < Jitter < 4 µs) The system is easily adaptive to ew requiremets ad scalable reatio of portable SW compoets Adoptio of test equipmet of oe of the leadig AFDX devices maufacturer orrectio of SW oly durig testig Usage of TS solutios at the implemetatio Test eport with the detailed Test Protocol 2
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