Université de Technologie de Compiègne Department of Mechanical Systems Engineering Roberval Laboratory UMR CNRS 7337

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10 ème Cngrès Internatinal de Génie Industriel EIGSI La Rchelle, 12-14 juin 2013 Université de Technlgie de Cmpiègne Department f Mechanical Systems Engineering Rberval Labratry UMR CNRS 7337 Chen ZHENG, Julien LE DUIGOU, Matthieu BRICOGNE, Benît EYNARD 1

10 ème Cngrès Internatinal de Génie Industriel EIGSI La Rchelle, 12-14 juin 2013 Intrductin Mechatrnic Systems Design Appraches Evaluatin f the Different Mdels fr Cllabratin Cnclusin Future Research Chen ZHENG, Julien LE DUIGOU, Matthieu BRICOGNE, Benît EYNARD 2

10 ème Cngrès Internatinal de Génie Industriel EIGSI La Rchelle, 12-14 juin 2013 Mechatrnic System Mechatrnic system is generally cnsidered as a cmbinatin f mechanical engineering, electrical engineering, cntrl engineering and cmputer engineering. [Carryer et al, 2011] Engineering Integratin [Schöner, 2004] Chen ZHENG, Julien LE DUIGOU, Matthieu BRICOGNE, Benît EYNARD 3

10 ème Cngrès Internatinal de Génie Industriel EIGSI La Rchelle, 12-14 juin 2013 Mechatrnic System Integratin Functinal integratin Physical integratin : several levels [Penas, 2009 ] Objective: T facilitate the integratin f different expert knwledge, s that mechatrnic systems with higher integratin level can be achieved. Means f actin: T imprve the cllabratin during the mechatrnic systems design prcess T prpse and adapt the data mdels t supprt the design prcess Chen ZHENG, Julien LE DUIGOU, Matthieu BRICOGNE, Benît EYNARD 4

10 ème Cngrès Internatinal de Génie Industriel EIGSI La Rchelle, 12-14 juin 2013 Sequential design mdel The sequential design prcess mdel is that the nvel design prcedure must be started when the previus prcedure has been finished. Mdelling/Simulatin Prttyping Deplyment/Lifecycle Recgnitin f the need Cnceptual design and functinal specificatin Hardware-in-the-lp simulatin Design ptimizatin Deplyment f embedded sftware Life cycle ptimizatin First principle mdular mathematical mdelling Sensr and actuatr selectin Detailed mdular mathematical mdelling [Shetty et al, 2010] Cntrl system design Design ptimizatin Chen ZHENG, Julien LE DUIGOU, Matthieu BRICOGNE, Benît EYNARD 5

10 ème Cngrès Internatinal de Génie Industriel EIGSI La Rchelle, 12-14 juin 2013 V-mdel Once the requirements have been taken int accunt, they are then placed under prject cntrl (upper-left) and the V-mdel will end with a user-validated system (upper right). [Frsberg et al, 1998] VDI 2206 The VDI guideline 2206, a functinal mdeling methdlgy, using V- mdel as the macr level, prvides the first neutral guideline fr the mechatrnic system design. [Fts et al, 2012] RFLP Methd A specific V-mdel fr mechatrnic system design. The descending branch f V-mdel is divided int 4 levels: Requirement analysis level, functinal level, lgic level and physical level. [Penas et al, 2010] Chen ZHENG, Julien LE DUIGOU, Matthieu BRICOGNE, Benît EYNARD 6

10 ème Cngrès Internatinal de Génie Industriel EIGSI La Rchelle, 12-14 juin 2013 Hierarchical design mdel In the hierarchical design mdel, ne FR at level i can affect several FRs at level i + 1 via the DPs at level i. [Hehenberger et al, 2010] The prcess f defining hierarchical levels must be repeated until elementary FRs (e.g. prven slutins, standard cmpnents) with their assciated, well knwn DPs are achieved. Chen ZHENG, Julien LE DUIGOU, Matthieu BRICOGNE, Benît EYNARD 7

10 ème Cngrès Internatinal de Génie Industriel EIGSI La Rchelle, 12-14 juin 2013 Three criteria f cllabratin have been chsen fr the evaluatin: Cncurrent design: T shrten the perid f the design prcess Macr level cllabratin: T exchange dmain-specific design data between the different disciplines Micr level cllabratin: Specific management f the cllabratin between the expert knwledge Design mdel Cncurrent design Macr level cllabratin Micr level cllabratin Sequential design mdel N Yes N V-mdel Yes Partial N VDI 2206 Yes Partial N RFLP Yes Yes Partial Hierarchical design mdel Yes Yes Partial Sme challenges related t the mechatrnic systems integratin still exist during the prcess f the mechatrnic system design: Develp the prducts with high level integratin Reduce the develpment perid Imprve the cllabratin Chen ZHENG, Julien LE DUIGOU, Matthieu BRICOGNE, Benît EYNARD 8

Interface 10 ème Cngrès Internatinal de Génie Industriel EIGSI La Rchelle, 12-14 juin 2013 Interfaces between different disciplines Interfaces between different engineers Requirement Principal Slutin Mechatrnic System Design Mechanic Engineer A Mechanic Engineer B Mechanics Mechanic Engineer C Electrical/ Electrnics Mechanics Sftware EE EE Engineer Electrical/ Engineer A B Electrnics EE Engineer C Interface Sftware Engineer A Sftware Engineer C Sftware Engineer B Sftware Chen ZHENG, Julien LE DUIGOU, Matthieu BRICOGNE, Benît EYNARD 9

10 ème Cngrès Internatinal de Génie Industriel EIGSI La Rchelle, 12-14 juin 2013 Data mdel is prpsed t supprt the prduct s whle life cycle (STEP, CPM, MOKA, PPO ), especially fr the mechanic prduct. By making use f data mdel, mechatrnic systems with higher level f integratin can be achieved during the mechatrnic systems design prcess. Sme challenges still exist in the current data mdels: Interface t integrate the infrmatin frm different disciplines. Integratin: based n the existence f a cmmn frmat fr all mdels Unificatin: based n a high level cmmn frmat (e. g. STEP) Federatin: based n dynamic mapping cncepts (e.g. Ontlgies and Semantic Web standards ) Interface fr micr level cllabratin Evlutin Nvel type data mdel shuld be prpsed t supprt mechatrnic system design. Chen ZHENG, Julien LE DUIGOU, Matthieu BRICOGNE, Benît EYNARD 10

Vertical Evlutin Mechatrnic Prduct 1 Design Prcesse Mechatrnic Prduct 2 Design Prcesse Mechatrnic Prduct 3 Design Prcesse Mechatrnic Prduct 4 Design Prcesse 10 ème Cngrès Internatinal de Génie Industriel EIGSI La Rchelle, 12-14 juin 2013 Evlutin Prduct family Design Requirement Hrizntal Evlutin Dmain-Specific Design System validatin Vertical evlutin: ne prduct s tempral dynamic during the whle design prcess Hrizntal evlutin: develpment f new prduct based n the successful design f its predecessrs. [WANG, 2003] Chen ZHENG, Julien LE DUIGOU, Matthieu BRICOGNE, Benît EYNARD 11

supprt 10 ème Cngrès Internatinal de Génie Industriel EIGSI La Rchelle, 12-14 juin 2013 Mechatrnic System Design Design Prcess Data mdel Cllabratin Interface Management Evlutins Macr level Micr level Exchange f dmain-specific data Between the expert knwledge Hrizntal Vertical Chen ZHENG, Julien LE DUIGOU, Matthieu BRICOGNE, Benît EYNARD 12

10 ème Cngrès Internatinal de Génie Industriel EIGSI La Rchelle, 12-14 juin 2013 Thank yu fr yur attentin! Questins / Recmmendatins? Chen ZHENG, Julien LE DUIGOU, Matthieu BRICOGNE, Benît EYNARD 13

10 ème Cngrès Internatinal de Génie Industriel EIGSI La Rchelle, 12-14 juin 2013 Carryer J.E., Matthew Ohline R., et al, (2011) Intrductin t mechatrnic design, Pearsn, pp.27-31 Schöner H.P., (2004) Autmtive Mechatrnic, Cntrl Engineering Practice, vl. 12, n. 11, pp. 1343 1351 Penas, O., Plateaux, et al, (2009). The different cmplexity levels in mechatrnics design prcess, 3rd Internatinal Cnference n Sftware, Knwledge, Infrmatin Management and Applicatins - SKIMA. Fes. Shetty D. and Klk R., (2010) Mechatrnic System Design, SI Editin, pp.6-7. Frsberg K., H. Mz et al, (1998) System Engineering fr Faster, Cheaper, Better, INCOSE1998, Vancuver, Canada. Fts A. B., Wasgint R., et al, (2012) State f the Art fr Mechatrnic Design Cncepts, IEEE/ASME 8th IEEE/ASME Internatinal Cnference n Mechatrnic and Embedded Systems and Applicatins, Suzhu, China, pp. 232 240 Penas O., Plateaux R., et al, (2010) Cnceptin mécatrnique - Vers un prcessus cntinu de cnceptin mécatrnique intégrée, Techniques de l Ingénieur Hehenberger P., Pltschak F., et al, (2010) Hierarchical design mdels in the mechatrnic prduct develpment prcess f synchrnus machines, Mechatrnic, vl. 20, n. 8, pp. 864 875 Wang F., Fenves S. J., et al, (2003) Twards mdeling the evlutin f prduct families,asme Cmputers and Infrmatin in Engineering Cnference, Chicag, US Chen ZHENG, Julien LE DUIGOU, Matthieu BRICOGNE, Benît EYNARD 14