Obsolete Product(s) - Obsolete Product(s)

Similar documents
HCF4028B BCD TO DECIMAL DECODER

HCF4001B QUAD 2-INPUT NOR GATE

HCF4081B QUAD 2 INPUT AND GATE

HCF4070B QUAD EXCLUSIVE OR GATE

HCF4010B HEX BUFFER/CONVERTER (NON INVERTING)

HCF4056B BCD TO 7 SEGMENT DECODER /DRIVER WITH STROBED LATCH FUNCTION

Obsolete Product(s) - Obsolete Product(s)

Description. Table 1. Device summary. Order code Temperature range Package Packaging Marking

HCC/HCF4027B DUAL-J-K MASTER-SLAVE FLIP-FLOP

HCC/HCF4032B HCC/HCF4038B

HCC4541B HCF4541B PROGRAMMABLE TIMER

.LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M74HC154 4 TO 16 LINE DECODER/DEMULTIPLEXER. HIGH SPEED tpd = 15 ns (TYP.) at VCC =5V

. MEDIUM SPEED OPERATION - 8MHz . MULTI-PACKAGE PARALLEL CLOCKING FOR HCC4029B HCF4029B PRESETTABLE UP/DOWN COUNTER BINARY OR BCD DECADE

CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate Quad 2-Input NAND Buffered B Series Gate

. HIGH SPEED .LOW POWER DISSIPATION .COMPATIBLE WITH TTL OUTPUTS M54HCT27 M74HCT27 TRIPLE 3-INPUT NOR GATE. tpd = 9 ns (TYP.

CD4043BC CD4044BC Quad 3-STATE NOR R/S Latches Quad 3-STATE NAND R/S Latches

TDA2822 DUAL POWER AMPLIFIER SUPPLY VOLTAGE DOWN TO 3 V LOW CROSSOVER DISTORSION LOW QUIESCENT CURRENT BRIDGE OR STEREO CONFIGURATION

CD4013BC Dual D-Type Flip-Flop

STP80NF55-08 STB80NF55-08 STB80NF N-CHANNEL 55V Ω - 80A D2PAK/I2PAK/TO-220 STripFET II POWER MOSFET

ULN2801A, ULN2802A, ULN2803A, ULN2804A

Order code Temperature range Package Packaging

CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate Quad 2-Input NAND Buffered B Series Gate

LF00AB/C SERIES VERY LOW DROP VOLTAGE REGULATORS WITH INHIBIT

LM833 LOW NOISE DUAL OPERATIONAL AMPLIFIER

ADJUSTABLE VOLTAGE AND CURRENT REGULATOR

Symbol Parameter Value Unit V DS Drain-source Voltage (V GS =0) 50 V V DGR Drain- gate Voltage (R GS =20kΩ) 50 V

.OPERATING SUPPLY VOLTAGE UP TO 46 V

ST202 5V POWERED MULTI-CHANNEL RS-232 DRIVERS AND RECEIVERS

MM74HC273 Octal D-Type Flip-Flops with Clear

L293B L293E PUSH-PULL FOUR CHANNEL DRIVERS. OUTPUT CURRENT 1A PER CHANNEL PEAK OUTPUT CURRENT 2A PER CHANNEL (non repetitive) INHIBIT FACILITY

Description. Table 1. Device summary. Order code Temperature range Package Packing Marking

CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset

MM74HC14 Hex Inverting Schmitt Trigger

DM74LS151 1-of-8 Line Data Selector/Multiplexer

. HIGH SPEED .LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M54/M74HC190 M54/M74HC191 4 BIT SYNCHRONOUS UP/DOWN COUNTERS. fmax = 48 MHz (TYP.

DDSL01. Secondary protection for DSL lines. Features. Description

TL074 TL074A - TL074B

STP62NS04Z N-CHANNEL CLAMPED 12.5mΩ - 62A TO-220 FULLY PROTECTED MESH OVERLAY MOSFET

MM74HC174 Hex D-Type Flip-Flops with Clear

HEF4011B. 1. General description. 2. Features and benefits. 3. Ordering information. 4. Functional diagram. Quad 2-input NAND gate

Symbol Parameter Value Unit V i-o Input-output Differential Voltage 40 V I O Output Current Intenrally Limited Top

L297 STEPPER MOTOR CONTROLLERS

STW34NB20 N-CHANNEL 200V Ω - 34A TO-247 PowerMESH MOSFET

ULN2001, ULN2002 ULN2003, ULN2004

4-bit binary full adder with fast carry CIN + (A1 + B1) + 2(A2 + B2) + 4(A3 + B3) + 8(A4 + B4) = = S1 + 2S2 + 4S3 + 8S4 + 16COUT

STW20NM50 N-CHANNEL Tjmax Ω - 20ATO-247 MDmesh MOSFET

MM74HCT373 MM74HCT374 3-STATE Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop

IRF740 N-CHANNEL 400V Ω - 10A TO-220 PowerMESH II MOSFET

Symbol Parameter Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive

CD40174BC CD40175BC Hex D-Type Flip-Flop Quad D-Type Flip-Flop

LM134-LM234-LM334. Three terminal adjustable current sources. Features. Description

BD238. Low voltage PNP power transistor. Features. Applications. Description. Low saturation voltage PNP transistor

TDA4605 CONTROL CIRCUIT FOR SWITCH MODE POWER SUPPLIES USING MOS TRANSISTORS

BD241A BD241C. NPN power transistors. Features. Applications. Description. NPN transistors. Audio, general purpose switching and amplifier transistors

CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset

STGW40NC60V N-CHANNEL 50A - 600V - TO-247 Very Fast PowerMESH IGBT

L4940 series VERY LOW DROP 1.5 A REGULATORS

TL084 TL084A - TL084B

1-of-4 decoder/demultiplexer

BTB04-600SL STANDARD 4A TRIAC MAIN FEATURES

L78MxxAB L78MxxAC. Precision 500 ma regulators. Features. Description

74AC139 74ACT139 Dual 1-of-4 Decoder/Demultiplexer

SWITCH-MODE POWER SUPPLY CONTROLLER PULSE OUTPUT DC OUTPUT GROUND EXTERNAL FUNCTION SIMULATION ZERO CROSSING INPUT CONTROL EXTERNAL FUNCTION

MC34063A MC34063E DC-DC CONVERTER CONTROL CIRCUITS

CD4013BC Dual D-Type Flip-Flop

BUX48/48A BUV48A/V48AFI

STP10NK60Z/FP, STB10NK60Z/-1 STW10NK60Z N-CHANNEL 600V-0.65Ω-10A TO-220/FP/D 2 PAK/I 2 PAK/TO-247 Zener-Protected SuperMESH Power MOSFET

CD4008BM CD4008BC 4-Bit Full Adder

MM74HC4538 Dual Retriggerable Monostable Multivibrator

TDA CHANNEL VOLUME CONTROLLER 1 FEATURES 2 DESCRIPTION. Figure 1. Package

STP6NK60Z - STP6NK60ZFP STB6NK60Z - STB6NK60Z-1 N-CHANNEL 600V - 1Ω - 6A TO-220/TO-220FP/D 2 PAK/I 2 PAK Zener-Protected SuperMESH Power MOSFET

Description. Table 1. Device summary

INTEGRATED CIRCUITS. 74LVC08A Quad 2-input AND gate. Product specification IC24 Data Handbook Jun 30

ETP01-xx21. Protection for Ethernet lines. Features. Description. Applications. Benefits. Complies with the following standards

L78M00 SERIES POSITIVE VOLTAGE REGULATORS.

STP60NF06FP. N-channel 60V Ω - 30A TO-220FP STripFET II Power MOSFET. General features. Description. Internal schematic diagram.

DATA SHEET. HEF40374B MSI Octal D-type flip-flop with 3-state outputs. For a complete data sheet, please also download: INTEGRATED CIRCUITS

STP60NF06. N-channel 60V Ω - 60A TO-220 STripFET II Power MOSFET. General features. Description. Internal schematic diagram.

IRF830. N - CHANNEL 500V Ω - 4.5A - TO-220 PowerMESH MOSFET

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

BD135 - BD136 BD139 - BD140

74VHC574 Octal D-Type Flip-Flop with 3-STATE Outputs

Table 1. Absolute maximum ratings (T amb = 25 C) Symbol Parameter Value Unit. ISO C = 330 pf, R = 330 Ω : Contact discharge Air discharge

VNP5N07 "OMNIFET": FULLY AUTOPROTECTED POWER MOSFET

CD4511BM CD4511BC BCD-to-7 Segment Latch Decoder Driver

DM74LS157 DM74LS158 Quad 2-Line to 1-Line Data Selectors/Multiplexers

IRFP450. N - CHANNEL 500V Ω - 14A - TO-247 PowerMESH MOSFET

MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer

STN3NF06L. N-channel 60 V, 0.07 Ω, 4 A, SOT-223 STripFET II Power MOSFET. Features. Application. Description

LM337. Three-terminal adjustable negative voltage regulators. Features. Description

SG2525A SG3525A REGULATING PULSE WIDTH MODULATORS

MC Low noise quad operational amplifier. Features. Description

DM74157 Quad 2-Line to 1-Line Data Selectors/Multiplexers

HEF4021B. 1. General description. 2. Features and benefits. 3. Ordering information. 8-bit static shift register

Quad 2-input NAND Schmitt trigger

CD4093BM CD4093BC Quad 2-Input NAND Schmitt Trigger

DM Segment Decoder/Driver/Latch with Constant Current Source Outputs

DM74184 DM74185A BCD-to-Binary and Binary-to-BCD Converters

MC14008B. 4-Bit Full Adder

2STBN15D100. Low voltage NPN power Darlington transistor. Features. Application. Description

Transcription:

BCD TO DECIMAL DECODER BCD TO DECIMAL DECODING OR BINARY TO OCTAL DECODING HIGH DECODED OUTPUT DRIVE CAPABILITY "POSITIVE LOGIC" INPUTS AND OUTPUTS: DECODED OUTPUTS GO HIGH ON SELECTION MEDIUM SPEED OPERATION : t PHL, t PLH = 80ns (Typ.) at V DD = 10V QUIESCENT CURRENT SPECIF. UP TO 20V STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS INPUT LEAKAGE CURRENT I I = 100nA (MAX) AT V DD = 18V T A = 25 C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC JESD13B "STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES" DESCRIPTION HCF4028B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. HCF4028B is a BCD to DECIMAL or BINARY to OCTAL decoder consisting of buffering on all 4 PIN CONNECTION ORDER CODES PACKAGE TUBE T & R DIP HCF4028BEY SOP HCF4028BM1 HCF4028M013TR inputs, decoding logic gates, and 10 output buffers. A BCD code applied to the four inputs, A to D, results in a high level at the selected one of 10 decimal decoded outputs. Similarly, a 3-bit binary code applied to inputs A through C is decoded in octal code at output 0 to 7 if D = "0". High drive capability is provided at all outputs to enhance dc and dynamic performance in high fan-out applications. DIP SOP September 2002 1/10

IINPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 10, 13, 12, 11 A, B, C, D BCD Data Inputs 10, 13, 12 A, B, C 3-Bit Binary Inputs 3, 14, 2, 15, 1, 6, 7, 4, 9, 5 3, 14, 2, 15, 1, 6, 7, 4 0 to 9 0 to 7 Buffered DECIMAL Decoded Outputs Buffered OCTAL Decoded Outputs 8 V SS Negative Supply Voltage 16 V DD Positive Supply Voltage FUNCTIONAL DIAGRAM TRUTH TABLE INPUTS OUTPUTS D C B A 0 1 2 3 4 5 6 7 8 9 L L L L H L L L L L L L L L L L L H L H L L L L L L L L L L H L L L H L L L L L L L L L H H L L L H L L L L L L L H L L L L L L H L L L L L L H L H L L L L L H L L L L L H H L L L L L L L H L L L L H H H L L L L L L L H L L H L L L L L L L L L L L H L H L L H L L L L L L L L L H H L H L L L L L L L L L L L H L H H L L L L L L L L L L H H L L L L L L L L L L L L H H L H L L L L L L L L L L H H H L L L L L L L L L L L H H H H L L L L L L L L L L 2/10

LOGIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit V DD Supply Voltage -0.5 to +22 V V I DC Input Voltage -0.5 to V DD + 0.5 V I I DC Input Current ± 10 ma P D Power Dissipation per Package 200 mw Power Dissipation per Output Transistor 100 mw T op Operating Temperature -55 to +125 C T stg Storage Temperature -65 to +150 C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltage values are referred to V SS pin voltage. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Value Unit V DD Supply Voltage 3 to 20 V V I Input Voltage 0 to V DD V T op Operating Temperature -55 to 125 C 3/10

DC SPECIFICATIONS Test Conditions Value Symbol Parameter V I (V) V O (V) I O (µa) The Noise Margin for both "1" and "0" level is: 1V min. with V DD =5V, 2V min. with V DD =10V, 2.5V min. with V DD =15V DYNAMIC ELECTRICAL CHARACTERISTICS (T amb = 25 C, C L = 50pF, R L = 200KΩ, t r = t f = 20 ns) (*) Typical temperature coefficient for all V DD value is 0.3 %/ C. V DD (V) T A = 25 C -40 to 85 C -55 to 125 C Min. Typ. Max. Min. Max. Min. Max. I L Quiescent Current 0/5 5 0.04 5 150 150 0/10 10 0.04 10 300 300 0/15 15 0.04 20 600 600 µa 0/20 20 0.08 100 3000 3000 V OH High Level Output 0/5 <1 5 4.95 4.95 4.95 Voltage 0/10 <1 10 9.95 9.95 9.95 V 0/15 <1 15 14.95 14.95 14.95 V OL Low Level Output 5/0 <1 5 0.05 0.05 0.05 Voltage 10/0 <1 10 0.05 0.05 0.05 V 15/0 <1 15 0.05 0.05 0.05 V IH High Level Input 0.5/4.5 <1 5 3.5 3.5 3.5 Voltage 1/9 <1 10 7 7 7 V 1.5/18.5 <1 15 11 11 11 V IL Low Level Input 0.5/4.5 <1 5 1.5 1.5 1.5 Voltage 9/1 <1 10 3 3 3 V 1.5/18.5 <1 15 4 4 4 I OH Output Drive 0/5 2.5 5-1.36-3.2-1.1-1.1 Current 0/5 4.6 5-0.44-1 -0.36-0.36 0/10 9.5 10-1.1-2.6-0.9-0.9 ma 0/15 13.5 15-3.0-6.8-2.4-2.4 I OL Output Sink 0/5 0.4 5 0.44 1 0.36 0.36 Current 0/10 0.5 10 1.1 2.6 0.9 0.9 ma 0/15 1.5 15 3.0 6.8 2.4 2.4 I I Input Leakage Current 0/18 any input 18 ±10-5 ±0.1 ±1 ±1 µa C I Input Capacitance any input 5 7.5 pf Symbol t PHL t PLH t THL t TLH Parameter Propagation Delay Time (Clock to "Out") Transition Time (Carry Out Line) Unit Test Condition Value (*) Unit V DD (V) Min. Typ. Max. 5 175 350 10 80 160 15 60 120 5 100 200 10 50 100 15 25 50 ns ns 4/10

TEST CIRCUIT C L = 50pF or equivalent (includes jig and probe capacitance) R L = 200KΩ R T = Z OUT of pulse generator (typically 50Ω) WAVEFORM : PROPAGATION DELAY TIMES (f=1mhz; 50% duty cycle) TYPICAL APPLICATION The circuit shown in fig. 1 converts any 4-bit code to a decimal or hexadecimal code. Fig. 2 shows a number of codes and the decimal or hexadecimal number in these codes, which must be applied to the input pins of HCF4028B to select a particular output. For example: in order to get a "high" on output 8 the input must be either an 8 expressed in 4-bit binary code or a 15 expressed in excess-3code. 5/10

FIGURE 1 : CODE CONVERSION CIRCUIT FIGURE 2 : CODE CONVERSION CHART INPUTS D C B A HEXA DECIMAL 4 BIT BINARY INPUT CODES 4 BIT GRAY EXCESS 3 DECIMAL EXCESS 3 GRAY AIKEN 4221 OUTPUT NUMBER 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 L L L L 0 0 0 0 H L L L L L L L L L L L L L L L L L L H 1 1 1 1 L H L L L L L L L L L L L L L L L L H L 2 3 0 2 2 L L H L L L L L L L L L L L L L L L H H 3 2 0 3 3 L L L H L L L L L L L L L L L L L H L L 4 7 1 4 4 L L L L H L L L L L L L L L L L L H L H 5 6 2 3 L L L L L H L L L L L L L L L L L H H L 6 4 3 1 4 L L L L L L H L L L L L L L L L L H H H 7 5 4 2 L L L L L L L H L L L L L L L L H L L L 8 15 5 L L L L L L L L H L L L L L L L H L L H 9 14 6 5 L L L L L L L L L H L L L L L L H L H L 10 12 7 9 6 L L L L L L L L L L H L L L L L H L H H 11 13 8 5 L L L L L L L L L L L H L L L L H H L L 12 8 9 5 6 L L L L L L L L L L L L H L L L H H L H 13 9 6 7 7 L L L L L L L L L L L L L H L L H H H L 14 11 8 8 8 L L L L L L L L L L L L L L H L H H H H 15 10 7 9 9 L L L L L L L L L L L L L L L H 6/10

FIGURE 3 : 6 BIT BINARY TO 1 OF 64 ADDRESS DECODER FIGURE 4 : NEON READOUT (NIXIE TUBE) DISPLAY APPLICATION 7/10

Plastic DIP-16 (0.25) MECHANICAL DATA DIM. mm. inch MIN. TYP MAX. MIN. TYP. MAX. a1 0.51 0.020 B 0.77 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L 3.3 0.130 Z 1.27 0.050 P001C 8/10

SO-16 MECHANICAL DATA DIM. mm. inch MIN. TYP MAX. MIN. TYP. MAX. A 1.75 0.068 a1 0.1 0.2 0.003 0.007 a2 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45 (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M 0.62 0.024 S 8 (max.) PO13H 9/10

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 10/10