ECE 06 Lab 4 Class A, B and Class AB Amplifiers Prelab Assignment Write a short description of the differences between class A and class B amplifiers. Be sure to include at least one advantage and disadvantage of each class relative to the other. OBJECTIVES Explain the source of crossover distortion in class B amplifiers. Demonstrate the reasons that class AB amplifiers are preferred over class B amplifiers. Determine load power in a class B and AB amplifier. Determine power dissipated in the output transistors in a class B and AB amplifier. Determine the efficiency of a class B and AB amplifier. See how to improve class B performance. OVERVIEW Most amplifiers deliver power to the load connected to them using one of several common output stages. The variety of stages offers choices and tradeoffs in efficiency and distortion among other things. The output stage consists of the transistors driving the load in our lab. The output stages are referred to as Class A, B, AB, C and D. Class D uses pulse width modulation to deliver power to the load. Class C uses a resonant circuit to deliver power to the load. Class A, AB and B typically use transistors in a similar configuration while biased at different levels of DC current which affects distortion and efficiency. We will study class B and AB amplifiers in this lab. Class A, AB and B amplifiers typically use two distinct transistors in the output stage. In our case the output stage is the pair of complementary transistors that drive the load as configured in Fig.. An NPN transistor drives the load when the output is positive, and a PNP transistor drives the load when the output is negative. The primary difference between these classes, as mentioned above, is the amount of bias current passing through the transistors. Bias refers to the amount of DC current that flows through the NPN and PNP transistors when there is no signal applied to the input of the amplifier. It should be noted that an amplifier is less efficient when there is more bias current. In class A the transistors are biased such that 00% of the maximum load current flows through the transistor pair. This makes sure that neither transistor shuts off at any time while driving the load. In the class B amplifier, each transistor is biased in the cutoff mode which is 0% of the maximum load current. The class AB amplifier, as the name implies, biases the transistors somewhere between B, 0% and A, 00% of the maximum load current. Most class AB amplifiers bias the transistors just out of the cutoff region, a small percentage of maximum load current flows through the transistors with no input signal. You will only look at class B and AB amplifiers in this lab. The main reason for this is that class A amplifiers are very difficult to build so the bias current stays at 00%. This results in a low amount of open loop distortion. Usually the bias current will continue to increase until the power supply can t deliver any more current or the NPN and PNP output transistors burn out. Class B amplifiers are relatively efficient because there is no bias current. One transistor is off while the other one delivers power to the load. This results in the highest amount of open loop distortion. Class AB can be almost as efficient as class B. A small amount of DC bias current flows through both transistors when VIN=0. This results in lower distortion than Class B and more than Class A. Both Class B and AB amplifiers also have the classic emitter-follower characteristics of relatively high current gain and a voltage gain that is slightly less than unity. In this exercise, you will examine these two classes of amplifier and compare their attributes.
MATERIALS DC power supply Function generator Oscilloscope DMM Pre-built amplifier board Figure shows the circuit you will use to experiment with class AB and class B amplifier output stages. H Amp In J Vin C4 C6 0uF C5 0.uF 0uF R.00K P 00 R4.00K Iquies Q Q Vb YELLOW N904 N906 Vb YELLOW RED Vc C 00pF I Q5 I Q6 C7 00pF Q5 D44 R.0 R.0 Ibias Ve ORANGE Ve ORANGE Q6 D45 -Ibias 5V C 0uF 50V H Amp Out C 0.uF Icc Load J C8 0.uF -5V SUPPLY J C9 0uF 50V -Iquies Vc WHITE -Icc Figure : Class AB-B output stage amplifier board. One thing we will evaluate is where the power goes in the amplifiers. We will concern ourselves with the DC and AC currents, voltages and power consumed by the circuit and delivered to the load impedance. We have an amplifier that is supplied with DC power and delivers AC power to the load. This complicates our evaluation because we need to know where the power goes to evaluate efficiency. We will also need to differentiate between power consumed by the output stage and the rest of the circuitry. Most amplifiers have only a DC power supply. Most of the circuitry conducts current even when there is no signal. As a matter of fact the amount of current usually doesn t change much even when the power amp delivers AC power to the load. The exception to this is in the output stage. Here the current feeding the output stage will vary depending on the power being delivered to the load. To help evaluate this we will set up some basic definitions. ±I CC Current delivered to the circuit by the power supply. ±V CC Voltaqe delivered to the circuit by the power supply. ±I QUIES DC Current delivered to the supporting circuitry by the power supply with VIN = 0. ±P QUIES P QUIES = I QUIES V CC. ±I BIAS DC current through Q5 and Q6 with VIN = 0. I Q5, I Q6 AC current and I BIAS carried by Q5 or Q6. P Q5, P Q6 AC and DC power delivered to/by Q5 or Q6. P Q5 =I Q5 V Q5, P Q6 =I Q6 V Q6. P CC = V CC * I CC. The DC voltage, current and power delivered to the system. Quiescent current: The current consumed by the amplifier when there is no input signal. Usually this includes the bias current, the DC current consumed by the output transistors. In our case we are not including the bias current. We want to know this so we can remove it from the power consumed by the output stage. So where does the quiescent current go? A close look at Fig. shows what
consumes the DC current. First set VIN = 0V. R, R4 and P will always conduct current. The amount depends on the value of P. The current through R, R4 and P is the total supply voltage divided by the sum of the resistances until Q and Q start conducting. I QUIES = (V CC - -V CC )/ (RR4P) Q and Q are configured as diodes and start conducting at about V P.0V, 0.5V per diode. Once this happens the current through P, Q and Q is a non-linear function of voltage. Fortunately we can avoid the whole non-linearity thing in this lab by recognizing that I R = I R4 = ((V CC - -V CC ) V P ) / (RR4). Bias current: There will be DC current flowing through Q5 and Q6 when Q and Q are conducting current. Once again this occurs when V Q = V BE5 0.5V and V Q = V BE6 0.5V. The amount of bias current through Q5 and Q6 depends on V Q and V Q, the transistor gain and temperature. The DC current through Q5 and Q6 we will call the bias current, I BIAS. Output transistor current I Q5 and I Q6 : I Q5 and I Q6 are made up of I BIAS and I LOAD. I BIAS is DC and I LOAD is AC. The load current is typically greater than the bias current for Class B and AB amplifiers. We want to determine where does the power get consumed? That s easy. By the load and by the circuitry. One way evaluate an amplifier is to look at efficiency. A classic method to evaluate efficiency is to divide the power delivered to the load by total power supplied: This is a reasonable definition. For class B amplifiers this never gets better than 78.5% at full output power. It doesn t work well here because of the artificially high quiescent current compared to the artificially low bias current. This amp is designed for easy analysis so I QUIES ends up being high and I BIAS ends up low. Another merit factor used for evaluation is the power delivered to the load divided by the total power dissipated in the output stage. In other words how much power does the output stage waste! The output stage is made up of Q5, Q6 and R and R and the load. The total power dissipated in the output stage is P LOAD P Q5DC P Q5DC P Q6DC P Q6AC P R P R. The power dissipated in the load will be calculated with RMS voltage or current and impedance because the load gets AC DC power. Note this power is average power. I RMS *V RMS = P AVE not P RMS. Many times it is incorrectly referred to as P RMS. What about the other power terms? For our experiments there is DC and AC current in the output stage. The DC power delivered to Q5 and Q6 when there is no output signal is: P Q5 = (I Q5 )(V CC - V R ) and P Q6 = (I Q6 )( -V CC - V R ) The above equation assumes the DC output voltage is 0V. If this is not true then the equation gets a little bit more complicated but it is still a simple KVL calculation. The AC power dissipated in the output stage is much more complicated. First each transistor is only on for half of the output
waveform. Q 5 for the positive half and Q 6 for the negative half. Let s look at Q 5. The current through Q 5 is equal to the current to the load. That was easy. The voltage across Q 5,V Q5, is the hard part. It is (V CC V O ) for the positive half of the output waveform. That doesn t seem so bad either. It gets harder when V O is time varying as it always is. Note V O = I L R L. For example if V O is a sine wave then: V Q5 = [V CC I L R L sin(ωt)]. Now the current through the load. When V O is a sine wave then the load current is: I L = I Q5 = [I L R L sin(ωt)]/r L =. I L sin(ωt) Finally the power dissipated by the output transistor Q5 is: V I R sin ωt I sin ωt dt A similar argument is true for Q 6. The equations given above neglects the power dissipated in the emitter resistors. All this discussion about power, why do we care anyway? The real concern is whether or not the output transistor can dissipate the power they need to survive the ordeal. In a real design the power has to go somewhere or the transistors will melt down. Usually the power is passed on to the environment in the form of warm air. If we do this well enough the transistors will survive. They won t get too hot whatever too hot is. A few theoretical calculations before we start: Theoretical circuit voltages and currents: Let s take a look at the circuit. How much quiescent current, I QUIES, flows in this circuit for (V CC - - V CC )= 0V when P is set to 0Ω? How much quiescent current, I QUIES, flows in this circuit, for V CC = 0V when P is set to 00Ω? Assume V Q = V Q = 0.6V? Don t worry about I BIAS for this calculation. I QUIES_P=0 = I QUIES_P=00 PROCEDURE: ) Connect the 5Ω, 5W resistor to the amplifier output. The load must be connected to observe the interesting stuff. Turn the trim pot, P, to 0Ω (fully counter clockwise). Connect the DC supply to the DC input of the amplifier through the DMM current meter. Turn on the supply and set it to ±5V. Do not connect the input to anything yet. Measure the positive and negative DC current coming from the supply. I CC, -I CC ) Measure I QUIES_P=0. Determine this by measuring V R or V R4, I = V RX /R X. TP V C to V B or V B to V C gives V R or V R4. I QUIES_P=0_REAL = Does I CC = I QUIES_P=0_REAL? It probably doesn t. There is some other circuitry on the board drawing some current. Use I CC for quiescent when needed for calculations! ) Turn the trim pot, P, fully clockwise then measure V R or V R4 again to determine I QUIES_P=00_REAL Turn the trim pot back to 0 ohms (fully counter clockwise.
4) Measure the DC voltage across R and R. V R V R. 5) Measure V BE5, V BE6 and V B5B6. How much current is flowing through Q5 and Q6? I Q5 I Q6 What class of amplifier output stage is this? CLASS. The next 5 steps will be repeated with different input voltages. V O = V PP and V PP. I recommend you decide whether you perform each step with output voltages or perform 5 steps with output voltage then 5 more with the other output voltage. 6) Make sure the trim pot is fully CCW, at 0Ω. Generate a () V PP sinusoidal khz output signal, V O. Observe the input, V IN, and output, V O, waveforms on the scope. Pay particular attention to the voltage center of the sin wave. Record both waveforms using the oscilloscope. 7) Use the X-Y feature on the scope to obtain a V O versus V IN plot for this amplifier with a () V PP output. Capture this waveform using the oscilloscope. 8) Record the V RMS values of the V IN and V O waveforms. Calculate the power delivered to R L. 9) Use the DMM to measure the total current, ±I CC, drawn by the circuit from the DC supply for a () V PP output. Then, use this value, I QUIES and V CC to calculate source power. V INRMS V ORMS P LOAD ±V CC ±I CC ±P CC I QUIES I Q5Q6DC I Q5Q6AC P Q5Q6 V PP= V PP= 0) You should re-measure I QUIES by setting V IN to zero immediately after collecting data at V O = or V PP then record I CC. You should do this just after measuring I CC with V O set to () V PP. I QUIES changes with the temperature of Q and Q. By measuring just after I CC with V O = V PP you get I QUIES at the same temperature as I TOTAL = I QQ I QUIES. Remember I QQ = I BIAS when V IN = 0V. I BIAS is 0 for class B. It is non-zero for class AB. ) Repeat step 6-0 with V O = V PP. ) Set V O to a 0 V PP KHz sin wave. Turn the trim pot, P, fully CW. Measure the current flowing through R and R. Hint: I R = V R / R, I R = V R /R. I R I R How much bias current is going through the transistors if any? What class is this? ) Measure V BE5, V BE6 and V BB. 4) Repeat steps 8, 9 and 0 for V O = V PP and KHz. 5) Repeat steps 8, 9 and 0 for V O = V PP and KHz. V INRMS V ORMS P LOAD ±V CC ±I CC ±P CC I QUIES I Q5Q6DC I Q5Q6AC P Q5Q6 V PP= V PP= Next we will convert a class B output stage into a better output stage. Better means less distortion without going to a class AB output stage. This can be done with op-amp type circuitry in an actual
audio power amp. We will use a real op-amp here to make it simple to do. Sometimes this output stage is actually added to an op-amp when a high output current is needed. The op-amp circuit is shown in Figure. SW C IN or OUT 5V 7 C 0.uF UB LF56 V nc 8 V- 4 C 0.uF -5V R5 80.6K R7 00.0K R6 0.0K From H To Amp In C0 0uF J4 Vs R8 00.0K - UA 5 6 LM7 Figure : Op-amp driver for the class B power stage. Switch SW allows you to add or remove C0. More on that later. H is a header that allows you to connect the op-amp output to the class B amp and connect the class B amp to the op-amp. You will do this later. Vs GND R8 00.0K R7 00.0K R5 80.6K - UA Figure : 5 6 R6 0.0K C0 0uF LM7 Figure shows how the class B amplifier will be connected in the feedback loop of the op-amp to make it better. Here is a brief description of the linearized class B amplifier. First our Class B amplifier does not pass DC signals. Normally one would but ours does not pass DC to make it was easier to build and understand. So an op-amp circuit that includes the amp in the feedback loop will not pass DC. This means that the op-amp DC output will not be controlled unless we close the loop at DC. The op-amp output can drift to any DC value. This is why R5, R6 and C0 are in this circuit. They close the loop at DC. R5 and C0 effectively form a DC source at the voltage of the DC offset of the op-amp. R6, R8 and the op-amp close the loop with a DC gain of -. This keeps the DC offset under control. R5, R6 and C0 do not pass AC signals above Hz or so. The AC signals pass through the class B amplifier. The 5Ω load resistor is a voltage source that drives R7, the AC feedback resistor. To From Vplus Class B Amplifier Vminus Vdc Out- Vdc- Out In- RL 5 Ohm 5W
R7, R8 and the op-amp close the loop for AC signals with a gain of - again. So V O will be an inverted version of VIN and the DC output of the op-amp will be about 0V. 6) Use the circuit shown in Fig. 4 first. a. Set the transistor amp bias to yield a class B amplifier. (P full CCW) b. IMPORTANT: Set SW to the OUT position. This leaves you with almost an inverting op-amp followed by the class B output stage c. Put a jumper between To and. R7 00.0K R5 80.6K R6 0.0K From Vplus Vs R8 00.0K - UA 5 6 C0 0uF LM7 To Class B Amplifier Vdc Out In- Out- RL 5 Ohm 5W GND Vdc- Figure 4: The circuit after step 6 c. d. Use the V S input on the board. Generate a V PP KHz sine wave at V O. e. Observe V O and in the time domain. They should look very similar to V O and V IN for step 5. V O should be distorted or the transistor amp is not in class B operating mode f. Capture V O and with the scope. g. Observe V O and in the frequency domain. FFT under math. h. Capture the FFT of V O with the scope. i. Set SW to the IN position. Put in the other jumper between From and. Vminus R7 00.0K R5 80.6K R6 0.0K From Vplus Vs R8 00.0K - UA 5 6 C0 0uF LM7 To Class B Amplifier Vdc Out In- Out- RL 5 Ohm 5W GND Vdc- Figure 5: Circuit after step 6i. Vminus
j. In the time domain, capture V S, and V O. k. What happened to? l. What caused that to happen? m. Capture V O versus in the XY mode on the scope. n. Determine the nd and rd harmonic distortion with a 00KHz VPP output. Use the FFT math function for this. 7) Set the power stage to class AB. a. Determine the nd and rd harmonic distortion with a 00KHz VPP output. Use the FFT math function for this. QUESTIONS. Which amplifier has the higher values of VBE? Explain why this is the case.. How much power do Q5 and Q6 dissipate for V O = and V PP when they are run in Class AB mode?. How much power is delivered to the load for the cases in question. 4. What value of input voltage would we expect the greatest figure of merit value, H. 5. Which setup 6 or 7 had lower distortion?