Transfer and handling of thin semiconductor materials by a combination of wafer bonding and controlled crack propagation

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Mat. Res. Soc. Symp. Proc. Vol. 681E 2001 Materials Research Society Transfer and handling of thin semiconductor materials by a combination of wafer bonding and controlled crack propagation J. Bagdahn 1,2, D. Katzer 1, M. Petzold 1, M. Wiemer 3, M. Alexe 4, V. Dragoi 4, U. Goesele 4 1 Fraunhofer Institute for Mechanics of Materials, Heideallee 19, D-06120 Halle, Germany. 2 Johns Hopkins University, Department of Mechanical Engineering, 3400 N. Charles Street, Baltimore MD 21218-2681, U.S.A. 3 Fraunhofer Institute for Reliability and Microintegration, Dept. Micro Devices and Equipment, Postfach 344, D-09003 Chemnitz, Germany 4 Max- Planck-Institute of Microstructure Physics, Weinbergweg 2, D-06120 Halle, Germany. ABSTRACT Direct waferbonding is an appropriate technology to join two or more wafers of the same or of different materials. Waferbonding can be used to stiffen thin wafers during fabrication. However, conventional fabrication processes lead to an increase of the bond strength, which inhibits the required de-bonding. The propagation of cracks, which is based on a subcritical crack growth in the bonded interface, was used to cleave the bonded wafers. The subcritical crack growth is limited to the bonded interface, since the adjacent bulk semiconductor materials are inherently resistant to subcritical crack growth. The process allows the separation of Si-Si and Si-GaAs wafers after annealing. Wafer-bonded SOI wafers can also be separated with this technology even if they were annealed at 1100ºC. The first examples for wafer stiffening during fabrication and wafer transfer using the developed approach will be presented. INTRODUCTION The fabrication of microelectronic, micromechanical and optoelectronic devices requires manufacturing, handling or transferring of thin layers of semiconductor materials with thickness of 250 µm or less. Direct waferbonding is an appropriate technology to join two or more wafers of the same or of different materials /1, 2/. Therefore the bonding of a thin process wafer to a thick substrate wafer can be used to stiffen the thin process wafer and avoid wafer bowing or fracture. In addition, the approach enables the use of conventional high temperature processes such as oxidation, diffusion, or film deposition. However, these steps contribute to a strength increase in the bonded interface and would prevent the required de-bonding, of the process wafer from the handling substrate wafer, without wafer fracture. Therefore, a reliable separation technique for high-strength bonded wafers can be of practical significance. In this paper, we will present a new method /3/, which stiffens thin semiconductor materials during fabrication by direct waferbonding and subsequently promotes controlled cleaving by using subcritical crack growth in the bonded interface. It is the aim of the paper to demonstrate the application of this technique in combination with wafer bonding for the I9.3.1

handling of GaAs and the fabrication of Si microelectromechanical systems (MEMS) using SOI wafers. CLEAVING APPROACH It was recently shown that subcritical crack growth processes can occur in the interface of mechanically loaded, wafer-bonded semiconductor materials /4/. The subcritical crack growth determines the lifetime of stressed wafer-bonded MEMS and, therefore, their mechanical reliability properties. For instance, it was shown that a wafer-bonded device, which is statically loaded with 30-40% of its initial strength, fails after a time of about 1-½ years /5/. The subcritical crack growth is based on the stress corrosion of siloxane bonds (Si- O-Si) in the bonded interface. Molecules which contribute to the stress corrosion processes of siloxane bonds are e.g. water, ammonia, or methanol /6/. For example, the humidity of the ambient air is a typical source of water molecules. Figure 1 shows the subcritical crack growth in a silicon dioxide network. In the first step the water molecules will be readily transported to the crack tip (Figure 1, step 1). Afterwards, the water molecules attack highly stressed siloxane bonds at the crack tip (Figure 1, step 23). As a result, silanol bonds (Si-OH) were formed as follows: Si-O-Si + H 2 O mechanical stress Si-OH : HO-Si (1) The concomitant hydrogen bonds between opposing silanol groups can be more easily cleaved by the applied stress compared to the covalent Si-O bonds (Figure 1, step 3). After cleaving one siloxane bond, the process will continue at the next siloxane bond. The velocity of rupture depends on the applied mechanical load and the amount of reactive species at the crack tip. Therefore the intensity of the applied load and the environmental conditions influence the velocity of crack propagation. Figure 1: Stress corrosion in a silicon dioxide network (after Michalske /6/), see text for details. In Figure 2 the subcritical (slow) crack growth velocity of SOI (silicon-on-insulator) wafers with different annealing temperatures is depicted. The crack growth velocity, v, in Figure 2 is plotted as a function of the relative loading ratio, R, where R is the ratio between the applied loading and the inertial strength of the interface. A value of R=1 leads to a fast continuous crack growth, which is frequently combined with an out-kinking of the crack into the bulk I9.3.2

material. It can be seen in Figure 2 that the maximum subcritical crack growth velocity can reach values up to v~10-5 10-4 m/s for samples annealed at high temperature, when they are cleaved under laboratory conditions. However, the subcritical crack growth velocity can be further increased by changing the environmental conditions, e.g. the cleaving in pure water leads to an increase in the maximum velocity up to v=10-3 m/s /5/. As a consequence, slow crack propagation with a velocity in the order of a few nanometers up to millimeters per second can be observed depending on the applied stress level and the environmental conditions. The investigations revealed that subcritical crack growth occurs in bonded interfaces that contain a homogeneous silicon dioxide layer (siloxane bonds). It was found that hydrophobic bonded interfaces and hydrophilic interfaces with a native native oxide annealed at 1100ºC showed no subcritical crack growth behavior. This is reasonable since siloxane bonds are absent in a hydrophobic interface and local regions of silicon-silicon bonds interrupt the native silicon dioxide layer in hydrophilic samples annealed at 1100 C /7/. Since the silicon-silicon bonds are inherently resistant to stress corrosion, the slow crack growth in these bonded interface is prevented. 10-3 v / m/s 10-4 10-5 10-6 10-7 annealing temperature 800 C 1100 C 10-8 10-9 10-10 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 loading ratio, R Figure 2: Subcritical crack growth velocity, v, versus loading ratio R. Samples: Directly bonded 4 Cz-silicon wafer (thickness 525 µm) with a 500 nm interfacial oxide. Environmental conditions during cleaving: 23ºC and 30% relative humidity. In contrast to the bonded interface, most of the semiconductor bulk materials, such as Si or GaAs, are known to be insensitive to crack corrosion. Therefore, the subcritical crack growth is confined to the wafer bond interface preventing the crack from kinking into the wafer material. The effect enables controlled crack propagation in the bonded interface and may, consequently also be utilized for the cleaving of bonded wafers. The developed handling and transferring approach consists of three basic steps. First, a process wafer is bonded to a handling wafer. Subsequently, the process wafer can be grinded, etched or polished to the required thickness. In the second step, all necessary technological processes such as oxidization, implantation, film deposition, high temperature annealing or etching can be performed on the process wafer without any restrictions due to the handling substrate. In the third step, the process wafer is cleaved from the handling wafer using a I9.3.3

controlled subcritical crack growth in the bonded interface. The handling wafer is not destroyed and can be used again for future processing steps. For the cleaving step, a special computer controlled device was developed that inserts thin blades at four different positions into the bonded interface. During the cleaving process, the four blades will be inserted into the bonded interface and fatigue cracks will form in front of the blade tips. In order to generate the subcritical crack growth, a controlled slow insertion speed is required during the initial stage. The cracks grow in front of the blades until they are united, which leads to the complete separation of the bonded wafers. A computer controlled cleaving device was used for the regulation of the insertion velocity. If the initial cracks are formed, the crack growth velocity can be increased to a few hundred µm/s up to few mm/s. The maximum cleaving velocity depends on the annealing treatment, the ratio of thickness between the wafers, and the environmental conditions during cleaving. Details of the technical approach can be found in Bagdahn et al. /8/. In Figure 3, a completely cleaved SOI wafer (annealed at 1100 C) is presented. An interference pattern is visible on the cleaved surfaces, due to the fracture surface roughness in the nanometer range, caused by the crack growth in the 500 nm thick interfacial oxide. Process wafer Fracture surfaces Substrate wafer Figure 3: Cleaved bonded 4 (100) SOI wafer pair after an annealing of 1100ºC. HANDLING OF GaAs WAFERS DURING FABRICATION It was recently shown that intermediate spin on glass films can be used for bonding of Si- GaAs wafers at low temperature /9/, which enables the fabrication of Si-GaAs heterostructures. Furthermore, the bonding technology can be used for strengthening of brittle GaAs wafers. Si-Si and Si-GaAs were bonded and subsequently annealed at 200ºC in order to study the subcritical crack growth behavior in the intermediate glass layer. The investigation revealed a slow crack propagation in the intermediate glass layer. Figure 4 shows the crack growth velocity in the intermediate glass layer as a function of the loading ratio, R, between Si-Si and Si-GaAs wafers, which were annealed at 200ºC. The results in Figure 4 show that for the same bonding conditions the crack growth velocity depends on the material combination. This effect can be attributed to the stress situation at the crack tip. The crack is loaded by pure tensile stresses during cleaving of the Si-Si wafers, whereas the difference in the elastic material properties between Si and GaAs lead to additional shear forces and a reduction of the tensile force at the crack tip. This reduces the crack growth velocity since the intensity of the tensile force is responsible for the bond rupture on the microscopy scale /10/. I9.3.4

10-3 10-4 10-5 Si - spin-on-glass- GaAs Si - spin-on-glas- Si v / m/s 10-6 10-7 10-8 10-9 10-10 0.50 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 loading ratio, R Figure 4: Subcritical crack growth velocity, v, versus loading ratio, R, for spin on glass bonded wafers. Samples: 4 Cz-silicon wafer (thickness 525 µm) and 4 Cz-silicon wafer (thickness 525 µm) GaAs wafers (thickness 650 µm). Environmental conditions during cleaving: 23ºC and 30% relative humidity. FABRICATION OF MICROMECHANICAL SYSTEMS Figure 5 shows the process flow during fabrication of a MEMS device by transferring a thin wafer to another wafer. Figure 5: Transferring thin semiconductor materials by direct waferbonding and controlled cleaving to form a micromechanical device (see text for details). A patterned SOI wafer is bonded against a flat silicon wafer (Figure 5-1-3). Afterwards, the SOI wafer is cleaved at the high temperature bonded interface using the described approach (Figure 5-4). The fabricated new wafer contains a sealed cavity, which can be used for pressure sensors or fluidic devices (Figure 5-5). Further etching processes can be applied to produce movable elements (Figure 5-6), therefore a freestanding beam with a defined I9.3.5

thickness and a possible large displacement perpendicular to the bonded interface is produced. The cleaved wafer from the SOI wafer can be used either as a new handling or as a capping wafer. The investigations showed the possibility of transferring a 50 µm thick thin silicon wafer from a wafer-bonded SOI wafer (annealing 1100ºC, 500 nm interfacial oxide) to a second wafer by cleaving the high temperature bond interface even if the second bond was only annealed at 400ºC. CONCLUSIONS We have shown that the propagation of subcritical cracks can be used to separate directly bonded Si-Si and Si-GaAs wafers. The controlled cleaving in the bonded interface is based on a stress corrosion process in the bonded interface. The velocity of the crack growth varied between a few nanometers to millimeters per second, depending on the bonding conditions, the environmental conditions during cleaving and the thickness ratio between the separated wafer levels. The technology can be used for stiffening of thin and brittle wafers during fabrication, even at high temperatures. Furthermore, the approach supports the fabrication of microelectromechanical systems, further studies about the fabrication of a pressures sensor are under investigations. REFERENCES /1/ Q.-T. Tong and U. Goesele, Semiconductor wafer bonding: Science and Technology, New York: John Wiley & Sons. Inc. (1999). /2/ A. Ploessl and G. Kraeuter, Wafer direct bonding: Tailoring adhesion between brittle materials, Materials Science & Engineering Report (R25). Elsevier Amsterdam, Lausanne, New York, Oxford, Shannon, Tokyo (1999). /3/ J. Bagdahn and M. Petzold, Handling and transferring of thin semiconductor materials, Patent pending. /4/ J. Bagdahn, D. Katzer and M. Petzold, Investigations of the subcritical crack growth in wafer-bonded interfaces (in German), DVM-Band 230 Unterkritisches Risswachstum : 385-394, 1998. /5/ J. Bagdahn and M. Petzold, Fatigue of directly wafer-bonded silicon under static and cyclic loading, Journal of Micro System Technology, in press. /6/ T.A. Michalske, Fundamental studies of glass fracture, Proc. XV Int. Congress on Glass, 3-15, 1989. /7/ J. Bagdahn and M. Petzold, Lifetime properties of wafer-bonded components under static and cyclic loading, Fifth Int. Symp. on Semicond. Wafer Bonding: Science, Technol. and Appl., 1999, Honolulu, Hawaii, in press. /8/ J. Bagdahn, D. Katzer, M. Petzold, M. Wiemer, M. Alexe, V. Dragoi, U. Goesele, A new approach for handling and transferring of thin semiconductor materials, Proceed. Micro System Technologies 2001, H. Reichl (ed.), VDE Verlag Berlin u. Offenbach 2001, S. 449-454 /9/ M. Alexe, V. Dragoi, M. Reiche and U. Goesele, Low temperature GaAs/Si wafer bonding. Electronics Letters, Vol. 36, No. 7, 677-678. /10/ B.R. Lawn, Fracture of brittle solids, Cambridge university press, 2 nd edition, 1995. I9.3.6