ltra-low Power S485 with Low EMI, Shutdown and High Input Impedance FETES High Input Impedance: p to 256 Transceivers on the us Low Power: I CC = 12µ Max with Driver Disabled I CC = 2µ Max with Driver Enabled, No Load 1µ Quiescent Current in Shutdown Mode Controlled Slew ate Driver for educed EMI Single 5V Supply ESD Protection to ±1kV On eceiver Inputs and Driver outputs 7V to 12V Common-Mode ange Permits ±7V Ground Difference etween Devices on the Data Line Thermal Shutdown Protection Power p/down Glitch-Free Driver Outputs Permit Live Insertion or emoval of Transceiver Driver Maintains High Impedance in Three-State or with the Power Off Pin Compatible with the LTC485 PPLICTI O S attery-powered S485/S422 pplications Low Power S485/S422 Transceiver Level Translator SCIPTIO The LTC 1487 is an ultra-low power differential line transceiver designed with high impedance inputs allowing up to 256 transceivers to share a single bus. It meets the requirements of S485 and S422. The features output drivers with controlled slew rate, decreasing the EMI radiated from the S485 lines, and improving signal fidelity with misterminated lines. The CMOS design offers significant power savings without sacrificing ruggedness against overload or ESD damage. Typical quiescent current is only 8µ while operating and 1µ in shutdown. The driver and receiver feature three-state outputs, with the driver outputs maintaining high impedance over the entire common-mode range. Excessive power dissipation caused by bus contention or faults is prevented by a thermal shutdown circuit which forces the driver outputs into a high impedance state. The receiver has a fail-safe feature which guarantees a high output state when the inputs are left open. I/O pins are protected against multiple ESD strikes of over ±1kV using the Human ody Model. The is fully specified over the commercial temperature range and is available in 8-pin P and SO packages., LTC and LT are registered trademarks of Linear Technology Corporation. TYPICL PPLICTI O 1 2 E 3 7 4 D 6 12Ω 2 FEET OF TWISTED-PI WIE 33Ω 7 12Ω 6 D 1 2 E 3 4 ECEIVE INPT 4.7nF EQIVLENT LOD OF 256 TNSCEIVES T1 T2 1
SOLTE XI TI GS W W W (Note 1) Supply Voltage ( )... 12V Control Input Voltage....5V to +.5V Driver Input Voltage....5V to +.5V Driver Output Voltage... ±14V eceiver Input Voltage... ±14V eceiver Output Voltage....5V to +.5V Operating Temperature ange... C T 7 C Storage Temperature ange... 65 C to 15 C Lead Temperature (Soldering, 1 sec)... 3 C PCKGE/O I FO E 1 2 3 4 N8 PCKGE 8-LED PP TOP VIEW D 8 7 6 5 GND S8 PCKGE 8-LED PLSTIC SO T JMX = 125 C, θ J = 13 C/ W (N8) T JMX = 125 C, θ J = 15 C/ W (S8) W TIO O PT NME CN8 CS8 S8 PT MKING 1487 Consult factory for Industrial and Military grade parts. ELECTICL CHCTEISTICS C T 7 C, = 5V (Notes 2, 3) unless otherwise noted. SYMOL PMETE CONTIONS MIN TYP MX NITS V OD1 Differential Driver Output Voltage (nloaded) I O = 5 V V OD2 Differential Driver Output Voltage (with Load) = 5Ω (S422) 2. V = 27Ω (S485), Figure 1 1.5 5 V V OD Change in Magnitude of Driver Differential Output = 27Ω or = 5Ω, Figure 1.2 V Voltage for Complementary Output States V OC Driver Common-Mode Output Voltage = 27Ω or = 5Ω, Figure 1 3 V V OC Change in Magnitude of Driver Common-Mode = 27Ω or = 5Ω, Figure 1.2 V Output Voltage for Complementary Output States V IH Input High Voltage,, E 2 V V IL Input Low Voltage,, E.8 V I IN1 Input Current,, E ±2 µ I IN2 Input Current (, ) =, = V or 5.25V, V IN = 12V.3 m =, = V or 5.25V, V IN = 7V.15 m V TH Differential Input Threshold Voltage for eceiver 7V V CM 12V.2.2 V V TH eceiver Input Hysteresis V CM = V 45 mv V OH eceiver Output High Voltage I O = 4m, V ID = 2mV 3.5 V V OL eceiver Output Low Voltage I O = 4m, V ID = 2mV.4 V I OZ Three-State (High Impedance) Output = Max,.4V V O 2.4V ±1 µ Current at eceiver IN eceiver Input esistance 7V V CM 12V 7 96 kω I CC Supply Current No Load, Output Enabled 12 2 µ No Load, Output Disabled 8 12 µ I SHDN Supply Current in Shutdown Mode = V, E = 1 1 µ I OSD1 Driver Short-Circuit Current, V OT = HIGH 7V V O 12V 35 25 m I OSD2 Driver Short-Circuit Current, V OT = LOW 7V V O 12V 35 25 m I OS eceiver Short-Circuit Current V V O 7 85 m 2
ELECTICL CHCTEISTICS 4 C T 85 C, = 5V (Note 4) unless otherwise noted. SYMOL PMETE CONTIONS MIN TYP MX NITS V OD1 Differential Driver Output Voltage (nloaded) I O = 5 V V OD2 Differential Driver Output Voltage (with Load) = 5Ω (S422) 2. V = 27Ω (S485), Figure 1 1.5 5 V V OC Driver Common-Mode Output Voltage = 27Ω or = 5Ω, Figure 1 3 V V TH Differential Input Threshold Voltage for eceiver 7V V CM 12V.2.2 V V TH eceiver Input Hysteresis V CM = V 45 mv I CC Supply Current No Load, Output Enabled 12 2 µ No Load, Output Disabled 8 12 µ I SHDN Supply Current in Shutdown Mode = V, E = 1 1 µ t PLH Driver Input to Output FF = 54Ω, C L1 = C L2 = 1pF, 15 12 ns t PHL Driver Input to Output (Figures 3, 5) 15 12 ns t SKEW Driver Output to Output 1 6 ns t r, t f Driver ise or Fall Time 15 2 ns t PLH eceiver Input to Output FF = 54Ω, C L1 = C L2 = 1pF, 3 14 25 ns t PHL eceiver Input to Output (Figures 3, 7) 3 14 25 ns t SKD t PLH t PHL Differential eceiver Skew 13 ns f MX Maximum Data ate 25 kbps SWITCHI G CHCTEISTICS C T 7 C, = 5V (Notes 2, 3) unless otherwise noted. SYMOL PMETE CONTIONS MIN TYP MX NITS t PLH Driver Input to Output FF = 54Ω, C L1 = C L2 = 1pF, 15 12 ns t PHL Driver Input to Output (Figures 3, 5) 15 12 ns t SKEW Driver Output to Output 25 6 ns t r, t f Driver ise or Fall Time 15 12 ns t ZH Driver Enable to Output High C L = 1pF (Figures 4, 6), S2 Closed 1 15 ns t ZL Driver Enable to Output Low C L = 1pF (Figures 4, 6), S1 Closed 1 15 ns t LZ Driver Disable Time from Low C L = 15pF (Figures 4, 6), S1 Closed 15 15 ns t HZ Driver Disable Time from High C L = 15pF (Figures 4, 6), S2 Closed 15 15 ns t PLH eceiver Input to Output FF = 54Ω, C L1 = C L2 = 1pF, 3 14 25 ns t PHL eceiver Input to Output (Figures 3, 7) 3 14 25 ns t SKD t PLH t PHL Differential eceiver Skew 13 ns t ZL eceiver Enable to Output Low C L = 15pF (Figures 2, 8), S1 Closed 2 5 ns t ZH eceiver Enable to Output High C L = 15pF (Figures 2, 8), S2 Closed 2 5 ns t LZ eceiver Disable from Low C L = 15pF (Figures 2, 8), S1 Closed 2 5 ns t HZ eceiver Disable from High C L = 15pF (Figures 2, 8), S2 Closed 2 5 ns f MX Maximum Data ate 25 kbps t SHDN Time to Shutdown =, E = 5 2 6 ns 3
SWITCHI G CHCTEISTICS C T 7 C, = 5V (Notes 2, 3) unless otherwise noted. SYMOL PMETE CONTIONS MIN TYP MX NITS t ZH(SHDN) Driver Enable from Shutdown to Output High C L = 1pF (Figures 4, 6), S2 Closed 2 ns t ZL(SHDN) Driver Enable from Shutdown to Output Low C L = 1pF (Figures 4, 6), S1 Closed 2 ns t ZH(SHDN) eceiver Enable from Shutdown to Output High C L = 15pF (Figures 2, 8), S2 Closed 2 ns t ZL(SHDN) eceiver Enable from Shutdown to Output Low C L = 15pF (Figures 2, 8), S1 Closed 2 ns The denotes specifications which apply over the full operating temperature range. Note 1: bsolute maximum ratings are those beyond which the safety of the device cannot be guaranteed. Note 2: ll currents into device pins are positive; all currents out ot device pins are negative. ll voltages are referenced to device ground unless otherwise specified. Note 3: ll typicals are given for = 5V and T = 25 C. Note 4: The is not tested and is not quality-assurance sampled at 4 C and at 85 C. These specifications are guaranteed by design, correlation, and/or inference from C, 25 C and/or 7 C tests. TYPICL PEFOMNCE CHCTEISTICS W SPPLY CENT (µ) 45 4 35 3 25 2 15 1 5 5 Supply Current vs Temperature THEML SHTDOWN WITH VE ENLED ND NOMINL LOD VE ENLED WITH NO LOD VE SLED WITH NO LOD 25 25 5 75 1 125 15 175 TEMPETE ( C) OTPT CENT (m) 8 7 6 5 4 3 2 1 Driver Differential Output Voltage vs Output Current T = 25 C.5 1. 1.5 2. 2.5 3. 3.5 4. 4.5 OTPT VOLTGE (V) FFEENTIL VOLTGE (V) 2.24 2.22 2.2 2.18 2.16 2.14 2.12 2.1 2.8 2.6 2.4 2.2 2. 5 Driver Differential Output Voltage vs Temperature L = 54Ω 25 25 5 75 1 125 TEMPETE ( C) TPC1 TPC2 TPC3 OTPT CENT (m) 12 1 8 6 4 2 Driver Output Low Voltage vs Output Current T = 25 C 1 2 3 4 OTPT VOLTGE (V) OTPT CENT (m) 1 2 3 4 5 6 7 8 9 1 Driver Output High Voltage vs Output Current T = 25 C 1 2 3 4 5 OTPT VOLTGE (V) TIME (ns) Driver Skew vs Temperature 5 45 4 35 3 25 2 15 5 25 25 5 75 1 125 TEMPETE ( C) 4 TPC4 TPC5 G6
PIN FNCTIONS (Pin 1): eceiver Output. If the receiver output is enabled (E LOW), and > by 2mV, will be HIGH. If < by 2mV, then will be LOW. E (Pin 2): eceiver Output Enable. LOW enables the receiver output,. HIGH input forces the receiver output into a high impedance state. (Pin 3): Driver Outputs Enable. HIGH on enables the driver output. and and the chip will function as a line driver. LOW input will force the driver outputs into a high impedance state and the chip will function as a line receiver. If E is HIGH and is LOW, the part will enter a low power (1µ) shutdown state. (Pin 4): Driver Input. If the driver outputs are enabled ( HIGH) then a LOW on forces the outputs LOW and HIGH. HIGH on with the driver outputs enabled will force HIGH and LOW. GND (Pin 5): Ground. (Pin 6): Driver Output/eceiver Input. (Pin 7): Driver Output/eceiver Input. (Pin 8): Positive Supply. 4.75V < < 5.25V. F CTIO TLES Transmitting INPTS OTPTS E X 1 1 1 X 1 1 X Z Z 1 X Z* Z* *Shutdown mode eceiving INPTS OTPTS E.2V 1.2V Inputs Open 1 1 X Z* *Shutdown mode TEST CICITS V OD F1 V OC ECEIVE OTPT TEST POINT C L 1k S1 S2 1k F2 Figure 1. Driver DC Test Load Figure 2. eceiver Timing Test Load 3V FF C L1 C L2 E 15pF OTPT N TEST 5Ω C L S1 S2 F3 F4 Figure 3. Driver/eceiver Timing Test Circuit Figure 4. Driver Timing Test Load 5
SWITCHI G TI E WVEFO S W W 3V V f = 1MHz, t r 1ns, t f 1ns t PLH t PHL 1/2 V O V O V V O V O 1/2 VO 1% t r t SKEW 9% V FF = V() V() t f t SKEW 9% 1% F5 Figure 5. Driver Propagation Delays 3V V f = 1MHz, t r 1ns, t f 1ns 5V, V OL t ZL(SHDN), t ZL 2.3V OTPT NOMLLY LOW t LZ.5V V OH, V 2.3V t ZH(SHDN), t ZH OTPT NOMLLY HIGH t HZ.5V F6 Figure 6. Driver Enable and Disable Times V OH OTPT V OL t PHL f = 1MHz, t r 1ns, t f 1ns t PLH V OD2 V INPT V V OD2 F7 Figure 7. eceiver Propagation Delays E 3V V f = 1MHz, t r 1ns, t f 1ns 5V t ZL(SHDN), t ZL OTPT NOMLLY LOW t LZ.5V V t ZH(SHDN), t ZH OTPT NOMLLY HIGH t HZ.5V F8 Figure 8. eceiver Enable and Disable Times 6
W PPLICTIO S I FO TIO High Input Impedance The is designed with a 96kΩ (typ) input impedance to allow up to 256 transceivers to share a single S485 differential data bus. The S485 specification requires that a transceiver be able to drive as many as 32 unit loads. One unit load (L) is defined as an impedance that draws a maximum of 1m with up to 12V across it. Typical S485 transceivers present between.5 and 1 unit load at their inputs. The 96kΩ input impedance of the will draw only 125µ under the same 12V condition, presenting only.125l to the bus. s a result, 256 transceivers (32L/.125L = 256) can be connected to a single S485 data bus without exceeding the S485 driver load specification. The meets all other S485 specifications, allowing it to operate equally well with standard S485 transceiver devices or high impedance transceivers. CMOS Output Driver The S485 specification requires that a transceiver withstand common-mode voltages of up to 12V or 7V at the S485 line connections. dditionally, the transceiver must be immune to both ESD and latch-up. This rules out traditional CMOS drivers, which include parasitic diodes from their driver outputs to each supply rail (Figure 9). The uses a proprietary process enhancement which adds a pair of Schottky diodes to the output stage (Figure 1), preventing current from flowing when the commonmode voltage exceeds the supply rails. Latch-up at the output drivers is virtually eliminated and the driver is prevented from loading the line under S485 specified fault conditions. proprietary output protection structure protects the transceiver line terminals against ESD strikes (Human ody Model) of up to ±1kV. LOGIC P1 N1 Figure 9. Conventional CMOS Output Stage D1 OTPT D2 F9 LOGIC P1 N1 SD3 SD4 D1 OTPT D2 F1 Figure 1. Output Stage When two or more drivers are connected to the same transmission line, a potential condition exists whereby more than two drivers are simultaneously active. If one or more drivers is sourcing current while another driver is sinking current, excessive power dissipation may occur within either the sourcing or sinking element. This condition is defined as driver contention, since multiple drivers are competing for one transmission line. The provides a current limiting scheme to prevent driver contention failure. When driver contention occurs, the current drawn is limited to about 7m, preventing excessive power dissipation within the drivers. The has a thermal shutdown feature which protects the part from excessive power dissipation. nder extreme fault conditions, up to 25m can flow through the part, causing rapid internal temperature rise. The thermal shutdown circuit will disable the driver outputs when the internal temperature reaches 15 C and turns them back on when the temperature cools to 13 C. This cycle will repeat as necessary until the fault condition is removed. eceiver Inputs The receiver features an input common-mode range covering the entire S485 specified range of 7V to 12V. Internal 96k input resistors from each line terminal to ground provide the.125l load to the S485 bus. Differential signals of greater than ±2mV within the specified input common-mode range will be converted to a TTL-compatible signal at the receiver output. small amount of input hysteresis is included to minimize the Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of circuits as described herein will not infringe on existing patent rights. 7
W PPLICTIO S I FO TIO effects of noise on the line signals. If the line is terminated or the receiver inputs are shorted together, the receiver output will retain the last valid line signal due to the 45mV of hysteresis incorporated in the receiver circuit. If the transceiver inputs are left floating (unterminated), an internal pull-up of 1µ at the input will force the receiver output to a known high state. Low Power Operation The draws very little supply current whenever the driver outputs are disabled. In shutdown mode, the quiescent current is typically less than 1µ. With the receiver active and the driver outputs disabled, the will typically draw 8µ quiescent current. With the driver outputs enabled but unterminated, quiescent current will rise slightly as one of the two outputs sources current into the internal receiver input resistance. With the minimum receiver input resistance of 7k and the maximum output swing of 5V, the quiescent current will rise by a maximum of 72µ. Typical quiescent current rise with the driver enabled is about 4µ. The quiescent current rises significantly if the driver is enabled when it is externally terminated. With 1/2 termination load (12Ω between the driver outputs), the quiescent current will jump to at least 13m as the drivers force a minimum of across the termination resistance. With a fully terminated 6Ω line attached, the current will rise to greater than 25m with the driver enabled, completely overshadowing the extra 4µ drawn by the internal receiver inputs. Shutdown Mode oth the receiver output () and the driver outputs (, ) can be placed in three-state mode by bringing E HIGH and LOW respectively. In addition, the will enter shutdown mode when E is HIGH and is LOW. In shutdown the typically draws only 1µ of supply current. In order to guarantee that the part goes into shutdown, E must be HIGH and must be LOW for at least 6ns simultaneously. If this time duration is less than 5ns the part will not enter shutdown mode. Toggling either E or will wake the back up within 3.5µs. If the driver is active immediately prior to shutdown, the supply current will not drop to 1µ until the driver outputs have reached a steady state; this can take as long as 2.6µs under worst case conditions. If the driver is disabled prior to shutdown the supply current will drop to 1µ immediately. Slew ate and Propagation Delay Many digital encoding schemes are dependent upon the difference in the propagation delay times of the driver and receiver. Figure 11 shows the test circuit for the propagation delay. TTL IN t r, t f < 6ns D 1pF 1Ω 1pF Figure 11. eceiver Propagation Delay Test Circuit F11 ECEIVE OT The receiver delay times are: t PLH t PHL = 13ns Typ, = 5V The drivers feature controlled slew rate to reduce system EMI and improve signal fidelity by reducing reflections due to misterminated cables. The driver s skew times are: Skew = 25ns Typ, = 5V 6ns Max, = 5V, T = 4 C to 85 C PCKGE SCIPTION For package descriptions consult the 1994 Linear Databook Volume III. 8 Linear Technology Corporation 163 McCarthy lvd., Milpitas, C 9535-7487 (48) 432-19 FX: (48) 434-57 TELEX: 499-3977 LT/GP 395 1K PINTED IN THE S LINE TECHNOLOGY COPOTION 1995