DVNCD INR DVICS, INC. D113 DU N-CHNN ND DU P-CHNN MTCHD MOSFT PIR GNR DSCRIPTION Th D113 is a monolithic dual N-channl and dual P-channl matchd transistor pair intndd for a road rang of analog applications. Ths nhancmnt-mod transistors ar manufacturd with dvancd inar Dvics' nhancd CMOS silicon gat CMOS procss. It consists of an D111 N-channl MOSFT pair and an D112 P-channl MOSFT pair in on packag. Th D113 offrs high input impdanc and ngativ currnt tmpratur cofficint. Th transistor pair is matchd for minimum offst voltag and diffrntial thrmal rspons, and it is dsignd for prcision signal switching and amplifying applications in +2V to +12V systms whr low input ias currnt, low input capacitanc and fast switching spd ar dsird. Sinc ths ar MOSFT dvics, thy fatur vry larg (almost infinit) currnt gain in a low frquncy, or nar DC, oprating nvironmnt. Whn usd in pairs, a dual CMOS analog switch can constructd. In addition, th D113 is intndd as a uilding lock for diffrntial amplifir input stags, transmission gats, and multiplxr applications. Th D113 is suital for us in prcision applications which rquir vry high currnt gain, ta, such as currnt mirrors and currnt sourcs. Th high input impdanc and th high DC currnt gain of th Fild ffct Transistors rsult in xtrmly low currnt loss through th control gat. Th DC currnt gain is limitd y th gat input lakag currnt, which is spcifid at 5p at room tmpratur. For xampl, DC ta of th dvic at a drain currnt of 5m at 25 C is = 5m/5p = 1,,. FTURS Thrmal tracking twn N-channl and P-channl pairs ow thrshold voltag of.7v for oth N-channl & P-channl MOSFTS ow input capacitanc ow Vos 1mV High input impdanc 1 13 Ω typical ow input and output lakag currnts Ngativ currnt (I DS ) tmpratur cofficint nhancmnt mod (normally off) DC currnt gain 1 9 Matchd N-channl and matchd P-channl in on packag RoHS compliant PPICTIONS Prcision currnt mirrors Complmntary push-pull linar drivs nalog switchs Chopprs Diffrntial amplifir input stag Voltag comparator Data convrtrs Sampl and Hold nalog invrtr Prcision matchd currnt sourcs PIN CONFIGURTION DN1 GN1 SN1 V- DP1 GP1 SP1 BOCK DIGRM 1 2 3 4 5 6 N DRIN 1 (1) N DRIN 2 (14) 14 13 12 11 1 7 8 TOP VIW SB, PB, DB PCKGS N GT 1 (2) 9 DN2 GN2 SN2 V+ DP2 GP2 SP2 N SOURC 1 (3) SUBSTRT (4) N SOURC 2 (12) N GT 2 (13) ORDRING INFORMTION ( suffix dnots lad-fr (RoHS)) Oprating Tmpratur Rang* C to +7 C C to +7 C -55 C to +125 C 14-Pin 14-Pin 14-Pin Small Outlin Plastic Dip CRDIP Packag (SOIC) Packag Packag D113SB D113PB D113DB * Contact factory for ladd (non-rohs) or high tmpratur vrsions. P DRIN 1 (5) P DRIN 2 (1) P GT 1 (6) P SOURC 1 (7) SUBSTRT (11) P SOURC 2 (8) P GT 2 (9) 216 dvancd inar Dvics, Inc., Vrs. 2.1 www.aldinc.com 1 of 9
BSOUT MXIMUM RTINGS Drain-sourc voltag, V DS 1.6V Gat-sourc voltag, V GS 1.6V Powr dissipation 5mW Oprating tmpratur rang SB, PB packags C to +7 C DB packag -55 C to +125 C Storag tmpratur rang -65 C to +15 C ad tmpratur, 1 sconds +26 C CUTION: SD Snsitiv Dvic. Us static control procdurs in SD controlld nvironmnt. OPRTING CTRIC CHRCTRISTICS unlss othrwis spcifid N - Channl Tst P - Channl Tst Paramtr Symol Min Typ Max Unit Conditions Min Typ Max Unit Conditions Gat Thrshold V T.4.7 1. V I DS = 1µ V GS = V DS -.4 -.7-1.2 V I DS = -1µ V GS = V DS Voltag Offst Voltag V OS 1 mv I DS = 1µ V GS = V DS 1 mv I DS = -1µ V GS = V DS V GS1 - V GS2 Gat Thrshold Tmpratur TC VT -1.2 mv/ C -1.3 mv/ C Drift On Drain I DS (ON) 25 4 m V GS = V DS = 5V -8-16 m V GS = V DS = -5V Currnt Trans-. G fs 5 1 mmho V DS = 5V I DS = 1m 2 4 mmho V DS = -5V I DS = -1m conductanc Mismatch G fs.5 %.5 % Output G OS 2 µmho V DS = 5V I DS = 1m 5 µmho V DS = -5V I DS = -1m Conductanc Drain Sourc R DS(ON) 5 75 Ω V DS =.1V V GS = 5V 18 27 Ω V DS = -.1V V GS = -5V ON Rsistanc Drain Sourc ON Rsistanc R DS(ON).5 % V DS =.1V V GS = 5V.5 % V DS = -.1V V GS = -5V Mismatch Drain Sourc Brakdown BV DSS 12 V I DS = 1µ V GS =V -12 V I DS = -1µ V GS =V Voltag Off Drain I DS(OFF).1 4 n V DS =12V I GS = V.1 4 n V DS = -12V V GS = V Currnt 4 µ T = 125 C 4 µ T = 125 C Gat akag I GSS 1 5 p V DS = V V GS =12V 1 5 p V DS = V V GS =-12V Currnt 1 n T = 125 C 1 n T = 125 C Input C ISS 6 1 pf 6 1 pf Capacitanc D113, Vrs. 2.1 dvancd inar Dvics 2of 9
TYPIC P-CHNN PRFORMNC CHRCTRISTICS DRIN - SOURC CURRNT (m) -8-6 -4-2 OUTPUT CHRCTRISTICS V GS = -12V -1V -8V -6V -4V -2V -2-4 -6-8 -1-12 DRIN-SOURC CURRNT (m) 4 2-2 OW VOTG OUTPUT CHRCTRISTICS V GS = -12V -6V -4V -2V -4-32 -16 16 32 DRIN - SOURC VOTG (V) DRIN -SOURC VOTG (mv) FORWRD TRNSCONDUCTNC (µmho) 1 5 2 1 5 2 1 FORWRD TRNSCONDUCTNC vs. DRIN - SOURC VOTG f = 1KHz T = +25 C I DS = -1m I DS = -5m T = +125 C DRIN-SOURC CURRNT (µ) -2-15 -1-5 TRNSFR CHRCTRISTIC WITH SUBSTRT BIS 2V 4V 6V 8V 1V 12V V GS = V DS -2-4 -6-8 -1-12 -.8-1.6-2.4-3.2-4. DRIN - SOURC VOTG (V) GT - SOURC VOTG (V) DRIN - SOURC ON RSISTNC (Ω) 1 1 1 R DS (ON) vs. GT - SOURC VOTG V DS =.4V T = +25 C T = +125 C 1-2 -4-6 -8-1 -12 GT - SOURC VOTG (V) OFF - DRIN SOURC CURRNT () -1X1-6 -1X1-9 -1X1-12 OFF DRIN - CURRNT vs. TMPRTUR V DS = -12V V GS = -5-25 +25 +5 +75 +1 +125 TMPRTUR ( C) D113, Vrs. 2.1 dvancd inar Dvics 3of 9
TYPIC N-CHNN PRFORMNC CHRCTRISTICS OUTPUT CHRCTRISTICS OW VOTG OUTPUT CHRCTRISTICS DRIN -SOURC CURRNT (m) 16 12 8 4 V GS = 12V 1V 8V 6V 4V 2V DRIN-SOURC CURRNT (m) 8 4-4 V GS = 12V 6V 4V 2V 2 4 6 8 1 12 DRIN-SOURC VOTG (V) -8-16 -8 8 16 DRIN -SOURC VOTG (mv) FORWRD TRNSCONDUCTNC (µmho) 1 x1 5 5 x1 4 2 x1 4 1 x1 4 5 x1 3 2 x1 3 1 x1 3 FORWRD TRNSCONDUCTNC vs. DRIN-SOURC VOTG f = 1KHz T = +125 C T = +25 C I DS = 1m I DS = 1m 2 4 6 8 1 12 DRIN-SOURC CURRNT (µ) 2 15 1 5 TRNSFR CHRCTRISTIC WITH SUBSTRT BIS -2V -4V -6V -8V -1V -12V V GS = V DS.8 1.6 2.4 3.2 4. DRIN -SOURC VOTG (V) GT - SOURC VOTG (V) DRIN - SOURC ON RSISTNC (Ω) 1 1 1 R DS (ON) vs. GT - SOURC VOTG V DS =.2V T = +25 C 1 2 4 6 8 1 12 GT SOURC VOTG (V) T = +125 C OFF - DRIN SOURC CURRNT () 1X1-6 1X1-9 1X1-12 OFF DRIN - CURRNT vs. TMPRTUR V DS = +12V V GS = -5-25 +25 +5 +75 +1 +125 TMPRTUR ( C) D113, Vrs. 2.1 dvancd inar Dvics 4of 9
TYPIC PPICTIONS CURRNT SOURC MIRROR CURRNT SOURC WITH GT CONTRO 1/2 D113 RST Digital ogic Control of Currnt Sourc RST Q 2 = = V+ -Vt ON 1/4 D113 D113, Q 2 : N - Channl MOSFT, : P - Channl MOSFT = ~ 4 OFF : N - Channl MOSFT, : P - Channl MOSFT DIFFRNTI MPIFIR CURRNT SOURC MUTIPICTION V+ PMOS PIR V OUT = x N V IN + Q 2 NMOS PIR V IN - QST Q 2 QN D113 Currnt Sourc, Q 2 : N - Channl MOSFT, : P - Channl MOSFT Q ST,..Q N : D 111 or D 113 N - Channl MOSFT D113, Vrs. 2.1 dvancd inar Dvics 5of 9
TYPIC PPICTIONS (cont.) BSIC CURRNT SOURCS N-CHNN CURRNT SOURC P-CHNN CURRNT SOURC 1/2 D113 14 Q 2 8 13 12 2 1 3, 4 11 6 9 1 5 7 1/2 D113 = = V + - Vt = ~ V + - 1. = ~ 4, Q 2 : N - Channl MOSFT, : P - Channl MOSFT CSCOD CURRNT SOURCS Q 2 Q 2 = = V + - 2Vt = ~ 3, Q 2,, : N - Channl MOSFT (D111 or D113) Q1, Q2, Q3, Q4: P - Channl MOSFT (D112 or D113) D113, Vrs. 2.1 dvancd inar Dvics 6of 9
SOIC-14 PCKG DRWING 14 Pin Plastic SOIC Packag Millimtrs Inchs Dim Min Max Min Max 1.35 1.75.53.69 1.1.25.4.1 S (45 ) C.35.18.45.25.14.7.18.1 D-14 8.55 8.75.336.345 3.5 4.5.14.16 1.27 BSC.5 BSC D H 5.7 6.3.224.248.6.937.24.37 8 8 S.25.5.1.2 1 S (45 ) H C D113, Vrs. 2.1 dvancd inar Dvics 7of 9
PDIP-14 PCKG DRWING 14 Pin Plastic DIP Packag Millimtrs Inchs 1 Dim 1 Min Max Min Max 3.81 5.8.15.2.38 1.27.15.5 2 1.27 2.3.5.8.89 1.65.35.65 1.38.51.15.2 c.2.3.8.12 D-14 17.27 19.3.68.76 5.59 7.11.22.28 S D 1 1 7.62 2.29 7.37 8.26 2.79 7.87.3.9.29.325.11.31 2 S-14 2.79 1.2 3.81 2.3.11.4.15.8 1 15 15 1 c 1 D113, Vrs. 2.1 dvancd inar Dvics 8of 9
CRDIP-14 PCKG DRWING 14 Pin CRDIP Packag Millimtrs Inchs 1 Dim 1 Min Max Min Max 3.55 5.8.14.2 1.27 2.16.5.85.97 1.65.38.65 1.36.58.14.23 C.2.38.8.15 D-14 19.94.785 D 5.59 7.87.22.31 1 7.73 8.26.29.325 s 1 1 2.54 BSC 7.62 BSC.1 BSC.3 BSC 3.81 5.8.15.2 2 1 1 1 2 S 3.18.38 1.78 2.49.125.15.7.98 Ø 15 15 C 1 D113, Vrs. 2.1 dvancd inar Dvics 9of 9