Quad Low Offset, Low Power Operational Amplifier OP400

Transcription

1 Data Sheet FEATURES Low input offset voltage: 5 µv maximum Low offset voltage drift over 55 C to 25 C:.2 μv/ C maximum Low supply current (per amplifier): 725 µa maximum High open-loop gain: 5 V/mV minimum Input bias current: 3 na maximum Low noise voltage density: nv/ Hz at khz Stable with large capacitive loads: nf typical Available in die form GENERAL DESCRIPTION The is the first monolithic quad operational amplifier that features OP77-type performance. Precision performance is not sacrificed with the to obtain the space and cost savings offered by quad amplifiers. The features an extremely low input offset voltage of less than 5 µv with a drift of less than.2 µv/ C, guaranteed over the full military temperature range. Open-loop gain of the is more than 5 million into a kω load, input bias current is less than 3 na, CMR is more than 2 db, and PSRR is less than.8 µv/v. On-chip Zener zap trimming is used to achieve the low input offset voltage of the and eliminates the need for offset nulling. The conforms to the industrystandard quad pinout, which does not have null terminals. Quad Low Offset, Low Power Operational Amplifier OUT A IN A 2 IN A 3 V 4 IN B 5 IN B 6 OUT B 7 FUNCTIONAL BLOCK DIAGRAMS 4 OUT D 3 IN D 2 IN D V IN C 9 IN C 8 OUT C Figure. 4-Pin Ceramic DIP (Y-Suffix) and 4-Pin Plastic DIP (P-Suffix) 34- OUTA 6 OUT D IN A 2 5 IN D IN A 3 4 IN D V 4 3 V IN B 5 2 IN C IN B 6 IN C OUT B 7 OUT C NC 8 9 NC NC = NO CONNECT Figure 2. 6-Pin SOIC (S-Suffix) The features low power consumption, drawing less than 725 µa per amplifier. The total current drawn by this quad amplifier is less than that of a single OP7, yet the offers significant improvements over this industry-standard op amp. Voltage noise density of the is a low nv/ Hz at Hz, half that of most competitive devices. The is an ideal choice for applications requiring multiple precision operational amplifiers and where low power consumption is critical. V 34-2 BIAS VOLTAGE LIMITING NETWORK OUT IN IN V Figure 3. Simplified Schematic (One of Four Amplifiers Is Shown) 34-3 Rev. H Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 96, Norwood, MA , U.S.A. Tel: Analog Devices, Inc. All rights reserved. Technical Support

2 TABLE OF CONTENTS Features... Functional Block Diagrams... General Description... Revision History... 2 Specifications... 3 Electrical Characteristics... 3 Absolute Maximum Ratings... 5 Thermal Resistance... 5 ESD Caution... 5 Data Sheet Typical Performance Characteristics...6 Applications... Dual Low Power Instrumentation Amplifier... Bipolar Current Transmitter... 2 Differential Output Instrumentation Amplifier... 2 Multiple Output Tracking Voltage Reference... 3 Outline Dimensions... 4 Ordering Guide... 5 SMD Parts and Equivalents... 5 REVISION HISTORY /3 Rev. G to Rev. H Changes to Features Section and General Description Section... Changes to Ordering Guide / Rev. F to Rev. G Added S Package to Storage Temperature Range in Table Updated Outline Dimensions /8 Rev. E to Rev. F Added New Figure 28, Renumbered Sequentially... Updated Outline Dimensions... 5 /7 Rev. D to Rev. E Updated Format... Universal Changes to Figure and Figure 2... Removed Figure Changes to Table Changes to Figure 6 through Figure 9, Figure Changes to Figure Changes to Figure Changes to Figure Updated Outline Dimensions /3 Rev. B to Rev. C Edits to Specifications... 2 /2 Rev. A to Rev. B Addition of Absolute Maximum Ratings... 5 Edits to Outline Dimensions /2 Rev. to Rev. A Edits to Features... Edits to Ordering Information... Edits to Pin Connections... Edits to General Descriptions..., 2 Edits to Package Type /6 Rev. C to Rev. D Updated Format... Universal Deleted Wafer Test Limits Table... 4 New Package Drawing: R Updated Outline Dimensions... 5 Changes to Ordering Guide... 6 Rev. H Page 2 of 6

3 Data Sheet SPECIFICATIONS ELECTRICAL VS = ±5 V, TA = 25 C, unless otherwise noted. Table. A/E F G/H Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage VOS µv Long-Term Input... µv/mo Voltage Stability Input Offset Current IOS VCM = V na Input Bias Current IB VCM = V na Input Noise Voltage en p-p. Hz to Hz µv p-p Input Resistance RIN MΩ Differential Mode Input Resistance RINCM GΩ Common Mode Large Signal Voltage AVO VO = ± V Gain RL = kω 5 2, V/mV RL = 2 kω V/mV Input Voltage Range IVR ±2 ±3 ±2 ±3 ±2 ±3 V Common-Mode CMR VCM = 2 V db Rejection Input Capacitance CIN pf OUTPUT CHARACTERISTICS Output Voltage Swing VO RL = kω ±2 ±2.6 ±2 ±2.6 ±2 ±2.6 V POWER SUPPLY Power Supply Rejection PSRR VS = 3 V to 8 V µv/v Ratio Supply Current per ISY No load µa Amplifier DYNAMIC PERFORMANCE Slew Rate SR V/µs Gain Bandwidth GBWP AV = khz Product Channel Separation CS VO = 2 V p-p, db fo = Hz 2 Capacitive Load AV =, nf Stability no oscillations NOISE PERFORMANCE Input Noise Voltage en fo = Hz nv/ Hz Density 3 fo = Hz nv/ Hz Input Noise Current in p-p. Hz to Hz pa p-p Input Noise Current Density in fo = Hz pa/ Hz Guaranteed by CMR test. 2 Guaranteed but not % tested. 3 Sample tested. Rev. H Page 3 of 6

4 Data VS = ±5 V, 55 C TA 25 C for A, unless otherwise noted. Table 2. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage VOS 7 27 µv Average Input Offset Voltage Drift TCVOS.3.2 µv/ C Input Offset Current IOS VCM = V. 2.5 na Input Bias Current IB VCM = V.3 5. na Large Signal Voltage Gain AVO VO = ± V, RL = kω 3 9 V/mV RL = 2 kω 23 Input Voltage Range IVR ±2 ±2.5 V Common-Mode Rejection CMR VCM = ±2 V 5 3 db OUTPUT CHARACTERISTICS Output Voltage Swing VO RL = kω ±2 ±2.4 POWER SUPPLY Power Supply Rejection Ratio PSRR VO = 3 V to 8 V µv/v Supply Current per Amplifier ISY No load µa DYNAMIC PERFORMANCE Capacitive Load Stability AV =, no oscillations 8 nf Guaranteed by CMR VS = ±5 V, 25 C TA 85 C for E/F, C TA 7 C for G, 4 C TA 85 C for H, unless otherwise noted. Table 3. E F G/H Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage VOS µv Average Input Offset TCVOS µv/ C Voltage Drift Input Offset Current IOS VCM = V E, F, G grades na H grade.2 2. na Input Bias Current IB VCM = V E, F, G grades na H grade. 2. na Large-Signal Voltage Gain AVO VCM = V RL = kω 3, V/mV RL = 2 kω V/mV Input Voltage Range IVR ±2 ±2.5 ±2 ±2.5 ±2 ±2.5 V Common-Mode Rejection CMR VCM = ±2 V db OUTPUT CHARACTERISTICS Output Voltage Swing VO RL = kω ±2 ±2.4 ±2 ±2.4 ±2 ±2.6 V RL = 2 kω ± ±2 ± ±2 ± ±2.2 V POWER SUPPLY Power Supply Rejection Ratio Supply Current per Amplifier PSRR VS = ±3 V to µv/v ±8 V ISY No load µa DYNAMIC PERFORMANCE Capacitive Load Stability No oscillations nf Guaranteed by CMR test. Rev. H Page 4 of 6

5 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 4. Parameter Rating Supply Voltage ±2 V Differential Input Voltage ±3 V Input Voltage Supply voltage Output Short-Circuit Duration Continuous Storage Temperature Range P, Y, S Packages 65 C to 5 C Lead Temperature (Soldering 6 sec) 3 C Junction Temperature (TJ) Range 65 C to 5 C Operating Temperature Range A 55 C to 25 C E, F 25 C to 85 C G C to 7 C H 4 C to 85 C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply to both dice and packaged parts, unless otherwise noted. THERMAL RESISTANCE θja is specified for worst-case mounting conditions, that is, θja is specified for device in socket for CERDIP and PDIP packages; θja is specified for device soldered to printed circuit board for SOIC package. Table 5. Thermal Resistance Package Type θja θjc Unit 4-Pin Ceramic DIP (Y) 94 C/W 4-Pin Plastic DIP (P) C/W 6-Pin SOIC (S) C/W ESD CAUTION Rev. H Page 5 of 6

6 TYPICAL PERFORMANCE CHARACTERISTICS 3 2 Data Sheet CHANGE IN OFFSET VOLTAGE (μv) TIME (Minutes) Figure 4. Warmup Drift 34-4 INPUT OFFSET CURRENT (pa) TEMPERATURE ( C) Figure 7. Input Offset Current vs. Temperature INPUT OFFSET VOLTAGE (μv) INPUT BIAS CURRENT (na) TEMPERATURE ( C) Figure 5. Input Offset Voltage vs. Temperature COMMON-MODE VOLTAGE (V) Figure 8. Input Bias Current vs. Common-Mode Voltage 34-8 INPUT BIAS CURRENT (na) TEMPERATURE ( C) Figure 6. Input Bias Current vs. Temperature 34-6 COMMON-MODE REJECTION (db) k k k Figure 9. Common-Mode Rejection vs. Frequency 34-9 Rev. H Page 6 of 6

7 Data Sheet 2.5 FOUR AMPLIFIERS NOISE VOLTAGE DENSITY (nv/ Hz) TOTAL SUPPLY CURRENT (ma) k Figure. Noise Voltage Density vs. Frequency ±2 ±4 ±6 ±8 ± ±2 ±4 ±6 ±8 ±2 SUPPLY VOLTAGE (V) Figure 3. Total Supply Current vs. Supply Voltage 34-3 k 2.5 FOUR AMPLIFIERS CURRENT NOISE DENSITY (fa/ Hz) k Figure. Current Noise Density vs. Frequency 34- TOTAL SUPPLY CURRENT (ma) TEMPERATURE ( C) Figure 4. Total Supply Current vs. Temperature TIME (Seconds) 34-2 POWER SUPPLY REJECTION (db) POSITIVE SUPPLY. k k k NEGATIVE SUPPLY 34-5 Figure 2.. Hz to Hz Noise Figure 5. Power Supply Rejection vs. Frequency Rev. H Page 7 of 6

8 Data Sheet POWER SUPPLY REJECTION (db) GAIN (db) A V = A V = A V = A V = TEMPERATURE ( C) Figure 6. Power Supply Rejection vs. Temperature 34-6 k k k Figure 9. Closed-Loop Gain vs. Frequency 34-9 M OPEN-LOOP GAIN (V/mV) 5k R L = 2kΩ 4k 3k 2k k TEMPERATURE ( C) Figure 7. Open-Loop Gain vs. Temperature 34-7 OUTPUT SWING (V p-p AT % Distortion) k k k Figure 2. Maximum Output Swing Frequency 34-2 OPEN-LOOP GAIN (db) GAIN PHASE PHASE SHIFT (Degrees) DISTORTION (%).. V OUT = V p-p R L = 2kΩ A V = A V = A V = 8 k k k M Figure 8. Open-Loop Gain and Phase Shift vs. Frequency k k Figure 2. Total Harmonic Distortion vs. Frequency 34-2 Rev. H Page 8 of 6

9 Data Sheet A V = FALLING A V = OVERSHOOT (%) RISING CAPACITIVE LOAD (nf) Figure 22. Overshoot vs. Capacitive Load V μs Figure 25. Large Signal Transient Response SHORT-CIRCUIT CURRENT (ma) SOURCING SINKING A V = mV 5μs TIME (Minutes) Figure 23. Short Circuit vs. Time Figure 26. Small Signal Transient Response 4 CHANNEL SEPARATION (db) 3 2 V IN = 2V p-p A V = 9 k k k mV 5μs Figure 24. Channel Separation vs. Frequency Figure 27. Small Signal Transient Response, CLOAD = nf Rev. H Page 9 of 6

10 Data Sheet k SATURATION VOLTAGE (mv) k V DD V OH V OL V SS V SY = ±5V... OUTPUT CURRENT (ma) Figure 28. Saturation Voltage vs. Output Current Ω kω e OUT Figure 29. Noise Test Schematic e OUT TO SPECTRUM ANALYZER nv nv ( ) 2 e Hz ~= n ( ) Hz V V 4 3 V GND 8V Figure 3. Burn-In Circuit Rev. H Page of 6

11 Data Sheet APPLICATIONS The is inherently stable at all gains and is capable of driving large capacitive loads without oscillating. Nonetheless, good supply decoupling is highly recommended. Proper supply decoupling reduces problems caused by supply line noise and improves the capacitive load-driving capability of the. Total supply current can be reduced by connecting the inputs of an unused amplifier to V. This turns the amplifier off, lowering the total supply current. DUAL LOW POWER INSTRUMENTATION AMPLIFIER A dual instrumentation amplifier that consumes less than 33 mw of power per channel is shown in Figure 3. The linearity of the instrumentation amplifier exceeds 6 bits in gains of 5 to 2 and is better than 4 bits in gains from 2 to. CMRR is above 5 db (G = ). Offset voltage drift is typically.4 μv/ C over the military temperature range, which is comparable to the best monolithic instrumentation amplifiers. The bandwidth of the low power instrumentation amplifier is a function of gain and is shown in Table 6. The output signal is specified with respect to the reference input, which is normally connected to analog ground. The reference input can be used to offset the output from V to V if required. Table 6. Gain Bandwidth Gain Bandwidth 5 5 khz 67 khz 7.5 khz 5 Hz V IN REFERENCE V IN 2kΩ REFERENCE 2kΩ A 5kΩ A 5kΩ R G R G 5kΩ 5kΩ A 2kΩ A 2kΩ Figure 3. Dual Low Power Instrumentation Amplifier V OUT V OUT 4, = 5 V IN R G V OUT 34-3 Rev. H Page of 6

12 BIPOLAR CURRENT TRANSMITTER In the circuit of Figure 32, which is an extension of the standard three op amp instrumentation amplifier, the output current is proportional to the differential input voltage. Maximum output current is ±5 ma, with voltage compliance equal to ± V when using ±5 V supplies. Output impedance of the current transmitter exceeds 3 MΩ, and linearity is better than 6 bits with gain set for a full-scale input of ± µv. Data Sheet DIFFERENTIAL OUTPUT INSTRUMENTATION AMPLIFIER The output voltage swing of a single-ended instrumentation amplifier is limited by the supplies, normally at ±5 V, to a maximum of 24 V p-p. The differential output instrumentation amplifier shown in Figure 33 can provide an output voltage swing of 48 V p-p when operated with ±5 V supplies. The extended output swing is due to the opposite polarity of the outputs. Both outputs swing 24 V p-p, but with opposite polarity, for a total output voltage swing of 48 V p-p. The reference input can be used to set a common-mode output voltage over the range ± V. The PSRR of the amplifier is less than µv/v with CMRR (G = ) better than 5 db. Offset voltage drift is typically.4 µv/ C over the military temperature range. E E 2Ω V OUT I OUT 5mA V IN R G E E V I IN 5, OUT 2Ω R G Figure 32. Bipolar Current Transmitter 34-3 A V IN R G A 22pF A 22pF 22pF V IN = 5kΩ R G 22pF V OUT R G V OUT REFERENCE INPUT A Figure 33. Differential Output Instrumentation Amplifier Rev. H Page 2 of 6

13 Data Sheet MULTIPLE OUTPUT TRACKING VOLTAGE REFERENCE Figure 34 shows a circuit that provides outputs of V, 7.5 V, 5 V, and 2.5 V for use as a system voltage reference. Maximum output current from each reference is 5 ma with load regulation under 25 µv/ma. Line regulation is better than 5 µv/v, and output voltage drift is under 2 µv/ C. Output voltage noise from. Hz to Hz is typically 75 µv p-p from the V output and proportionately less from the 7.5 V, 5 V, and 2.5 V outputs. 5V V 2 22kΩ N42 μf kω kω A 7.5V REF V REFERENCE 4 6 kω kω 2μF A kω kω A 5V μf A kω 2.5V Figure 34. Multiple Output Tracking Voltage Reference Rev. H Page 3 of 6

14 Data Sheet OUTLINE DIMENSIONS.5 (.3) MIN.98 (2.49) MAX (7.87).22 (5.59) PIN.2 (5.8) MAX.2 (5.8).25 (3.8). (2.54) BSC.785 (9.94) MAX.23 (.58).4 (.36).7 (.78).3 (.76).6 (.52).5 (.38).5 (3.8) MIN SEATING PLANE.32 (8.3).29 (7.37) 5.5 (.38).8 (.2) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure Lead Ceramic Dual In-Line Package [CERDIP] (Q-4) [Y-Suffix] Dimensions shown in inches and (millimeters).775 (9.69).75 (9.5).735 (8.67).2 (5.33) MAX.5 (3.8).3 (3.3). (2.79).22 (.56).8 (.46).4 (.36) 4. (2.54) BSC.7 (.78).5 (.27).45 (.4) (7.).25 (6.35).24 (6.).5 (.38) MIN SEATING PLANE.5 (.3) MIN.6 (.52) MAX.5 (.38) GAUGE PLANE.325 (8.26).3 (7.87).3 (7.62).43 (.92) MAX.95 (4.95).3 (3.3).5 (2.92).4 (.36). (.25).8 (.2) COMPLIANT TO JEDEC STANDARDS MS- CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure Lead Plastic Dual In-Line Package [PDIP] (N-4) [P-Suffix] Dimensions shown in inches and (millimeters) 766-A Rev. H Page 4 of 6

15 Data Sheet.5 (.434). (.3976) (.2992) 7.4 (.293) 8.65 (.493). (.3937).27 (.5) BSC 2.65 (.43) 2.35 (.925).3 (.8) 8. (.39) COPLANARITY..5 (.2) SEATING PLANE.33 (.3).3 (.22).2 (.79).75 (.295).25 (.98) (.5).4 (.57) COMPLIANT TO JEDEC STANDARDS MS-3-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-6) [S-Suffix] Dimensions shown in millimeters and (inches) B ORDERING GUIDE Model Temperature Range Package Description Package Option AY 55 C to 25 C 4-Lead CERDIP Y-Suffix (Q-4) EY 25 C to 85 C 4-Lead CERDIP Y-Suffix (Q-4) FY 25 C to 85 C 4-Lead CERDIP Y-Suffix (Q-4) GP C to 7 C 4-Lead PDIP P-Suffix (N-4) GPZ C to 7 C 4-Lead PDIP P-Suffix (N-4) HPZ 4 C to 85 C 4-Lead PDIP P-Suffix (N-4) GS C to 7 C 6-Lead SOIC_W S-Suffix (RW-6) GS-REEL C to 7 C 6-Lead SOIC_W S-Suffix (RW-6) GSZ C to 7 C 6-Lead SOIC_W S-Suffix (RW-6) GSZ-REEL C to 7 C 6-Lead SOIC_W S-Suffix (RW-6) HS 4 C to 85 C 6-Lead SOIC_W S-Suffix (RW-6) HS-REEL 4 C to 85 C 6-Lead SOIC_W S-Suffix (RW-6) HSZ 4 C to 85 C 6-Lead SOIC_W S-Suffix (RW-6) HSZ-REEL 4 C to 85 C 6-Lead SOIC_W S-Suffix (RW-6) GBC Die Z = RoHS Compliant Part. SMD PARTS AND EQUIVALENTS SMD Part Number Analog Devices Equivalent M3A MCA ATCMDA AYMDA For military processed devices, please refer to the standard microcircuit drawing (SMD) available at the Defense Supply Center Columbus website. Rev. H Page 5 of 6

16 Data Sheet NOTES 23 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D34--/3(H) Rev. H Page 6 of 6