Power Management & Multimarket

Transcription

1 TVS Diodes Transient Voltage Suppressor Diodes ESD0P2RF Series Bi-directional Ultra-low Capacitance ESD / Transient Protection Diode ESD0P2RF-02LS ESD0P2RF-02LRH Data Sheet Rev. 1.2, Final Power Management & Multimarket

2 Edition Published by Infineon Technologies AG Munich, Germany 2012 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office ( Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

3 Revision History: Rev. 1.1, Page or Item Subjects (major changes since previous revision) Rev. 1.2, Page Nr.8 Package name corrected (mismatch) 10 Table 2-4 updated Trademarks of Infineon Technologies AG AURIX, BlueMoon, C166, CanPAK, CIPOS, CIPURSE, COMNEON, EconoPACK, CoolMOS, CoolSET, CORECONTROL, CROSSAVE, DAVE, EasyPIM, EconoBRIDGE, EconoDUAL, EconoPIM, EiceDRIVER, eupec, FCOS, HITFET, HybridPACK, I²RF, ISOFACE, IsoPACK, MIPAQ, ModSTACK, my-d, NovalithIC, OmniTune, OptiMOS, ORIGA, PRIMARION, PrimePACK, PrimeSTACK, PRO-SIL, PROFET, RASIC, ReverSave, SatRIC, SIEGET, SINDRION, SIPMOS, SMARTi, SmartLEWIS, SOLID FLASH, TEMPFET, thinq!, TRENCHSTOP, TriCore, X-GOLD, X-PMU, XMM, XPOSYS. Other Trademarks Advance Design System (ADS) of Agilent Technologies, AMBA, ARM, MULTI-ICE, KEIL, PRIMECELL, REALVIEW, THUMB, µvision of ARM Limited, UK. AUTOSAR is licensed by AUTOSAR development partnership. Bluetooth of Bluetooth SIG Inc. CAT-iq of DECT Forum. COLOSSUS, FirstGPS of Trimble Navigation Ltd. EMV of EMVCo, LLC (Visa Holdings Inc.). EPCOS of Epcos AG. FLEXGO of Microsoft Corporation. FlexRay is licensed by FlexRay Consortium. HYPERTERMINAL of Hilgraeve Incorporated. IEC of Commission Electrotechnique Internationale. IrDA of Infrared Data Association Corporation. ISO of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB of MathWorks, Inc. MAXIM of Maxim Integrated Products, Inc. MICROTEC, NUCLEUS of Mentor Graphics Corporation. Mifare of NXP. MIPI of MIPI Alliance, Inc. MIPS of MIPS Technologies, Inc., USA. murata of MURATA MANUFACTURING CO., MICROWAVE OFFICE (MWO) of Applied Wave Research Inc., OmniVision of OmniVision Technologies, Inc. Openwave Openwave Systems Inc. RED HAT Red Hat, Inc. RFMD RF Micro Devices, Inc. SIRIUS of Sirius Satellite Radio Inc. SOLARIS of Sun Microsystems, Inc. SPANSION of Spansion LLC Ltd. Symbian of Symbian Software Limited. TAIYO YUDEN of Taiyo Yuden Co. TEAKLITE of CEVA, Inc. TEKTRONIX of Tektronix Inc. TOKO of TOKO KABUSHIKI KAISHA TA. UNIX of X/Open Company Limited. VERILOG, PALLADIUM of Cadence Design Systems, Inc. VLYNQ of Texas Instruments Incorporated. VXWORKS, WIND RIVER of WIND RIVER SYSTEMS, INC. ZETEX of Diodes Zetex Limited. Last Trademarks Update Final Data Sheet 3 Rev. 1.2,

4 Bi-directional Ultra-low Capacitance ESD / Transient Protection Diode 1 Bi-directional Ultra-low Capacitance ESD / Transient Protection Diode 1.1 Features ESD / transient protection of RF signal lines according to: IEC (ESD): ±20 kv (air/contact) IEC (EFT): 40 A (5/50 ns) IEC (surge): 3 A (8/20 μs) Maximum working voltage: V RWM ±5.3 V Extremely low capacitance: C L = 0.2 pf (typical) Low clamping voltage: V CL = 29 V at I PP = 16 A (typical) Very low reverse current I R < 1 na typ. Very small form factor down to 0.62 x 0.32 x 0.31 mm 3 Pb-free (RoHS compliant) and halogen free package 1.2 Application Examples ESD protection of sensitive RF signal lines, Bluetooth Class 2, Automated Meter Reading RF antenna protection, frontend module, GPS, mobile TV, FM radio, UWB 1.3 Product Description Pin 1 Pin 2 Pin 1 Pin 1 marking (lasered) TSLP-2 Pin 1 Pin 2 Pin 2 TSSLP-2 a) Pin configuration b) Schematic diagram Figure 1-1 Pin Configuration and Schematic Diagram PG-TS(S)LP-2_Dual_Diode_Serie_PinConf_and_SchematicDiag.vsd Table 1-1 Ordering Information Type Package Configuration Marking code ESD0P2RF-02LS PG-TSSLP line, bi-directional T ESD0P2RF-02LRH PG-TSLP line, bi-directional T Final Data Sheet 4 Rev. 1.2,

5 Characteristics 2 Characteristics Table 2-1 Maximum Ratings at T A = 25 C, unless otherwise specified Parameter Symbol Values Unit Min. Typ. Max. ESD air / contact discharge 1) V ESD 20 kv Peak pulse current (t p = 8/20 μs) 2) I PP 3 A Operating temperature range T OP C Storage temperature T stg C 1) V ESD according to IEC ) I PP according to IEC Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. 2.1 Electrical Characteristics at T A =25 C, unless otherwise specified Figure 2-1 Definitions of electrical characteristics Final Data Sheet 5 Rev. 1.2,

6 Characteristics Table 2-2 DC Characteristics at T A = 25 C, unless otherwise specified Parameter Symbol Values Unit Note / Min. Typ. Max. Test Condition Reverse working voltage V RWM V Breakdown voltage V BR 7 V I R = 1 ma, from pin 1 to pin 2, from pin 2 to pin 1 Reverse current I R <1 50 na V R = 5.3 V Table 2-3 RF Characteristics at T A = 25 C, unless otherwise specified Parameter Symbol Values Unit Note / Min. Typ. Max. Test Condition Diode capacitance C L pf V R = 0 V, f = 1 MHz pf V R = 0 V, f = 1 GHz Table 2-4 ESD Characteristics at T A = 25 C, unless otherwise specified Parameter Symbol Values Unit Note / Min. Typ. Max. Test Condition Clamping voltage 2) V CL 29 V I TLP = 16 A 38 I TLP = 30 A Clamping voltage 1) I PP = 1 A I PP = 3 A Dynamic resistance 2) R DYN 1 Ω Series inductance L S 0.2 nh ESD0P2RF-02LS 0.4 nh ESD0P2RF-02LRH 1)I PP according to IEC (t p = 8/20 µs) 2) Please refer to Application Note AN210 [4]. TLP parameter: Z 0 = 50 Ω, t p = 100ns, t r = 300ps, averaging window: t 1 = 30 ns to t 2 = 60 ns, extraction of dynamic resistance using least squares fit of TLP charactertistics between I TLP1 = 10 A and I TLP2 = 40 A. Final Data Sheet 6 Rev. 1.2,

7 Characteristics 2.2 Typical Characteristics at T A = 25 C, unless otherwise specified C I R [A] C C V R [V] Figure 2-2 Reverse current: I R = f(v R ), T A = parameter C L [pf] V R [V] Figure 2-3 Line capacitance: C L = f(v R ), f = 1 MHz Final Data Sheet 7 Rev. 1.2,

8 Characteristics V C L [pf] V 0V 0.21 Figure f [MHz] Line capacitance: C L = f(f), V R = parameter C L [pf] Figure V V V T A [ C] Line capacitance: C L = f(t A ), V R = parameter Final Data Sheet 8 Rev. 1.2,

9 Characteristics V CL [V] V CL-max-peak = 112 [V] V CL-30ns-peak = 24.8 [V] t p [ns] Figure 2-6 IEC V CL = f(t), 8 kv positiv pulse from pin 1 to pin V CL [V] V CL-max-peak = -116 [V] V CL-30ns-peak = [V] t p [ns] Figure 2-7 IEC V CL = f(t), 8 kv negativ pulse from pin 1 to pin 2 Final Data Sheet 9 Rev. 1.2,

10 Characteristics V CL [V] V CL-max-peak = 162 [V] 80 V CL-30ns-peak = 37.4 [V] t p [ns] Figure 2-8 IEC V CL = f(t), 15 kv positiv pulse from pin 1 to pin 2 V CL [V] V CL-max-peak = -169 [V] -80 V CL-30ns-peak = [V] t p [ns] Figure 2-9 IEC V CL = f(t), 15 kv negativ pulse from pin 1 to pin 2 Final Data Sheet 10 Rev. 1.2,

11 Characteristics 40 ESD0P2RF-02xx R DYN 20 I TLP [A] R DYN =1.0Ω Equivalent V IEC [kv] V TLP [V] Figure 2-10 Clamping voltage : I TLP = f(v TLP ) [4] V CL [V] I PP [A] Figure 2-11 Clampine voltage: V CL = f(i PP ), t p = 8/20 μs Final Data Sheet 11 Rev. 1.2,

12 Application Information 3 Application Information Connector Protected signal line 1 I/O ESD sensitive device 2 The protection diode should be placed very close to the location where the ESD or other transients can occur to keep loops and inductances as small as possible. Pin 2 (or pin 1) should be connected directly to a ground plane on the board. Application_ESD0P2RF -02xx.vsd Figure 3-1 Single line, bi-directional ESD / Transient protection [1], [2] Final Data Sheet 12 Rev. 1.2,

13 Ordering Information Scheme (Examples) 4 Ordering Information Scheme (Examples) ESD 0P1 RF - XX YY Package XX = Pin number (i.e.: 02 = 2 pins; 03 = 3 pins) YY = Package family: LS = TSSLP LRH = TSLP For Radio Frequency Applications Line Capacitance CL in pf: (i.e.: 0P1 = 0.1pF) ESD 5V3 U n U - XX YY Package or Application XX = Pin number (i.e.: 02 = 2 pins; 03 = 3 pins) YY = Package family: LS = TSSLP LRH = TSLP S = SOT363 U = SC74 XX = Application family: LC = Low Clamp HDMI Uni- / Bi-directional or Rail to Rail protection Number of protected lines (i.e.: 1 = 1 line; 4 = 4 lines) Capacitance: Standard (>10pF), Low (<10pF), Ultra-low (<1pF) Figure 4-1 Maximum working voltage VRWM in V: (i.e.: 5V3 = 5.3V) Ordering information scheme Final Data Sheet 13 Rev. 1.2,

14 Package Information 5 Package Information 5.1 PG-TSLP-2-17 (mm) [5] Top view Bottom view 0.05 MAX. 0.6 ± ± ±0.05 Figure 5-1 Cathode marking PG-TSLP-2-17: Package overview 1) 0.5 ± ) Dimension applies to plated terminal 1) 0.25 ±0.035 TSLP27PO V Figure 5-2 PG-TSLP-2-17: Footprint Copper Solder mask Stencil apertures TSLP-2-7-FP V Orientation marking 0.76 TSLP-2-7-TP V03 Figure 5-3 PG-TSLP-2-17: Packing Figure 5-4 PG-TSLP-2-17: Marking (example) Final Data Sheet 14 Rev. 1.2,

15 Package Information 6 Package Information 6.1 PG-TSSLP-2-1 (mm) [5] Top view Bottom view 0.32± ± ±0.035 Cathode marking 1) 0.26± ) 0.2 ±0.025 Figure 6-1 1) Dimension applies to plated terminal PG-TSSLP-2-1: Package overview TSSLP-2-1,-2-PO V Copper Solder mask Stencil apertures Figure 6-2 PG-TSSLP-2-1: Footprint TSSLP-2-1,-2-FP V Ey Figure 6-3 Cathode marking PG-TSSLP-2-1: Packing Ex Figure 6-4 PG-TSSLP-2-1: Marking (example) Final Data Sheet 15 Rev. 1.2,

16 References References [1] Infineon AG - Application Note AN167: ESD Protection for Broadband LNA BGA728L7 for Portable and Mobile TV Applications [2] Infineon AG - Application Note AN178: ESD Protection for RF Antennas using Infineon ESD0P4RFL and ESD0P2RF-xx [3] Infineon AG - Application Note AN200: Low Cost FM Radio LNA using BFR340F for Mobile Phone Applications [4] Infineon AG - Application Note AN210: Effective ESD Protection Design at System Level using VF-TLP Characterization Methodology [5] Infineon AG - Recommendations for PCB Assembly of Infineon TSLP and TSSLP Packages Final Data Sheet 16 Rev. 1.2,

17 Published by Infineon Technologies AG