Cryptography & Network-Security: Implementations in Hardware

Transcription

1 Kris Gaj joined ECE GMU in Fall 1998 Cryptography & Network-Security: Implementations in Hardware

2 6 Ph.D. Students Pawel Chodowiec Charikleia Zouridaki Chang Shu Sashisu Bajracharya Nghi Nguyen Deapesh Misra

3 Paul Kohlbrenner 22 conference papers 7 defended MS Theses 4 MS Theses in progress Tim Grembowski Roar Lien Ashraf AbuSharekh

4 Life of encryption standards American standards DES 56 bit key Triple DES AES-contest , 168 bit keys AES 128, 192, and 256 bit keys DES 56 bit key AES min. 128 bit key more keys to try

5 Deep Crack DES Breaker Electronic Frontier Foundation, 1998 Total cost: $220,000 Average time of search: 4.5 days/key 1800 ASIC chips

6 First Project at GMU: Advanced Encryption Standard (AES) Contest June Candidates from USA, Canada, Belgium, France, Germany, Norway, UK, Isreal, Korea, Japan, Australia, Costa Rica August final candidates Mars, RC6, Rijndael, Serpent, Twofish Round 1 Security Software efficiency Round 2 Security Hardware efficiency October winner: Rijndael Belgium

7 Two primary ways of implementing cryptography in hardware ASIC Application Specific Integrated Circuit designed all the way from behavioral description to physical layout designs must be sent for expensive and time consuming fabrication in semiconductor foundry FPGA Field Programmable Gate Array no physical layout design; design ends with a bitstream used to configure a device bought off the shelf and reconfigured by designers themselves

8 FPGA components Configurable Logic Blocks Block RAMs Block RAMs I/O Blocks Block RAMs Major vendors: Xilinx, Inc. and Altera Corp.

9 Implementations of AES candidates using Xilinx FPGA, Virtex 1000 Speed [Mbit/s] Serpent I Our results University of Southern California Worcester Polytechnic Institute Rijndael Twofish Serpent RC6 Mars I

10 Survey filled by 167 participants of the Third AES Conference, AES3, April 2000 # votes Rijndael Serpent Twofish RC6 Mars

11 Speed of the final AES candidates in hardware Speed [Mbit/s] K.Gaj, P. Chodowiec, AES3, April, 2000 Serpent Rijndael Twofish RC6 Mars

12 Outcome of our research Software Efficiency Security Flexibility Hardware Efficiency Demonstrated the importance of hardware efficiency in the evaluation of cryptographic algorithms Influenced the choice of a new standard to be used worldwide for the next years

13 GMU Hardware Cryptographic Cores developed together with the graduate students: Pawel Chodowiec, Roar Lien, and Tim Grembowski, commercialized by the GMU Office of Intellectual Property and Technology Transfer led by Jennifer Murphy Encryption AES Triple DES Twofish Serpent RC6 Mars Hash Functions SHA-1 SHA-512

14 1 Gbit/s Reconfigurable Hardware Accelerator for Virtual Private Networks, Host".!.!.!.! Security gateway Internet" Security gateway Host".!.!.!.! Host" Cryptographic accelerators Host" in collaboration with the University of Southern California - Information Sciences Institute (USC ISI), Arlington, VA sponsored by DARPA

15 FPGA Accelerator Board - SLAAC-1V developed under DARPA-funded project Systems-Level Applications of Adaptive Computing (SLAAC)

16 Reconfigurable Computers from SRC Computers, Inc. and Star Bridge Systems, Inc. SRC-6E Star Bridge HC-36

17 Reconfigurable Computers Basic Architecture µp Board µp Board Xeon µp Xeon µp FPGA Processor Board Xeon µp Xeon µp L2 L2 MAP Board L2 L2 MIOC Control Chip (6x) Control Chip (6x) MIOC PCI Slot Private Memory S N A P On-Board Memory (24 MB) On-Board Memory (24 MB) S N A P Private Memory PCI Slot (6x) (6x) User Chip User Chip User Chip User Chip 4 x Xilinx Virtex II 6000

18 NSA-sponsored project Libraries for reconfigurable computers, SRC Computers Star Bridge Systems Tarek El-Ghazawi, GWU, Washington, DC Duncan Buell, USC Columbia, SC Douglas Fouts, NPS Monterey, CA

19 Benchmarks for the SRC Reconfigurable Computer speed-up vs. Pentium 4 for Elliptic Curve Cryptography & Secret-Key Cipher Breaking

20 Next big project: Factoring of large numbers = evaluating security of the RSA public key cryptosystem Given N = P Q find separately P and Q High Potential GRAs sponsored by the GMU Provost Office Sashisu Bajracharya Deapesh Misra

21 Public Key Cryptosystems Public key of Bob - K B Private key of Bob - k The image cannot be displayed. Your computer may not have enough memory to open the image, or the image may have been corrupted. Restart your computer, and then open the file again. If the red x still appears, you may have to delete the image and then B insert it again. Network Alice Encryption Decryption Bob

22 Keys in the RSA public key cryptosystem PUBLIC KEY PRIVATE KEY { e, N } { d, P, Q } N = P Q P, Q - large prime numbers e d 1 mod ((P-1)(Q-1))

23 FPGA & Crypto: Is Marriage in the Cards?

24 Cryptographic architectures embedded in reconfigurable devices workshop - CryptArchi 2004 Abbey La Bussiére near Dijon, France June 16 18th 2004 Viktor Fischer Université de Saint-Etienne France Local organization Kris Gaj George Mason University USA Program Chair

25 Field Trips CHES 2002, San Francisco Macquarie University, Sydney, Australia, 2002 ISC 2002, Rio de Janeiro, Brazil FPT 2003, Tokyo, Japan, 2003

26 Looking forward to the next 20 years in the ECE Department at GMU!