Rapid System Prototyping with FPGAs

Transcription

1 Rapid System Prototyping with FPGAs By R.C. Coferand Benjamin F. Harding AMSTERDAM BOSTON HEIDELBERG LONDON NEW YORK OXFORD PARIS SAN DIEGO SAN FRANCISCO SINGAPORE SYDNEY TOKYO Newnes is an imprint of Elsevier % Newnes

2 Chapter 1: Introduction FPGA Rapid Design Implementation Potential Rapidly Evolving Technology Field Design Skill Set Crossover Hardware Knowledge for Software/Firmware Designers Software Knowledge for Hardware Designers When FPGA Technology May Not Be an Ideal Fit When FPGAs Technology May Be Appropriate Summary 11 Chapter 2: FPGA Fundamentals Overview Categories of Programmable Logic SPLD Device Overview CPLD Device Overview FPGA Device Overview FPGATypes SRAM-Based FPGA Architecture FPGA Logic Block Structure FPGA Routing Matrix and Global Signals FPGA I/O Blocks FPGA Clock Resources FPGA Memory Advanced FPGA Features Summary 33 vii

3 Chapter 3: Optimizing the Development Cycle Overview FPGA Design Flow Requirements Phase Architecture and Design Phase Implementation Phase Veriflcation Phase Summary 49 Chapter 4: System Engineering Overview Common Design Challenges and Mistakes Defined FPGA Design Process Project Engineering and Management Team Communication Design Reviews Budgets and Scheduling Training Support Design Configuration Management Controlling the FPGA Design in the Lab Archiving the Design Summary 70 Chapter 5: FPCA Device-Level Design Decisions Overview FPGA Selection Categories FPGA Manufacturer Selection Family Selection Device Selection Package Selection Design Decisions Data Flow through the FPGA Informed I/O Pin Assignments Device Selection Checklist Summary 85 viii

4 Chapter 6: Board-Level Design Decisions and Allocation Overview Packaging BGA Component Considerations BGA Signal Breakout Mounting and Reworking BGA Components BGA I/O to Signal Assignment BGA Trace Signal Access I/O Assignment Iteration FPGA Device Schematic Symbol Generation Thermal Board Layout Device Placement and Orientation Headers and Internal Signal Access (Test and Configuration Cable) Signal Integrity Signal Protocol Choices and Implementation Power Device Decoupling Considerations Summary 102 Chapter 7: Design Implementation Overview Design Architecture Synchronous Design Hierarchical versus Fiat Design Implementing a Hierarchical Design Design Entry DualNature of HDL Languages HDL Coding Guidance Tools RTL Synthesis Logical Synthesis Physical Synthesis Preparing a Design for Synthesis Design Inference versus Instantiation 122 ix

5 7.6 Place and Route Summary 124 Chapter 8: Design Simulation Overview Stages of Simulation Types of Simulation Files How Much Simulation? Hierarchical Design and Simulation Common Simulation Mistakes and Tips Summary 135 Chapter 9: Design Constraints and Optimization Overview Design Constraint Management Avoiding Design Over-Constraint Synthesis Constraints Pin Constraints Timing Constraints Area Constraints and Floorplanning Constraint Example Constraints Checklist Design Optimization FPGA Design Optimization Process Summary 153 Chapter 10: Configuration Overview On-Board Device Configuration Configuration Cable Interface JTAG Standard Understanding Pin Operational States Design Security Summary 161 Chapter 11: Board-Level Testing Overview FPGA Design Validation Approaches Access to Critical Internal Signals 164 X

6 Boundary Scan Support 11.2 Design Debug Checklist 11.3 Summary Chapter 12: Advanced Topics Introduction Overview 12.2 Reduced Power Consumption 12.3 Volume Production Options 12.4 Summary Chapter 13: Cores and Intellectual 13.1 Overview 13.2 TypesoflP 13.3 Categories of IP 13.4 Trade Studies Property Make versus Buy? SourcesoflP Evaluating IP Options Qualifying an IP Vendor Licensing Issues 13.6 IP Implementation/Tools 13.7 IP Testing/Debug 13.8 Summary Chapter 14: Embedded Processing Cores Overview 14.2 FPGA Embedded Processor Types 14.3 FPGA Processor Use Considerations 14-4 System Design Considerations Co-Design Processor Architecture Processor Implementation Options Processor Core and Peripheral Selection Hardware Implementation Factors Software Implementation Factors 14-5 FPGA Embedded Processor Concept Example FPGA Embedded Processor Design Checklist 14.7 Summary

7 Chapter 15: Digital Signal Processing Overview Basic DSP System Essential DSP Terms Architectures Parallel Execution in DSP Components Parallel Execution in FPGA When to Use FPGAs for DSP FPGA DSP Design Considerations Clocking and Signal Routing Pipelining Algorithm Implementation Choices DSP Intellectual Property (IP) FIR Filter Concept Example Summary 224 Chapter 16: Advanced Interconnect Overview Interconnection Categories Advanced I/O Interface Challenges Implementing an Advanced Parallel I/O Interface Implementing an Advanced Serial I/O Interface Summary 236 Chapter 17: Bringing It All Together System Overview Requirements Phase Architectural Phase Implementation Phase Verification Phase Prototype Delivery Summary 247 Appendix A: Rapid System Prototyping Technical References 249 Appendix B: Design Phases 271 Abbreviations and Acronyms 287 Index 295 xii