A LINE-INTERACTIVE UPS SYSTEM IMPLEMENTATION WITH SERIES-PARALLEL ACTIVE POWER-LINE CONDITIONING FOR THREE-PHASE, FOUR-WIRE SYSTEMS

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1 A LINE-INTERACTIVE UPS SYSTEM IMPLEMENTATION WITH SERIES-PARALLEL ACTIVE POWER-LINE CONDITIONING FOR THREE-PHASE, FOUR-WIRE SYSTEMS Sérgio Auguto Olivira da Silva Dpartamnto d Engnharia Elétrica CEFET-PR Av. Albrto Carazzai, Cntro. CEP Cornélio Procópio-PR, Brail. Pdro F. Donoo-Garcia; Porírio C. Cortizo; Paulo F. Sixa Dpartamnto d Engnharia Eltrônica UFMG Av. Antônio Carlo, Pampulha. CEP Blo Horizont-MG, Brail. Abtract Thi papr prnt a thr-pha lin-intractiv unintrruptibl powr upply (UPS) ytm with activ ri-paralll powr-lin conditioning capabiliti. Synchronou rrnc ram (SRF)-bad controllr i ud or harmonic and ractiv powr compnation gnratd rom any coniguration o non-linar load. Undr normal lin condition th UPS ytm work with univral iltring capabiliti, uch a compnating th input currnt and output voltag. Two thr-pha pulwidth modulation (PWM) convrtr, calld ri and paralll activ iltr, ar ud to prorm th ri and paralll activ powr-lin compnation. Th ri activ iltr work a inuoidal currnt ourc in pha with th input voltag, drawing rom utility inuoidal and balancd input currnt with low total harmonic ditortion (THD). Th paralll activ iltr work a inuoidal voltag ourc in pha with th input voltag, providing rgulatd and inuoidal output voltag with low THD. Th prormanc o th UPS ytm i valuatd in thr-pha, our-wir ytm. Exprimntal rult ar prntd to conirm th thortical tudi. Rcbido m 0/10/0 1ª. rviao m 0/1/0 ª rvião m 18/0/0 ª rvião m 4/0/0 Acito /rcom.do Ed.A. Pro. Joé Antnor Pomilio Kyword: Activ Filtr; UPS; Harmonic. Rumo Et artigo aprnta um itma d nrgia inintrrupta (SEI) lin-intractiv triáico com capacidad d condicionamnto ativo d potência éri parallo. Um controlador baado no itma d ixo d rrência íncrona (SRF) é uado na compnação d potência rativa harmônica grada por quaiqur coniguraçõ d carga não linar. Sob condiçõ normai da rd létrica o SEI trabalha na compnação da corrnt d ntrada da tnõ d aída. Doi convror controlado m tnão modulado por largura d pulo (PWM), chamado d iltro ativo éri parallo, ão uado para ralizar o condicionamnto ativo d potência éri parallo. O iltro ativo éri trabalha como uma ont d corrnt noidal m a com a tnão d ntrada, drnando da rd corrnt noidai, balancada com baixa taxa d ditorção harmônica (TDH). O iltro ativo parallo trabalha como uma ont d tnão noidal m a com a tnão d ntrada, orncndo para a carga tnõ rgulada, noidai com baixa taxa d ditorção harmônica. O dmpnho do SEI é avaliado para itma triáico com quatro io. Rultado xprimntai ão aprntado para conirmar o tudo tórico. Palavra Chav: Filtro ativo, SEI, Harmônica. 00 Rvita Control & Automação/Vol.16 no. /Abril, Maio Junho 005

2 1 INTRODUCTION Th larg u o non-linar load, uch a, pronal computr, UPS, tc., ha incrad in th lat yar, cauing problm to th powr upply ytm. Th harmonic currnt drawn by non-linar load rom utility hav contributd to rduc th powr actor and to incra th total harmonic ditortion (THD) in th utility input voltag. Th problm incra whn ingl-pha nonlinar load ar connctd in thr-pha, our-wir ytm. In thi ca, a th pha currnt ar not inuoidal, vn prctly balancd ingl-pha load can rult in igniicant nutral currnt and thir amplitud can xcd th amplitud o th lin currnt (Gruz, 1990). I th non-linar load ar unbalancd, th input currnt will b unbalancd in trm o undamntal and harmonic componnt, and a vry larg third componnt and it multipl will low in th nutral wir. Th xciv nutral currnt can cau damag both in th nutral conductor and in th tranormr to which it i connctd (Quinn t al., 199). Thrby, activ iltr topologi hav bn ud to compnat nutral harmonic currnt (Quinn t al., 199; Quinn t al., 199; Thoma l al., 1996). Unintrruptibl powr upply (UPS) ytm hav nabld th improvmnt o powr ourc quality, providing clan and unintrruptibl powr to critical load uch a indutrial proc control, computr, mdical quipmnt, data communication ytm, and protction againt powr upply diturbanc or intrruption (Olivira da Silva t al., 001; Kamran t al., 1995; Jon t al., 1997, Chung t al., 1996; Lin t al., 199). In (Lin t al., 199) a thrpha paralll procing UPS ha bn prntd with harmonic and ractiv powr compnation, but th output voltag and th input currnt cannot b controlld imultanouly. Thr-pha UPS ytm with riparalll activ powr-lin conditioning hav bn propod uing dirnt control tratgi (Olivira da Silva t al., 001; Kamran t al., 1995). In (Kamran t al., 1995) th thr-pha UPS ytm wa mployd or thr-wir ytm, and in (Olivira da Silva t al., 001), albit it can b mployd or thr-wir and our-wir ytm, th UPS wa ud to d a non-linar load compod by a thrpha non-controlld rctiir, in which nutral currnt do not xit. Thi papr prnt a thr-pha lin-intractiv UPS ytm with activ ri-paralll powr-lin conditioning capabiliti uing an SRF-bad controllr, or thr-wir and our-wir ytm in which thr ingl-pha load ar d. In UPS tandby opration mod, th ri activ powr iltr act a a inuoidal currnt ourc and th paralll activ powr iltr act a a inuoidal voltag ourc (Olivira da Silva t al., 001). Th output voltag ar controlld to hav contant rm valu and low THD and th ourc currnt ar controlld to b inuoidal and balancd with low THD. Both input currnt and output voltag ar imultanouly controlld to b in pha with rpct th input voltag. Thror, an ctiv powr actor corrction i carrid out. Th control algorithm uing SRF mthod and th activ powr low through th UPS ytm ar dcribd and analytically tudid. Dign procdur, digital imulation and xprimntal rult or a prototyp ar prntd in ordr to vriy th good prormanc o th propod thrpha lin-intractiv UPS ytm. DESCRIPTION OF THE LINE- INTERACTIVE UPS TOPOLOGY Th topology o th lin-intractiv UPS ytm i hown in Fig. 1. Two pulwidth modulation (PWM) convrtr, coupld to a common -bu, ar ud to prorm th ri activ iltr and th paralll activ iltr unction. Capacitor and a battry bank ar placd in th -bu and a tatic witch w i ud to provid th diconnction btwn th UPS ytm and th powr upply whn an occaional intrruption o th incoming powr occur. Th cntr-tap o th -bu i connctd to th utility nutral. Figur 1. Lin-Intractiv UPS ytm topology SYNCHRONOUS REFERENCE FRAME AND STATE FEEDBACK CONTROLLERS.1 Currnt SRF-Bad Controllr (Standby Mod) An SRF-bad controllr i ud to provid and to control th compnating rrnc currnt (,, and ica icb icc ) or th ri PWM convrtr hown in Fig. 1. Th block diagram o th control chm or currnt compnation i hown in Fig.. Th thr-pha load currnt ( i La, ilb,i Lc ) ar maurd and tranormd into a twopha tationary rrnc ram (dq) quantiti ( id, iq ) Rvita Control & Automação/Vol.16 no./abril, Maio Junho

3 bad on th tranormation (1). Thn, th quantiti ar tranormd rom a two-pha tationary rrnc ram (dq) into a two-pha ynchronou rotating (dq) rrnc ram, bad on th tranormation (), whr = t, i th angular poition o th rrnc ram. Th unit vctor in and co ar obtaind rom PLL ytm. Th currnt at th undamntal rquncy ( id and iq ) ar now valu and all th harmonic, tranormd into non- quantiti, can b iltrd uing a low pa iltr (LPF) a hown in Fig.. Now, id rprnt th undamntal activ componnt o th load currnt and iq rprnt th undamntal ractiv componnt o th load currnt, both in dq axi. Now, th componnt o th ynchronou rrnc ram id c and iq can b tranormd into th tationary rrnc ram (dq). Th invr tranormation matrix rom two-pha ynchronou rrnc ram to two-pha tationary rrnc ram i givn by (4). A only th undamntal activ componnt rrnc nd to b obtaind, (4) can b rplacd by (5). Th matrix that provid th linar tranormation rom two-pha ytm to thr-pha tationary rrnc ram ytm i givn by (6). Thrby, th componnt o th ynchronou rrnc ram id c i tranormd into th tationary rrnc ram (dq) and yild th undamntal componnt o th load currnt ( i,, and i ca icb cc ). Such rrnc currnt ar gnratd in otwar. id co iq in id co iq in in id co iq in id co 0 (4) (5) Figur. Block diagram o th currnt SRF-bad controllr. An additional -bu controllr i rponibl or rgulating th currnt I and th voltag V. Apart rom th convntional activ iltr application, in which only th -bu voltag i controlld, th UPS -bu controllr i abl to control th -bu currnt or adquat charging o th battry bank. Th -bu controllr i alo rponibl to control th activ powr low o th UPS ytm. It output ib i addd to th activ currnt in th d axi id a givn by () and, thu, th amplitud o th rrnc currnt can b controlld by id. id iq c c ila 1 ilb ilc (1) i ca i cb icc id iq. Stat Fdback Currnt Controllr (Standby Mod) i c a,b,c Th ingl-pha block diagram o th currnt controllr i hown in Fig.. Th load currnt ( i L a,b,c ) ar maurd and rom th currnt SRF controllr th inuoidal currnt rrnc ( ) ar obtaind. From Fig., th clodloop tranr unction ic ( ) / ic ( ) i ound a (7), in which th gain o th PWM block i on. Th dynamic tin tranr unction o th ri convrtr i givn by (8), which i dind a th magnitud o th dirnc btwn th input and output voltag that (6) id co iq in in id co iq () id c id () ib Figur. Singl-pha currnt controllr o th ri activ iltr (ri convrtr). 0 Rvita Control & Automação/Vol.16 no. /Abril, Maio Junho 005

4 ic ( ) K P K I ic ( ) L ( K P RL ) K I (7) v L ( ) v ( ) i ( ) c ( K P R L ) K I (8) Figur 4. Frquncy Rpon o th ri activ iltr ic ( ) / ic ( ) : (a) Amplitud rpon, (b) Pha rpon. Th rquncy rpon o quation (7) i hown in Fig. 4 (a) and (b). At th powr ytm rquncy ( = 77 rad/), th gain o th ytm tranr unction i about 0 db and th pha hit i narly zro dgr. Th bandwidth o th ytm i about 1600 Hz. Fig. 5 how th dynamic tin rquncy rpon o th currnt controllr. It can b notd high impdanc obtaind rom (8) in a larg rang o th rquncy pctrum, which i nough to iolat th lin rom th load with rpct to currnt harmonic. Th paramtr and gain ud to plot th curv o Fig. 4 and 5 ar litd in Tabl 1.. Stat Fdback Voltag Controllr (Standby and Backup Mod) Th paralll convrtr control th output voltag to b in pha with th input voltag. Bid, th output voltag hould b contant rm valu with low THD. Similar to th control algorithm or input currnt compnation, th rrnc voltag ( v a, b, c ) ar gnratd by otwar uing a PLL ytm (Olivira da Silva t al., 001). Figur 5. Dynamic Stin o Currnt Controllr ( v ( ) v ( )) / ic ( ) : Frquncy rpon. cau a unit dviation in input currnt i i : ( c ) ( v ( ) v ( )) ic ( ). Th voltag dirnc i conidrd a a diturbanc. Tabl 1 Paramtr and Controllr Gain (Currnt Controllr) Sri Filtr Inductor, L 1.4mH Fig. 6 how th ingl-pha block diagram o th voltag controllr, with an outr voltag loop and an innr currnt loop. To anticipat any rror to occur in th output voltag, a diturbanc input dcoupling i implmntd by mauring th load currnt i L and th ourc currnt i. Th dirnc btwn thm i ud a an additional currnt loop command. Thu, only th capacitor currnt i ud a a dorward command ( i C SCˆ ). To p p impliy th control, uch command wa ud only to plot th curv o Fig. 7 and 8 but it wa not implmntd in laboratory. From Fig. 6, th clod-loop tranr unction Inductor Ritanc, RL 0,05 Proportional gain, K P 11,1 Intgral gain, K I 951 Figur 6. Singl-pha voltag controllr o th paralll activ iltr (paralll convrtr). Rvita Control & Automação/Vol.16 no./abril, Maio Junho 005 0

5 Figur 7. Frquncy rpon o th paralll activ iltr v ( ) / v ( ) : (a) Amplitud rpon, (b) Pha rpon. v ( ) / v ( ) i ound a (9), in which th gain o th PWM block i on. Th dynamic tin tranr unction o th paralll convrtr i givn by (10), which i dind a th magnitud o th dirnc btwn th output and input currnt that cau a unit dviation in output voltag v : ( il ( ) i ( )) v (). Th currnt dirnc i conidrd a a diturbanc. Th coicint X n and Y n o th quation (9) and (10) ar givn by (11). v v * ( ) ( ) 1 1 il ( ) i ( ) Y1 v ( ) X1 Ĉ p.k Pi X K pv.k Pi X Y4 KIv.K Pi X Y X X (9) Y Y Y Y Z 1 Z Y1 L p.c p Y C p.( KPi RLp ) Y K pv.k Pi 1 4 Y Y 4 (10) Z 1 L p Z RLp (11) Th rquncy rpon o quation (9) i hown in Fig. 7 (a) and (b). At th powr ytm rquncy ( = 77 rad/), th gain o th ytm tranr unction i about 0 db and th pha hit i narly zro dgr. Th bandwidth o th ytm i about 6000 Hz. Fig. 8 how th dynamic tin rquncy rpon o th voltag controllr. It can b n a high admittanc obtaind rom (10) in a larg rang o th rquncy pctrum, which i nough to aborb th harmonic currnt o th load. Figur 8. Dynamic Stin o Voltag Controllr ( il( ) i( )) / v ( ) : Frquncy rpon. Th paramtr and gain ud to plot th curv o Fig. 7 and 8 ar litd in Tabl. Tabl Paramtr and Controllr Gain (Voltag Controllr) Paralll Filtr Inductor, L p 50H Inductor Ritanc, R 0,05 Lp Paralll Filtr Capacitor, C p Fd-Forward Capacitor, Cˆ p Proportional gain, Proportional gain, Intgral gain, K Pi K Pv,09 10F 10F 7,85 1 K Iv Rlation btwn th ri Z S and th paralll Impdanc. Z p From Fig. 8, it can b notd that th highr impdanc o th paralll convrtr occur at KHz ( Z p max 0, 4 ). At thi am rquncy, rom Fig. 5, th impdanc o th ri convrtr i Z S 0. Thu, th rlation btwn Z S and Z p max i approximatly 50. Thi i nough or th paralll convrtr to aborb th harmonic currnt o th load. 04 Rvita Control & Automação/Vol.16 no. /Abril, Maio Junho 005

6 From Fig. 5 it can b n that th lowr ri impdanc occur at 1,15 KHz ( Z min 1 ). At thi am rquncy, rom Fig. 8, th impdanc o th paralll convrtr i Z p 0, 05. Thu, th rlation btwn Z min and Z p i approximatly 40. Thi i nough or th ri convrtr to iolat th lin rom th load with rpct to currnt harmonic o th load. 4 ACTIVE POWER FLOW THROUGH THE UPS SYSTEM Th dirction o th activ powr low through th UPS ytm i hown in Fig. 9. It can vr chang bcau th amplitud o th input voltag i variabl. ( co 1 = 1.0 and co 1 = 0.7). Th curv can b ud to dtrmin th powr rat o th ri and th paralll PWM convrtr. I th charging o th battri i taking into account, additional activ powr P b, givn by (14), hould b includd in th analyi. Thu, quation (16) and (17) rplac quation (1) and (1), rpctivly, whr th charging actor k b i vr gratr than zro, and P, givn by quation (15), i th um o activ load powr PL and activ powr Pb, ud to charg th battry bank. S S L V P L 1 V PL QL H L V co 1 1 V 1 THDiL (1) (a) (b) Figur 9. Powr low o th UPS ytm: (a) V V ; (b) V V. Both th apparnt powr S and S p, handld by th ri and by th paralll convrtr, rpctivly, dpnd on th ratio btwn th output and input rm voltag ( V V ), th diplacmnt actor ( co 1 ) and th THD o th load currnt i L (THD il). In tady tat, auming a balancd inuoidal ytm, th normalizd powr handld by th paralll convrtr Sp S L and by th ri convrtr S S L ar givn by quation (1) and (1), rpctivly. Th quantiti S L, PL, QL and H L ar th apparnt, activ, ractiv and harmonic powr o th load, rpctivly. In Fig. 10 (a) and (b) th normalizd powr handld by th paralll convrtr S S and by th ri convrtr S S L p L ar plottd or two dirnt diplacmnt actor (a) (b) Figur 10. Normalizd powr: (a) Paralll convrtr S S, (b) Sri convrtr S SL. p L Rvita Control & Automação/Vol.16 no./abril, Maio Junho

7 S SL S p SL V V co 1 S p V V S L 1 THDiL Pb kbpl P PL Pb PL (1 kb V P 1 co V PL QL H L V co 1 V 1 V b V 1 THDiL 1 (1) (14) 1 kb ) (15) 1 THDiL 1 k 1 k (a) V 1 V b 1 (16) (17) Th plot o th normalizd powr or two dirnt valu o kb ( k b= 0 and kb= 0.1) ar hown in Fig. 11 (a) and (b). To ixd diplacmnt actor ( co 1 ) and load currnt THD, dpnding on th k b valu and th input voltag dviation rom th dird output voltag, th battri charging can b ralizd ithr rom th ri or paralll convrtr or rom both a can b obrvd in Fig. 11 (a). 5 EXPERIMENTAL RESULTS Th complt chm o th thr-pha lin-intractiv UPS ytm i hown in Fig. 1. To vriy th prormanc o th thr-pha lin-intractiv UPS ytm, a prototyp wa dvlopd and ttd. Thr ingl-pha non-linar load with high load currnt THD ar ud to tt th lin intractiv UPS ytm. Th paramtr ud in th prototyp ar: L p = 00H, L = 1.4mH, C p = 10F, = 6, = 55, R = 70, C = 470F, R La R Lb nominal rm lin-to-nutral input voltag - V a, b, c = 10V, nominal rm lin-to-nutral output voltag - V a, b,c = 115V and -bu voltag - V = 570V. Th apparnt powr rat o th unbalanc load ar: S a = 560 VA, S = 60 VA, and S = 540 VA. b c Lc L a, b, c Th part o th chm hown in th hadd ara u a 400MHz PC computr, a 1 bit rolution data acquiition ytm and a 1 bit rolution D/A convrtr board. Both currnt SRF controllr and PLL ytm (Fig. ) ar implmntd in otwar and ar rponibl to gnrat th currnt and voltag rrnc or th currnt and voltag analog controllr. Both data acquiition ytm and digital controllr run at 5kHz rquncy. Th output voltag ( v a, b, c ) and load currnt ( i L a, b, c ) ar hown in Fig. 1 (a), (b) and (c). Dpit o th load currnt THD to b approximatly 100% th THD o th rgulatd and balancd output voltag i l than 4%. (b) Figur 11. Normalizd Powr or 0 and k 0.1 ( co 1 1 ): b k b (a) Paralll convrtr S S, (b) Sri convrtr S S. p L L Fig. 14 (a) how th thr-pha ourc voltag V a, b, c and Fig. 14 (b) how th ourc currnt i a, b,c. Th paralll compnation currnt ( i ca, i,i ) ar hown p cbp cc p in Fig. 14 (c). It can b notd that th ourc currnt ar almot inuoidal and balancd and thir THD il ar approximatly 10%. Dtail o th ourc currnt, paralll compnation currnt and uncompnatd currnt, or pha a, b and c, ar hown in Fig. 15 (a), (b), and (c), rpctivly. Fig Rvita Control & Automação/Vol.16 no. /Abril, Maio Junho 005

8 how output voltag and input currnt o th pha a. Both input currnt and output voltag ar in pha with th input voltag. Th maurd powr actor (co ) i qual to 0,98. Th nutral conductor load currnt and th nutral conductor utility currnt ar hown in Fig. 17 (a) and (b), rpctivly. It i obrvd rom Fig. 17 (b) that th amplitud o th utility nutral currnt ha bn rducd conidrably. Th input voltag ( v a ), th output voltag ( v a ) and th dirnc btwn thm ( v ca ) ar hown in Fig. 18 (a), which how that th output voltag ar in pha with rpct th input voltag. For th load currnt hown in Fig. 1 and th ratio btwn th output and input rm voltag ( V V ) prntd in Fig. 18 (a), th ourc * rrnc currnt i * a,b, c i ca,b,c obtaind rom th SRFbad controllr o Fig., can b n in Fig. 18 (b). * Th quantiti v a, ia, ila and i a (rrnc input currnt) ar hown in Fig. 19 (a), or tandby to backup tranition mod that occur at 0.0. Whn th input powr i out th input witch w i opnd and th input currnt ia drop to zro, but th output voltag v a rmain providing powr to th load. Thu, th PLL ytm orc th UPS to oprat at a ixd rrnc rquncy ( = 77 rad/). Th tranition rom backup to tandby opration mod o th UPS ytm occur at 0.1, a hown in Fig. 19 (b) and (c). Whn th input powr rturn, th PLL ytm ynchroniz th UPS ytm with rpct th utility and th witch w i clod. Thrby, immdiatly th input * currnt ollow th rrnc i. i a a Figur 1. Complt chm o th lin-intractiv ri-paralll UPS ytm. Rvita Control & Automação/Vol.16 no./abril, Maio Junho

9 (a) (b) (c) Figur 1. Output voltag ( v, v, v ), and output currnt ( i, i, i ): (a) Pha a; (b) Pha b; (c) Pha c. a b c La Lb Lc (a) (b) (c) Figur 14. (a) Input voltag ( va, vb, vc ); (b) Input Currnt ( i a, i b, i c ). (c) Paralll compnation currnt ( i ca, i,i ). p cb p cc p (a) (b) (c) Figur 15. Dtail o th currnt: (a) Pha a currnt ( i La, i ca p, i a ); (b) Pha b currnt ( i Lb, ica,i ); p b (c) Pha c currnt ( i Lc, i cc p,i c ). Not that th output voltag i unactd by th tranition rom tandby to backup mod and rom backup to tandby mod. Fig. 19 (d) how th UPS oprating in tandby mod. Both Fig. 18 and 19 wr obtaind rom data acquiition otwar. 6 CONCLUSIONS A thr-pha lin-intractiv UPS ytm topology with activ ri-paralll powr-lin conditioning capabiliti ha bn implmntd and ttd or our-wir ytm. With SRF-bad controllr implmntation, balancd and almot inuoidal input currnt with low THD wr obtaind. Th lvl o both undamntal and harmonic contnt o th utility nutral currnt hav bn rducd 08 Rvita Control & Automação/Vol.16 no. /Abril, Maio Junho 005

10 Figur 16. Pha a output voltag v, and pha a input currnt i. a a (a) Figur 17. Nutral currnt: (a) Load nutral currnt i nl ; (b) Utility nutral currnt i n. (b) (a) (b) Figur 18. (a) Input voltag va, output voltag v a, and compnation voltag v ca ; (b) Sourc rrnc currnt * * * (,i, and i ). conidrably. Th output voltag ar balancd and almot inuoidal with low THD. Th main advantag o th prntd lin-intractiv UPS topology, whn compard to th on-lin topology, which u two cacadd PWM powr convrtr working at ull powr rating, i th mallr powr rating handld by both ri and paralll convrtr during th tandby mod, incraing th icincy o th UPS. Th high ri impdanc and th low paralll impdanc can protct th load againt main tranint. i a b c It ha bn dmontratd that th xprimntally obtaind rult agr with good approximation with th thortically prdictd rult. REFERENCES Gruz, T. M. (1990). A Survy o Nutral Currnt in Thr-Pha Computr Powr Sytm. IEEE Tranaction on Indutry Application, Vol. 6, No. 4, pp Rvita Control & Automação/Vol.16 no./abril, Maio Junho

11 (a) (b) (c) (d) Figur 19. Tranition mod: (a) Standby-Backup tranition mod output voltag v, input currnt i, rrnc input * currnt ia, and output currnt i La ; (b) and (c) Backup-Standby tranition mod; (d) Standby mod. a a Quinn, C. A., Mohan, N. (199). Activ Filtring o Harmonic Currnt in Thr-Pha, Four-Wir Sytm with Thr- Pha and Singl-Pha Non-Linar Load. Procding o th 7th Applid Powr Elctronic Conrnc and Expoition, APEC, pp Quinn, C. A., Mohan, N., Mhta, H. (199). A Four-wir, Currnt- Controlld Convrtr Provid Harmonic Nutralization in Thr-Pha, Four-Wir Sytm. Procding o th 8th Applid Powr Elctronic Conrnc and Expoition, APEC, pp Thoma T., Haddad K., Joó G., Jaaari A. (1996). Prormanc Evaluation o Thr-Pha Thr and Four Wir Activ Filtr. Procding o th 1th Indutry Application Socity Annual Mting, IAS, pp Jon, S. J., Cho, G. H. (1997). A Sri-Paralll Compnatd Unintrruptibl Powr Supply with Sinuoidal Input Currnt and Sinuoidal Output Voltag. Procding o th 8th Powr Elctronic Spcialit Conrnc, PESC, pp Chung, R., Chng, L., Yu, P., Sotudh, R. (1996). Nw Lin- Intractiv UPS Sytm with DSP-Bad Activ Powr- Lin Conditioning. Procding o th 7th Powr Elctronic Spcialit Conrnc, PESC, pp Lin, Y., Joo, G., Linday, J. F. (199). Prormanc Analyi o Paralll-Procing UPS Sytm. Procding o th 8th Applid Powr Elctronic Conrnc and Expoition, APEC, pp Olivira da Silva, S. A.; Donoo-Garcia, P.; Cortizo, P. C.; Sixa, P. F. (001). A thr-pha lin-intractiv UPS ytm implmntation with ri-paralll activ powr-lin conditioning capabiliti. Procding o th 6th Indutry Application Socity Annual Mting, IAS, Vol. 4; pp Kamran, F., Habtlr T. (1995). A Novl On-Lin UPS with Univral Filtring Capabiliti. Procding o th 6th Powr Elctronic Spcialit Conrnc, PESC, pp Rvita Control & Automação/Vol.16 no. /Abril, Maio Junho 005

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