Seminar Design For Test

Transcription

1 Seminar Design For Test ASTRON & IBM Center for Exascale Technology Design and testing challenges in small designs

2 Subjects Transfer B.V. à Altium B.V. Transfer DSW B.V. Challenge Design / Production Domains Design For Excellence Tools and services DFM/DFA Vayo JTAG Live - Buzz A.A.P. Questions

3 Transfer B.V. à Altium B.V. Goorseweg BB Markelo +31(0)

4 Transfer DSW B.V. Barry Berends Goorseweg BB Markelo +31(0)

5 Challenges Most of the designers are focused on the realisation of a PCB and don t want to think about testing designs? The PCB will have a price increase? This PCB will only produced in small amounts? How to get a better test coverage and less errors? Production of the PCB and the producers? Early involvement?

6 Design / Production Domains Designer world different than Producer world Expectation level of designer does not always fit to available skills of producer Designers know their design. Producers know their production processes Producer cannot take responsibility for the design intent!!! Improvements Early involvement of the producer (As early as possible) Making right choices for PCB technology Awareness of design aspects from the producer Awareness of production aspects from the designer Awareness of testing aspects from the designer

7 Design For Excellence - DFx DFA (Assembly) DFM (Manufacturing) DFT (Test) DFC (Cost) DF.

8 Design / Production Copyright 2015 Altium Limited Demo Data & Component Management

9 Breaking the barrier Component Libraries Part Choice Unified Component IEEE boundary-scan

10 PCB Design and Production process Specification PCB Design PCB Layout Design Prototype Small Series (Mass-)production PCB Manufacturing Prototype Small Series (Mass-)production PCB Assembly/Test

11 Life Cycle Cost

12 Schematic Entry Functional decomposition (Block Diagram) Hierarchical Design Multi-Sheet Multi-Channel PCB Design Rules Variants Alternative (Un)Placed

13 Engineering Rule Checks - ERC Schematic diagrams can be checked: Connectivity Buses Harnesses Wires Global power connections Document Net/Bus naming Hierarchy Component naming

14 Design For Test - DFT Accessability Even before PCB Layout has started Test points Boundary Scan Netlist / export BS-Extensions Every I/O on a compliant IC becomes a test point Connect the net to a spare I/O to increase the coverage!!

15 JTAG MAPS Analysis and displays of boundary-scan coverage for Altium Designer.

16 Design For Cost - DFC Live Supplier Links Real time pricing using Active BOM Experiment with Quantity Price Availability 2 Views BOM Components BOM Catalog

17 Design Transfer to PCB Engineering Change Order Differences between Schematic and PCB Nets Components Multi-channel Variant Availability of footprints Supplier libraries Customer libraries Footprint checks

18 PCB Design After Forward Annotation: Netlist synchronization in PCB Editor Design Rule creation Component Placement Floor planning 2D/3D Copper planes Routing Analog RF Digital High-speed

19 Design Rule Check - DRC Electrical Trace and plane clearance Short Circuits Open Connections Routing Trace widths Permitted layers Via sizes Differential Pairs Length Tuning Placement Height Component clearance

20 Design Rule Check (cont.) Manufacturing Bare Board Solder mask Annular ring Hole size Assembly Solder paste Silkscreen Test Test points

21 Design Analysis Typically, most solutions will have you rely on a post process/design afterthought, which requires a physical prototype to verify. During design: Ability for upfront analysis Simulation A/D Signal Integrity Power Distribution Mechanical integration

22 Design Analysis

23 Technical Product Documentation Even with all of the advancements in PCB Design, the documentation process can be inefficient Time-consuming Manual processes are inherently error-prone ECO s can mean the regeneration of the entire documentation package Worst of all, good documentation adds NO VALUE to your design But getting it wrong, it can cost you

24 Production data Design data -> Production data Production data is just a subset of design data Gerber, NC-drill, netlist, Bill of Materials: Excel, Text, CSV, PDF, Formatted by the designer Not always complete or not always clear enough (e.g. missing MPN) Preliminary BOM Variants Improvements: Use templates from Producer Use ODB++ (or IPC-2581) Always deliver MPN Indicator for alternative components Revision control (PDM/PLM) is more than sending a versioned.zip file 3D visualization or even 3D printed mockup

25 Bill of Materials Template Use BOM template from producer Can be used during output generation Streamlines dataflow Prevents incomplete BOM Less work for producer Lower the labor costs More competitive Prevents errors Communicate with supplier about the preferred format Need for structured libraries

26 Testing challenges The PCB is ready and the first proto is on your desk. Validation of the PCB visual Smoke test Measurements / JTAG Boundary-scan without firmware Fixture Production with a bed of nails.

27 JTAG Technologies JTAG Live BuzZ

28 Tools and services What can we do for you?

29 DFM/DFA - Vayo CAD DRC CAM DFM/DFA Component Libraries

30 DRC+ DRC+ check: Test Point DRC+ check: Assembly Interactive result query DRC+ check: Fabrication ltp to TP distance ltp to parts distance ltp to pad distance lvalidate placement process lvalidate reflow/wave process lvalidate rework process lcolor warning level linteractive with PCB layout lreports output Rule management lvalidate Signal lvalidate Drill lvalidate Solder mask/silkscreen... Vayo DRC+ Advanced DRC check lconfigurable parameters luser access level lcustomization service lsupport mainstream EDA systems

31 Examples of PCB Fabrication Defects

32 DFM Expert

33 Examples of Assembly Defects

34 A.A.P ( Authorized Application Provider ) Providing test development services, using JTAG Technologies tools and products.

35 Q & A Any questions?