Extended Boundary Scan Test breaching the analog ban. Marcel Swinnen, teamleader test engineering

Transcription

1 Extended Boundary Scan Test breaching the analog ban Marcel Swinnen, teamleader test engineering

2 2 zero-defect quality impossible to produce zero-defect boards early involvement services (Design for Manufacturing, Design for Test) can help to approach this zero-defect level high-tech industry wants a delivery quality < 1000 ppm (board level)

3 how to approach this? reduce possibilities on assembly failures (Design for Manufacturing) maximize the test coverage in the most economical way (Design for Test) 3

4 test methods only used to localize supply chain and production faults: presence polarity value solder no design verification 4

5 inspection methods 3D AOI X-Ray 5

6 structural test methods in circuit test flying probe Test boundary scan test test method cost runtime repair* remark ICT larger volumes FPT low volume 6 BST digital * automatically generated repair ticket

7 functional test methods specific test setup per product test method cost runtime repair* remark FT high skills * automatically generated repair ticket 7

8 boundary scan history 1985 : first specifications 1990 : standardised as IEEE Std : JTAG Technologies 8

9 JTAG standards IEEE : standard IEEE : analog (not used) IEEE : high speed signals IEEE : less interface signals, more processor debugging IEEE 1532 : programming and configuring of programmable integrated circuits IEEE 1687 : drive and control of instruments inside a semiconductor device 9

10 boundary scan is gaining importance due to: more dense designs (less space for test points) more high speed signals (test points difficult) 10

11 advantages boundary scan test automatic program generation fast diagnosis (point to point tests) cluster tests bus interface (I 2 C, SPI, CAN, ) all RAM types (DDR1, DDR2, ) debug interface (hardware and software debugging) flash programming processor programming PLD and FPGA programming 11

12 limitation boundary scan test only applicable to digital designs NEW STRUCTURAL TEST SOLUTION: Extended Boundary Scan Test (EBS Test) 12

13 extended boundary scan test possible to test mixed signal or even only analog increase of test coverage (maximized via early involvement Design for Test) quality improvement < 1000 ppm or even < 700 ppm less test steps less software development cost total NRE cost reduction for hardware test setup 13

14 EBS Test implementation test fixture equipped with 2 x JT 5705/FXT mixed signal JTAG test interface module carrier board 1 spare position 1 oscilloscope 14

15 EBS Test specifications 4 x test access ports IEEE 1149.x compliant 128 x I/O channels 64 of the 128 I/O are multifunctional: digital input or output (1V 3.6V) 5V tolerant analog input or output (0.00V 30.00V, ± 15.00V) extra function (spare position) pull-up resistor pull-down resistor 15

16 EBS Test specifications 16 x analog input or output channels analog range 0.00V 30.00V or ± 15.00V 32 x frequency counter channels, range MHz 2 x pulse width measurement channels, range ns 2 x frequency generator channels, range MHz 8 x oscilloscope channels 16

17 JT 5705/FXT mixed signal JTAG test interface 17 two compliant test access ports TCK up to 15 MHz 64 I/O channels 8 analog input or output channels (taken from channels 57-64) analog accuracy ± 0.7 % of full scale analog range 0.00V 30.00V or ± 15.00V frequency measurements, range MHz (channels 33-48) pulse width counter, range ns (channel 35 only) frequency generator, range MHz (channel 33 only)

18 conclusions test strategy improvement less test steps quality improvement < 1000 ppm or even < 700 ppm significant lower NRE and repair cost (automatically generated repair ticket) 18

19 questions 19 Marcel Swinnen teamleader test engineering E mswinnen@tbp.nl M +31 (0)