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1 TheFloatingPointAdderoftheAMDAthlonTM ofregister-transferlogicwithacl2: ACaseStudyinFormalVerication DavidM.Russino Processor AdvancedMicroDevices,Inc. Abstract.Asanalternativetocommercialhardwaredescriptionlan- Austin,TX abasisforformalverication.wedescribeamechanicalproofsystem guages,amd1hasdevelopedanrtllanguageformicroprocessorde- signsthatissimpleenoughtoadmitaclearsemanticdenition,providing fordesignsrepresentedinthislanguage,consistingofatranslatortothe ACL2logicalprogramminglanguageandamethodologyforverifying propertiesoftheresultingprogramsusingtheacl2prover.asanillustration,wepresentaproofofieeecomplianceoftheoating-point 1Introduction adderoftheamdathlonprocessor. TheformalhardwarevericationeortatAMDhasemphasizedtheoremprovingusingACL2[3],andhasfocusedontheelementaryoating-pointoperations. andthecorrespondingcircuitsoftheamdathlonprocessor[7],whichwere Oneofthechallengesofourearlierworkwastoconstructaccurateformalmodels erationsoftheamd-k5processor[4,6],whichwereimplementedinmicrocode, ofthetargetedcircuitdesigns.theseincludedthedivisionandsquarerootop- understandingofthesemanticsofthesourcelanguages. totranslatethedesignsbyhandintothelogicofacl2,relyingonanunrigorous initiallymodeledincforthepurposeoftesting.inbothcases,wewererequired setofverilogwithanunderlyingcycle-basedexecutionmodel,thislanguageis developedspecicallyforthatpurpose.essentiallyasmallsynthesizablesubdatedattheregister-transferlevelinahardwaredescriptionlanguagethatwas simpleenoughtoadmitaclearsemanticdenition,providingabasisforformal Ultimately,however,theentiredesignoftheAthlonwasspeciedandvali- analysisandverication.thus,wehavedevelopedaschemeforautomatically translatingrtlcodeintotheacl2logic[8],therebyeliminatinganimportant possiblesourceoferror.usingthisscheme,wehavemechanicallyveriedanumberofoperationsoftheathlonoating-pointunitattheregister-transferlevel, 1AMD,theAMDlogoandcombinationsthereof,AMD-K5,andAMDAthlonare trademarksofadvancedmicrodevices,inc.

2 includingalladdition,subtraction,multiplication,andcomparisoninstructions. oftheathlonoating-pointadder,astate-of-the-artadderwithleadingone predictionlogic[5]. Asanillustrationofourmethods,thispaperdescribestheproofofcorrectness ACL2Version2.6.Manyoftheincludedlemmasaredocumentedin[6]and[7], opmentandformalizationofageneraltheoryofoating-pointarithmeticandits bit-levelimplementation.theresultingacl2library[9]isavailableasapartof andsomeofthedetailsoftheformalizationaredescribedin[8].insections2 Muchoftheeortinvolvedintheprojectsmentionedabovewasinthedevel- thepresentproject. and3below,wepresentseveralextensionsofthelibrarythatwererequiredfor stipulatedinstandard [1]: reportedhereisaformulationofthemainrequirementforieeecompliance,as applyingitinarigorousderivationofthecorrectnessoftheadder.thetheorem InSections4and5,wedemonstratetheutilityofouroating-pointtheory, resultcorrecttoinniteprecisionandwithunboundedrange,andthen roundedthatresult... [Addition]shallbeperformedasifitrstproducedanintermediate patibility,asdenedin[2].however,sinceourmainpurposehereistodescribe Infact,wehavealsoveriedthattheadderdesignconformstootheraspects ofthebehaviorprescribedby[1]pertainingtooverow,underow,andother exceptionalconditions,aswellastherenementsnecessaryforpentiumcom- ofacl2,basedontheacl2translationofthertlcode,andtheirproofshave avericationmethodologyratherthantopresentthedetailsofaspecicproof, thesesecondaryresultshavebeenomittedfromthisreport. wedescribeboththetranslationschemeandourproofmethodology,usingthe allbeenmechanicallycheckedwiththeacl2prover.forthispurpose,wehave developedaproofmethodologybasedonsomefeaturesofacl2.insection5, Allofourtheoremshavebeenformallyencodedaspropositionsinthelogic isstilluncommoninthecomputerindustry,mainlybecauseoftheeortthat adderasanillustration. time,whichwasdividedapproximatelyequallybetweenderivingtheinformal itentails.theworkreportedhere,includingthedevelopmentofthetranslator andotherreusablemachinery,consumedsometwentyweeksoftheauthor's Theuseofmechanicaltheoremprovinginthevalidationofhardwaredesigns proofsandcheckingthemmechanically.however,ashasbeennotedbefore, case,ouranalysisoftheadderexposedalogicalerrorthatwouldhave,under thecostofformalmethodsisfaroutweighedbyitspotentialbenets.inthis certainconditions,resultedinreversingthesignofthesumofzeroandan arbitrarynonzeronumber.thisawhadalreadysurvivedextensivetestingand wasunlikelytobedetectedbyconventionalvalidationmethods.itwaseasily repairedinthertl,butcouldhavebeenveryexpensiveifnotdiscovereduntil later.

3 lengthnwiththenaturalnumbersintherange0x<2n.accordingly,we basisofourtheoryofoating-pointarithmetic.weidentifythebitvectorsof 2BitVectorsandLogicalOperations BitvectorsarethefundamentaldatatypeofourRTLlanguageaswellasthe whilethesliceofxfromtheithbitdownthroughthejthisgivenby denethekthbitofxtobex[k]=rem(bx=2kc;2); Thestandardbinarylogicaloperations,x&y,x y,andx^y,aredened recursively,e.g., x[i:j]=brem(x;2i+1)=2jc: Ifxisabit-vectoroflengthn,thenitscomplementwithrespecttonis x&y=8<:0 2(bx=2c&by=2c)+1ifxandyarebothodd otherwise: ifx=0 Followingconventionalnotation,weshallusetheabbreviation ~x[i:j]=comp1(x[i:j];i?j+1): comp1(x;n)=2n?x?1: library[9].manyofthebasiclemmasaredocumentedin[7]and[8].hereweshall pointaddition,inordertoillustrateourmethodsofproof,especiallytheuseof presentseveralofthemorespecializedlibrarylemmasthatpertaintooating- mathematicalinduction. ThepropertiesofthesefunctionsarecollectedintheACL2oating-point whichisreadilyprovedbyinductionbasedontherecursivedenitionsofthe motivatedbytheobservationthatwhilethetimerequiredforintegeraddition tion2maybeexecutedinconstanttime.thus,forexample,thefollowingresult, increaseslogarithmicallywiththeinputs,thelogicaloperationsdenedinsec- Thedesignoftheadderinvolvesseveralcomputationaltechniquesthatare Lemma1.Forallx;y;z2N, two-inputadder: logicaloperations,providesanecientmethodforaddingthreevectorsusinga resultofasubtractiontobenormalizedeciently(intheeventofcancellation) byperformingtherequiredleftshiftinadvanceofthesubtractionitself.this Amoreinterestingoptimization,knownasleadingoneprediction,allowsthe x+y+z=(x^y^z)+2((x&y)j(x&z)j(y&z)): requiresapredictionofthehighestindexatwhicha1occursinthedierence.

4 Althoughtheprecisecomputationofthisindexappearsgenerallytobeascomplexasthesubtractionitself,ausefulapproximatesolutionmaybeobtained apositiveintegersuchthatexpo(a?b)iseitherexpo()orexpo()?1.we andexpo(a)=e.weshallcompute,inconstanttime(independentofaandb), greatestintegersatisfying2expo(x)jxj.letaandbbeintegerswith0<b<a morequickly. beginbydeningafunctionthatreturnsthedesiredexponent=expo().if Foranyx2Z,expo(x)willdenotetheindexoftheleadingoneofx,i.e.,the Ifa[m:0]=2mandb[m:0]=2m?1,then=0.Otherwise,isthelargest theremainingcase,e?1expo(b)e,maybecomputedasfollows:first, letmbethelargestindexsuchthata[m]>b[m],i.e.,a[m]=1andb[m]=0. indexsuchthatmanda[?1]b[?1]. expo(b)<e?1,thena=2<a?baandwehavethetrivialsolution=e.in Lemma2.Leta;b;n2N.Foralld2Zandk2N,letck=a[k]?b[k]and inwhichisrepresentedasarecursivefunction: Thecorrectnessofthiscomputationisestablishedbythefollowinglemma, Ifa<2n,b<2n,anda6=b,then(a;b;0;n)?1expo(a?b)(a;b;0;n). (a;b;d;k)=8><>: (a;b;d;k?1) 0 (a;b;ck?1;k?1)ifk>0andd=0 k ifk>0andd6=0andd=?ck?1 Proof:Itiseasytoshow,byinductiononk,that(a;b;d;k)=(b;a;?d;k). ifk=0 ifk>0andd6=0andd6=?ck?1: andb[k?1:0]=b0[k?1:0],then(a;b;d;k)=(a0;b0;d;k). Therefore,wemayassumethata>b.Notealsothatifa[k?1:0]=a0[k?1:0] Weproceedbyinduction,assumingn>1. Inthecasen=1,wehavea=1,b=0,and byinductivehypothesis, Supposerstthatcn?1=0.Leta0=a[n?2:0]andb0=b[n?2:0].Then expo(a?b)=0=(a;b;1;0)=(a;b;0;1): Buta?b=a0?b0,henceexpo(a?b)=expo(a0?b0),and (a;b;0;n)=(a;b;cn?1;n?1)=(a;b;0;n?1)=(a0;b0;0;n?1): (a0;b0;0;n?1)?1expo(a0?b0)(a0;b0;0;n?1): anda[n?2]=b[n?1]=0.itfollowsthat Nowsupposethatcn?1=1andcn?2=?1.Thena[n?1]=b[n?2]=1 Leta0=a?2n?2andb0=b?2n?2.Then 2n?1+2n?2>a2n?1>b2n?2: 2n?1>a02n?2>b00:

5 andexpo(a?b)=expo(a0?b0).but Onceagain,(a0;b0;0;n?1)?1expo(a0?b0)(a0;b0;0;n?1) Intheremainingcase,cn?1=1andcn?20.Now (a;b;0;n)=(a;b;1;n?1)=(a;b;1;n?2)=(a0;b0;1;n?2) 2n>aa?b2n?1?b[n?3:0]>2n?1?2n?2=2n?2; =(a0;b0;0;n?1): hencen?2expo(a?b)n?1,while expo()=(a;b;0;e+1).first,wehandletherelativelysimplecaseexpo(b)< expo(a): Thus,werequireageneralmethodforcomputinganumbersuchthat (a;b;0;n)=(a;b;1;n?1)=n?1:2 Then>0andexpo()?1expo(a?b)expo(). Lemma3.Leta;b2Nwithexpo(b)<expo(a)=e,andlet Proof:Since =2a[e?1:0]j~(2b)[e:0]: itwillsucetoshow,accordingtolemma2,that (a;b;0;e+1)=(a;b;1;e)=(a[e?1:0];b;1;e); Usinginduction,weshallprovethefollowingmoregeneralresult:Foralla;b;k2 N,ifa<2kandb<2k,then (a[e?1:0];b;1;e)=expo(): Ifk=0,thena=b=0and expo(2aj~(2b)[k:0])=expo(0j1)=0=(a;b;1;k): (a;b;1;k)=expo(2aj~(2b)[k:0]): Supposek>0.Ifa[k?1]=0andb[k?1]=1,then (a;b;1;k)=(a;b;1;k?1) =(a;b[k?2:0];1;k?1) =expo(2aj~(2b)[k:0]): =expo(2aj~(2b?2k)[k?1:0]) =(a;b?2k?1;1;k?1)

6 Sinceexpo(2aj~(2b)[k:0])=max(expo(2a);expo(~(2b)[k:0]))k; Intheremainingcase,(a;b;1;k)=kandeithera[k?1]=1orb[k?1]=0. weneedonlyshowmax(expo(2a);expo(~(2b)[k:0]))k:butifa[k?1]=1, then2a22k?1=2k,andifb[k?1]=0,thenb<2k?1,whichimplies Lemma4.Leta;b2Nsuchthata6=bandexpo(a)=expo(b)=e>1.Let ~(2b)[k:0]=2k+1?2b?1>2k?1.2 Thenextlemmacoversthemorecomplicatedcaseexpo(b)=expo(a): z=~(aj~b[e:0])[e:0]; g=a&~b[e:0]; t=a^~b[e:0]; 0=(t[e:2]&g[e?1:1]&~z[e?2:0])j (~t[e:2]&z[e?1:1]&~z[e?2:0])j and (t[e:2]&z[e?1:1]&~g[e?2:0])j (~t[e:2]&g[e?1:1]&~g[e?2:0]); Then>0andexpo()?1expo(a?b)expo(). Proof:LetckandbedenedasinLemma2.Sincece=0, =20+1?t[0]: Infact,weshallderivethefollowingmoregeneralresult:Foralln2N,ifne?1 andthereforeitwillsucetoshowthat6=0and(a;b;ce?1;e?1)=expo(). anda[n:0]6=b[n:0],then[n:0]6=0and (a;b;0;e+1)=(a;b;0;e)=(a;b;ce?1;e?1); Forthecasen=0,notethata[0]6=b[0]implies[0:0]=1,henceexpo([0: 0])=0,while(a;b;c0;0)=(a;b;?c0;0)=0. expo([n:0])=(a;b;cn;n)ifcn=0orcn+1=0 Weproceedbyinduction.Let0<ne?1.Notethatfor0ke?2, (a;b;?cn;n)otherwise: 0[k]=1,t[k+2]=1andg[k+1]=1andz[k]=0;or t[k+2]=0andg[k+1]=1andg[k]=0: t[k+2]=1andz[k+1]=1andg[k]=0;or t[k+2]=0andz[k+1]=1andz[k]=0;or

7 For0ke, Itfollowsthatfor0ke?2, t[k]=1,ck=0;g[k]=1,ck=1;andz[k]=1,ck=?1: 0[k]=1,ck+16=0;and Butsincen>0,[n]=0[n?1],andsincene?1, ifck+26=0thenck6=ck+1: ifck+2=0thenck6=?ck+1;and [n]=1,cn6=0;and Ifcn=0,then[n]=0,hence[n:0]=[n?1:0]6=0and ifcn+1=0thencn?16=?cn;and expo([n:0])=expo([n?1:0])=(a;b;cn?1;n?1)=(a;b;cn;n): ifcn+16=0thencn?16=cn: [n:0]=[n?1:0]6=0and expo([n:0])=expo([n?1:0])=(a;b;?cn?1;n?1)=(a;b;?cn?1;n) Next,supposecn6=0andcn+1=0.Ifcn?1=?cn,then[n]=0,hence Butifcn?16=?cn,then[n]=1and =(a;b;cn;n): [n?1:0]6=0,and Finally,supposecn6=0andcn+16=0.Ifcn?1=cn,then[n]=0,[n:0]= expo([n:0])=n=(a;b;cn;n): Butifcn?16=cn,then[n]=1and expo([n:0])=expo([n?1:0])=(a;b;?cn?1;n?1)=(a;b;?cn?1;n) =(a;b;?cn;n): thetrailingoneofasumordierence,i.e.,theleastindexatwhicha1occurs. Thefollowinglemmaprovidesamethodforcomputing,inconstanttime,an Finally,forthepurposeofecientrounding,itwillalsobeusefultopredict expo([n:0])=n=(a;b;?cn;n):2 incrementingthesumofoneoperandandthecomplementoftheother.thus,the twocasesc=0andc=1ofthelemmacorrespondtoadditionandsubtraction, twogivenoperands.asusual,subtractionisimplementedthroughaddition,by respectively.weomittheproof,whichissimilartothatoflemma4. integerthathaspreciselythesametrailingoneasthesumordierenceof

8 Lemma5.Leta;b;c;n;k2Nwitha<2n,b<2n,k<n,andc<2.Let =~(a^b)[n?1:0]ifc=0 =2(ajb)ifc=0 2(a&b)ifc=1, ifc=1, and Then (a+b+c)[k:0]=0,[k:0]=0: =~(^)[n:0]: 3FloatingPointNumbersandRounding Floatingpointrepresentationofrationalnumbersisbasedontheobservation thateverynonzerorationalxadmitsauniquefactorization, andexpo(x)2z(theexponentofx). wheresgn(x)2f1;?1g(thesignofx),1sig(x)<2(thesignicandofx), Aoatingpointrepresentationofxisabitvectorconsistingofthreeelds, x=sgn(x)sig(x)2expo(x); andexpo(x),respectively.ifzisabitvectoroflength++1,thenthe positiveintegers=(;),representingthenumberofbitsallocatedtosig(x) e=z[+?1:],andm=z[?1:0],respectively.therationalnumber correspondingtosgn(x),sig(x),andexpo(x).aoatingpointformatisapairof sign,exponent,andsignicandeldsofzwithrespecttoares=z[+], representedbyzisgivenby thensgn(x)=(?1)s,sig(x)=2?1m,andexpo(x)=e?(2?1?1).note Ifz[?1]=1,thenzisanormal-encoding.Inthiscase,ifx=decode(z;), thattheexponenteldisbiasedinordertoprovideforanexponentrange decode(z;)=(?1)sm2e?2?1?+2: 1?2?1expo(x)2?1. shownthatxisrepresentablewithrespectto,i.e.,thereexistsz2nsuchthat x=decode(z;),ixis-exactand?2?1+1expo(x)2?1. Letx2Qandn2N.Thenxisn-exactisig(x)2n?12Z.Itiseasily format: single,double,andextendedprecisionasspeciedbyieee,andalargerinternal TheAMDAthlonoating-pointunitsupportsfourformats,correspondingto (24;7),(53;10),(64;15),and(68;18).

9 Inourdiscussionoftheadder,oatingpointnumberswillalwaysberepresented correspondingtoanarbitraryrationalxandadegreeofprecisionn2n.the intheinternal(68;18)format.ifzisabitvectoroflength87,thenweshall mostbasicroundingmode,truncation(roundtoward0),isdenedby abbreviatedecode(z;(68;18))as^z. AroundingmodeisafunctionMthatcomputesann-exactnumberM(x;n) Thus,trunc(x;n)isthen-exactnumberythatisclosesttoxandsatises jyjjxj.similarly,roundingawayfrom0isgivenby trunc(x;n)=sgn(x)b2n?1sig(x)c2expo(x)?n+1: (roundtothenearestn-exactnumber,withambiguitiesresolvedbyselecting andthethreeothermodesdiscussedin[6]aredenedsimplyintermsofthose two:inf(x;n)(roundtoward1),minf(x;n)(roundtoward?1),andnear(x;n) away(x;n)=sgn(x)d2n?1sig(x)e2expo(x)?n+1; (n?1)-exactvalues. IfMisanyroundingmode,2N,andx2Q,thenweshallwrite minf.weshallrefertotheseasieeeroundingmodes. ThemodesthataresupportedbytheIEEEstandardaretrunc,near,inf,and Asshowedin[7],anumbercanberoundedaccordingtoanyIEEErounding rnd(x;m;)=m(x;): ifxisapositiveintegerwithexpo(x)=e,thentheroundingconstantforx modebyaddinganappropriateconstantandtruncatingthesum.inparticular, correspondingtoagivenmodemanddegreeofprecisionis Lemma6.LetMbeanIEEEroundingmode,2Z,>1,andx2Nwith C(e;M;)=8<:2e?+1?1ifM=inf 0 ifm=truncorm=minf. ifm=near expo(x).then where=?1ifm=nearandxis(+1)-exactbutnot-exact rnd(x;m;)=trunc(x+c(expo(x);m;);); pointaddition:ifx2q,n2n,andn>1,then Anadditionalroundingmodeiscriticaltotheimplementationofoating- otherwise. tobits,accordingtoanyieeeroundingmode,canalwaysberecoveredfrom sticky(x;n)=x Thesignicanceofthisoperationisthattheresultofroundinganumberx trunc(x;n?1)+sgn(x)2expo(x)+1?notherwise: ifxis(n?1)-exact sticky(x;+2):

10 n+2,then Lemma7.LetMbeanIEEEroundingmode,2N,n2N,andx2Q.If followtrivially.first,notethatsincesticky(x;n)isn-exactbutnot(n?1)-exact, Proof:Wemayassumethatx>0andxisnot(n?1)-exact;theothercases trunc(sticky(x;n);n?1)=sticky(x;n)?2expo(sticky(x;n))?(n?1) rnd(x;m;)=rnd(sticky(x;n);m;): Thus,foranym<n, =sticky(x;n)?2expo(x)+1?n trunc(sticky(x;n);m)=trunc(trunc(x;n?1);m)=trunc(x;m); =trunc(x;n?1): andthecorrespondingresultforawaymaybesimilarlyderived. showthatiftrunc(x;+1)=trunc(y;+1)andaway(x;+1)=away(y;+1), thennear(x;)=near(y;).wemayassumexy.supposenear(x;)6= near(y;).thenforsome(+1)-exacta,xay.butthisimpliesx= a,forotherwisetrunc(x;+1)x<atrunc(y;+1).similarly,y= ThisdisposesofallbutthecaseM=near.Forthislastcase,itsucesto contradiction.2 a,forotherwiseaway(x;+1)a<yaway(y;+1).thus,x=y,a k+expo(x)?expo(y),andk00=k+expo(x+y)?expo(y).ifk>1,k0>1, k00>1,andxis(k0?1)-exact,then Lemma8.Letx;y2Qsuchthaty6=0andx+y6=0.Letk2Z,k0= Thefollowingpropertyisessentialforcomputingaroundedsumordierence: Thus, Proof:Sincexis(k0?1)-exact,2k?2?expo(y)x=2(k0?1)?1?expo(x)x2Z. x+sticky(y;k)=sticky(x+y;k00): yis(k?1)-exact,2k?2?expo(y)y2z,2k?2?expo(y)y+2k?2?expo(y)x2z Ifyis(k?1)-exact,then,2k00?2?expo(x+y)(x+y)2Z x+sticky(y;k)=x+y=sticky(x+y;k00):,x+yis(k00?1)-exact: k,k0,andk00asdenedabove,andundertheweakerassumptionsthatk>0, Thus,wemayassumethatyisnot(k?1)-exact.Nowin[6]itwasproved,with k0>0,k00>0,andxisk0-exact,that x+trunc(y;k)=trunc(x+y;k00)ifsgn(x+y)=sgn(y) away(x+y;k00)ifsgn(x+y)6=sgn(y):

11 Hence,ifsgn(x+y)=sgn(y),then x+sticky(y;k)=x+trunc(y;k?1)+sgn(y)2expo(y)+1?k Ontheotherhand,ifsgn(x+y)6=sgn(y),then =trunc(x+y;k00?1)+sgn(x+y)2expo(x+y)+1?k00 x+sticky(y;k)=x+trunc(y;k?1)+sgn(y)2expo(y)+1?k =sticky(x+y;k00): =away(x+y;k00?1)?sgn(x+y)2expo(x+y)+1?k00 =trunc(x+y;k00?1)+sgn(x+y)2expo(x+y)+1?k00 4DescriptionoftheAdder =sticky(x+y;k00):2 preciselyin[8],aprograminthislanguageconsistsmainlyofinputdeclarations, combinationalassignments,andsequentialassignments,whichhavetheforms RTLlanguageasthecircuitdescriptionA,displayedinFigs.1{6.Asdened AsimpliedversionoftheAthlonoating-pointadderisrepresentedintheAMD inputs[k:0]; s[k:0]=e; (1) and s[k:0]<=e; (3) (2) thethreecontexts(1),(2),and(3),andiscalledaninput,awire,oraregister, andeisanexpressionconstructedfromsignalsandstandardlogicalconnectives. respectively,wherek2n,sisasignalrepresentingabitvectoroflengthk+1, Eachsignalsoccurringanywhereinadescriptionmustappearinexactlyoneof andisthenalsocalledanoutput.notethatthecircuitahasveinputs,a, accordingly.anysignalmayalsooccurinanoutputdeclaration, b,op,rc,pc(fig.1),andoneoutput,r(fig.2),whichhappenstobeawire (Fig.6). outputs[k:0]; (4) Acircuitdescriptionmayalsocontainconstantdenitionsoftheform ingtothedenitionoffsub0(fig.1),thevaluecomputedfortheassignment sentingasetofconstants.generalizedconstantexpression.forexample,accord- whererisanidentierandciseitheranumericalconstantorapatternrepre- `definerc

12 siscalledadirectsupporterofs.ifsisawireands0isanysignal,thensdepends statementtosub(fig.2)is1wheneverthevalueofthe11-bitvectoropmatches thestring x10x. ons0is0isadirectsupportereitherofsorofsomewireonwhichsdepends. Itisasyntacticrequirementofthelanguagethatnowiredependsonitself. AnysignalthatoccursinthedeningexpresssionEfora(non-input)signal combinationalcircuitareparticularlysimple:thebehaviorofeachoutputmay n-cyclesimplepipelineifeachofitssignalssmaybeassignedacyclenumber generalclassofcircuits,whichwedeneasfollows:acircuitdescriptionisan bedescribedasafunctionoftheinputs.infact,thesameistrueofamore Acombinationalcircuitisonethatisfreeofregisters.Thesemanticsofa (1)ifsisaninput,then (2)ifsisawire,then (3)ifsisaregister,then (s)2f1;:::;ngsuchthat (4)ifsisanoutput,then (s0)= (s)=1; (s0)=(s)foreachdirectsupporters0ofs; functionwitheachsignal.thisfunctionreturnsasequenceofvalues,interpreted In[8],wepresentageneralsemanticdenitionoftheRTLlanguage.associatinga (s)=n.(s)?1foreachdirectsupporters0ofs; oncycle1.moreover,thisfunctionaldependenceoninputsisthesameasforthe thevalueofeachsignalsoncycle sequencesofvaluesoftheinputsignals.itisshownthatforasimplepipeline, asthevaluesassumedbythesignalonsuccessivecycles,foragivensetof sequentialassignment(3)bythecorrespondingcombinationalassignment(2) combinationalcircuitthatresultsfromcollapsingthepipelinebyreplacingeach (s)isdeterminedbythevaluesoftheinputs simplepipeline.inordertosimplifyouranalysisofthecircuitaswellasthis theoriginalasfollows: presentation,thecircuitdescriptionalistedbelowwasderivedbymodifying TheactualRTLmodeloftheAMDAthlonoating-pointadderisa4-cycle (2)Allcodepertainingtofunctionsotherthanadditionandsubtraction,which (1)Allsequentialassignmentshavebeenreplacedwithcombinationalassignments,yieldinganequivalentcombinationalcircuit. (3)Allcodepertainingtothereportingofexceptionalconditions,including areperformedbythesamehardware,hasbeendeleted. (5)Signalnameshavebeenchangedtopromotereadability. (4)Theremainingcodehasbeensimpliedbyeliminatingsignalsandcombining assignmentswhenpossible. overowandunderow,hasbeendeleted. TheresultingcircuitAisshorterandsimplerthantheoriginal,andbearsless resemblancetotheintendedgate-levelimplementation,butthetwomayeasily beshowntobesemanticallyequivalentwithrespecttothecomputationofsums anddierences.infact,thisequivalencehasbeenestablishedmechanicallyas discussedinsection6.

13 //Definitions modulea; `defineinfinity //***************************************************************************** `defineunsupported `definesnan `definenormal `definezero `defineqnan //CLASSDEFINITIONS `definedenorm 3'b000 `definemmx 3'b010 3'b011 3'b100 3'b101 3'b001 //OPCODEDEFINITIONS// `definefadd11'b1100xx0x000 `definefaddu11'b `definefsub011'b x10x 3'b111 3'b110 `definefsub111'b x10x `definefsub211'b x10x `definefsubu11'b `definefaddt6411'b `definefsubt6411'b `definefaddt6811'b `definefsubt6811'b //PRECISIONDEFINITIONS// `definerc_rn2'b00//roundtonearest `definepc_642'b10//double `definepc_802'b11//extended `definepc_80r2'b01//extended(reserved) //ROUNDINGDEFINITIONS// `definepc_322'b00//single `definerc_rz2'b11//truncate `definerc_rm2'b01//roundtominusinfinity `definerc_rp2'b10//roundtoplusinfinity inputb[89:0]; inputop[10:0]; //Parameters inputrc[1:0]; //***************************************************************************** inputpc[1:0]; //INPUTS// inputa[89:0]; //firstoperand //opcode //secondoperand //roundingcontrol //precisioncontrol Fig.1.CircuitA

14 //OUTPUT// outputr[89:0]; //OPERANDFIELDS// mana[67:0]=a[67:0];manb[67:0]=b[67:0]; //sumordifference azero=(classa[2:0]==`zero);bzero=(classb[2:0]==`zero); classa[2:0]=a[89:87];classb[2:0]=b[89:87]; signa=a[86];signb=b[86]; expa[17:0]=a[85:68];expb[17:0]=b[85:68];//exponent //significand sub=casex(op[10:0]) ext_op=(op==`faddt64) (op==`fsubt64); //OPERATION// int_op=(op==`faddt68) (op==`fsubt68); //class `FSUB0,`FSUB1,`FSUB2,`FSUBU,`FSUBT68,`FSUBT64:1'b1; rc_minf=(rc[1:0]==`rc_rm)&~int_op; //ROUNDINGCONTROL// rc_near=(rc[1:0]==`rc_rn) int_op; esub=sub^signa^signb;//effectivesubtraction endcase; default:1'b0; rc_inf=(rc[1:0]==`rc_rp)&~int_op; //roundtonearest //roundtominusinfinity pc_80=(((pc==`pc_80) (pc==`pc_80r))&~int_op) ext_op;//extended pc_64=(pc==`pc_64)&~ext_op&~int_op; //PRECISIONCONTROL// pc_32=(pc==`pc_32)&~ext_op&~int_op; rc_trunc=(rc[1:0]==`rc_rz)&~int_op;//truncate //roundtoplusinfinity pc_87=int_op; //FirstCycle //internal //double //single //******************************************************************************** overshift=(swap&( diffneg[17:7])) (~swap&( diffpos[17:7])) rsa[6:0]=swap?diffneg[6:0]:diffpos[6:0]; diffneg[17:0]=expb[17:0]+~expa[17:0]+18'b1; expl[17:0]=bzero (~azero&~swap)?expa:expb; swap=~diffpos[18]; diffpos[18:0]={1'b0,expa[17:0]}+{1'b0,~expb[17:0]}+19'b1; //SELECTCLOSEORFARPATH// swap_close=~(expa[0]^expa[1]^expb[1]); shift_close=expa[0]^expb[0]; //CLOSEPATH// ina_shift_close[68:0]=shift_close?{1'b0,mana[67:0]}:{mana[67:0],1'b0}; far=~esub azero bzero overshift ( rsa[6:1]); (rsa[6]&(( rsa[5:3]) (&rsa[2:1]))); inb_shift_close[68:0]=shift_close?{1'b0,manb[67:0]}:{manb[67:0],1'b0}; Fig.2.CircuitA(continued)

15 inb_swap_close[68:0]=(shift_close&swap_close)? ina_swap_close[68:0]=(shift_close&swap_close)? lop0[68:0]={mana[66:0],2'b0} {1'b0,~manb[66:0],1'b1}; lop1_t[67:0]=mana[67:0]^~manb[67:0]; lop1_g[67:0]=mana[67:0]&~manb[67:0]; lop1_z[67:0]=~(mana[67:0] ~manb[67:0]); {manb[67:0],1'b0}:{mana[67:0],1'b0}; lop1[67:0]={1'b0, (lop1_t[67:2]&lop1_g[66:1]&~lop1_z[65:0]) ina_shift_close[68:0]:inb_shift_close[68:0]; lop2[68:0]={manb[66:0],2'b0} {1'b0,~mana[66:0],1'b1}; lop[68:0]=shift_close?(swap_close?lop2[68:0]:lop0[68:0]):{lop1[67:0],1'b0}; found=1'b0; ~lop1_t[0]}; (~lop1_t[67:2]&lop1_g[66:1]&~lop1_g[65:0]), (lop1_t[67:2]&lop1_z[66:1]&~lop1_g[65:0]) (~lop1_t[67:2]&lop1_z[66:1]&~lop1_z[65:0]) for(i=68;i>=0;i=i-1) if(lop[i]&~found) begin ina_far[67:0]=azero (swap&~bzero)?manb[67:0]:mana[67:0]; //FARPATH// rshiftin_far[67:0]=swap?mana[67:0]:manb[67:0]; end lsa[6:0]=7'h44-i[6:0]; found=1'b1; //SecondCycle //*********************************************************************************** //PREDICTEXPONENTOFRESULT// ina_add[70:0]=far?{ina_far[67:0],3'b0}:{ina_close[68:0],2'b0}; lshift[17:0]=far?(esub?18'h3ffff:18'b0):~{11'b0,lsa[6:0]}; //ALIGNOPERANDS// ina_close[68:0]=~shift_close&(mana<manb)?inb_swap_close[68:0]<<lsa[6:0]: inb_close[68:0]=~shift_close&(mana<manb)?ina_swap_close[68:0]<<lsa[6:0]: exp[17:0]=expl[17:0]+lshift[17:0]; ina_swap_close[68:0]<<lsa[6:0]; sticky_far=~(azero bzero)&(overshift ( sticky_t[124:58])); inb_far[70:0]={rshiftout_far[69:0],sticky_far}; inb_add_nocomp[70:0]=far azero bzero?inb_far[70:0]:{inb_close[68:0],2'b0}; rshiftout_far[69:0]=overshift azero bzero? sticky_t[194:0]={rshiftin_far[67:0],127'b0}>>rsa[6:0]; 70'b0:{rshiftin_far[67:0],2'b0}>>rsa[6:0]; inb_swap_close[68:0]<<lsa[6:0]; inb_add[70:0]=esub?~inb_add_nocomp[70:0]:inb_add_nocomp[70:0]; Fig.3.CircuitA(continued)

16 abequal=esub&(mana==manb)&(expa==expb); //DETERMINESIGNOFRESULT// sign_tmp=swap (~far&~shift_close&(mana<manb))?signb^sub:signa; sign_reg=((~azero&~bzero&~abequal&sign_tmp) (~azero&~bzero&abequal&rc_neg) //COMPUTEROUNDINGCONSTANT// (azero&~bzero&(signb^sub)) int_noco[70:0]={68'b0,1'b1,2'b0};//71'h4 (ainf&signa) (binf&(signb^sub)); (azero&bzero&(signa^(signb^sub))&rc_neg))&~(ainf binf) (azero&bzero&signa&(signb^sub)) (~azero&bzero&signa) ext_noco[70:0]=case(1'b1) doub_noco[70:0]=case(1'b1) endcase; rc_near:{65'b1,6'b0}; rc_trunc:71'b0; rc_inf:{64'h0,~{7{sign_reg}}}; rc_minf:{64'h0,{7{sign_reg}}}; sing_noco[70:0]=case(1'b1) endcase; rc_near:{54'b1,17'b0};rc_minf:{53'h0,{18{sign_reg}}}; rc_trunc:71'h0; rc_inf:{53'h0,~{18{sign_reg}}}; rconst_noco[70:0]=case(1'b1) endcase; rc_near:{25'b1,46'b0};rc_minf:{24'h0,{47{sign_reg}}}; pc_64:doub_noco;pc_32:sing_noco; pc_87:int_noco;pc_80:ext_noco; rc_inf:{24'h0,~{47{sign_reg}}}; //ThirdCycle //*********************************************************************************** endcase; overflow=sum[71]; ols=~sum[70]; //COMPUTESUMASSUMINGNOOVERFLOWORCANCELLATION,CHECKFORCARRYOUT// sum_noco[70:0]=rconst_noco[70:0]^ina_add[70:0]^inb_add[70:0]; sum[71:0]={1'b0,ina_add[70:0]}+{1'b0,inb_add[70:0]}+{71'b0,esub}; //CHECKFOROVERFLOWORCANCELLATION// carry_noco[71:0]={(rconst_noco[70:0]&ina_add[70:0]) sum71_noco[72:0]={2'b0,sum_noco[70:0]}+{1'b0,carry_noco[71:0]}+{72'b0,esub}; overflow_noco=sum71_noco[71]; 1'b0}; (ina_add[70:0]&inb_add[70:0]), (rconst_noco[70:0]&inb_add[70:0]) Fig.4.CircuitA(continued)

17 rconst_co[70:0]=esub?{1'b0,rconst_noco[70:1]}:{rconst_noco[69:0],rconst_noco[0]}; //COMPUTESUMASSUMINGOVERFLOWORCANCELLATION,CHECKFORCARRYOUT// sum71_co[72:0]={2'b0,sum_co[70:0]}+{1'b0,carry_co[71:0]}+{72'b0,esub}; carry_co[71:0]={(rconst_co[70:0]&ina_add[70:0]) sum_co[70:0]=rconst_co[70:0]^ina_add[70:0]^inb_add[70:0]; ols_co=~sum71_co[70]; overflow_co=sum71_co[72]; 1'b0}; (ina_add[70:0]&inb_add[70:0]), (rconst_co[70:0]&inb_add[70:0]) //COMPUTESTICKYBITOFSUMFOREACHOFTHREECASES// sticksum[47:0]=esub?ina_add[47:0]^inb_add[47:0]:~(ina_add[47:0]^inb_add[47:0]); stickcarry[47:0]=esub?{ina_add[46:0]&inb_add[46:0],1'b0}: sticky_noco=sticky_ols (stick[45]&pc_32) (stick[16]&pc_64) sticky_ols=( stick[44:16]&pc_32) ( stick[15:5]&(pc_32 pc_64)) sticky_co=sticky_noco (stick[46]&pc_32) (stick[17]&pc_64) stick[47:0]=~(sticksum[47:0]^stickcarry[47:0]); ( stick[4:1]&~pc_87) stick[0]; (stick[5]&pc_80) stick[1]; {ina_add[46:0] inb_add[46:0],1'b0}; //FourthCycle //*************************************************************************************** (stick[6]&pc_80) stick[2]; //COMPUTESIGNIFICAND// man_noco[67:0]= {sum71_noco[72] sum71_noco[71] sum71_noco[70], sum71_noco[69:48], sum71_noco[47]&~(~sum71_noco[46]&~sticky_noco&pc_32&rc_near), sum71_noco[46:19]&{28{~pc_32}}, sum71_noco[18]&~(pc_32 (~sum71_noco[17]&~sticky_noco&pc_64&rc_near)), man_co[67:0]= sum71_noco[17:8]&~{10{pc_32 pc_64}}, {sum71_co[72] sum71_co[71], }; sum71_noco[6:4]&~{3{pc_32 pc_64 pc_80}}, sum71_noco[3]&~(pc_32 pc_64 pc_80 (~sum71_noco[2]&~sticky_noco&rc_near)) sum71_noco[7]&~(pc_32 pc_64 (~sum71_noco[6]&~sticky_noco&pc_80&rc_near)), sum71_co[70:49], sum71_co[4]&~(pc_32 pc_64 pc_80 (~sum71_co[3]&~sticky_co&rc_near)) sum71_co[18:9]&~{10{pc_32 pc_64}}, sum71_co[7:5]&~{3{pc_32 pc_64 pc_80}}, sum71_co[47:20]&{28{~pc_32}}, sum71_co[19]&~(pc_32 (~sum71_co[18]&~sticky_co&pc_64&rc_near)), sum71_co[8]&~((pc_32 pc_64) (~sum71_co[7]&~sticky_co&pc_80&rc_near)), sum71_co[48]&~(~sum71_co[47]&~sticky_co&pc_32&rc_near), }; Fig.5.CircuitA(continued)

18 man_ols[67:0]= {sum71_co[70] sum71_co[69], sum71_co[45:18]&{28{~pc_32}}, sum71_co[16:7]&~{10{pc_32 pc_64}}, sum71_co[17]&~(pc_32 (~sum71_co[16]&~sticky_ols&pc_64&rc_near)), sum71_co[68:47], sum71_co[46]&~(~sum71_co[45]&~sticky_ols&pc_32&rc_near), man_reg[67:0]=case(1'b1) }; sum71_co[2]&~(pc_32 pc_64 pc_80 (~sum71_co[1]&~sticky_ols&rc_near)) sum71_co[6]&~((pc_32 pc_64) (~sum71_co[5]&~sticky_ols&pc_80&rc_near)), sum71_co[5:3]&~{3{pc_32 pc_64 pc_80}}, exp_noco[17:0]=overflow_noco?exp[17:0]+18'h1:exp[17:0]; //ADJUSTEXPONENT:// endcase; esub&ols ~esub&overflow (~esub&~overflow) (esub&~ols):man_noco[67:0]; exp_co[17:0]=overflow_co?exp[17:0]+18'h2:exp[17:0]+18'b1; :man_ols[67:0]; :man_co[67:0]; exp_noco_sub[17:0]=overflow^overflow_noco? exp_reg[17:0]=case(1'b1) exp_ols[17:0]=ols_co?exp[17:0]:exp[17:0]+18'h1; (esub&~ols) (~esub&overflow):exp_co[17:0]; (~esub&~overflow):exp_noco[17:0]; exp[17:0]+18'h2:exp[17:0]+18'h1; //DETERMINECLASS// class_reg[2:0]=case(1'b1) endcase; (azero&bzero) abequal:`zero; (esub&ols) :exp_noco_sub[17:0]; default :exp_ols[17:0]; //FINALRESULT// r[89:0]={class_reg[2:0],sign_reg,exp_reg[17:0],man_reg[67:0]}; endmodule endcase; :`NORMAL; Fig.6.CircuitA(continued)

19 structureinsofarasitssignalsaregroupedaccordingtotheircyclenumbers withrespecttotheoriginalrtlspecication,andouranalysiswillbeguided bythisorganization.asarststeptowardunderstandingthe4-cyclestructure, considerthefollowingprocedure,whichrepresentsanaiveapproachtooating Althoughitiscombinational,ourlistingofAreectstheadder's4-cycle (2)Performtherequiredrightshiftonthesignicandeldthatcorrespondsto (1)Comparetheexponenteldsofthesummandstodeterminetherightshift pointadditionandsubtraction: (3)Add(orsubtract)thealignedsignicands,togetherwiththeappropriate necessarytoalignthesignicands; (4)Determinetheleftshiftrequiredtonormalizetheresult; thelesserexponent; (6)Computethenalresultbyassemblingthesign,exponent,andsignicand (5)Performtheleftshiftandadjusttheexponentaccordingly; roundingconstant; clockrates,eachoftheaboveoperationsmightreasonablycorrespondtoasingle Undertheconstraintsimposedbycontemporarytechnologyandmicroprocessor cycle,resultinginasix-cycleimplementation.itispossible,however,toimprove elds. (iftheexponentsarevastlydierent),onlyoneofthesepossibilitieswillberealizedforanygivenpairofinputs.thus,theathlonadderincludestwodata Themostimportantoptimizationoftheabovealgorithmisbasedonthe traction,ifmassivecancellationoccurs),andalargerightshiftmightberequired observationthatwhilealargeleftshiftmightberequired(inthecaseofsub- onthiscyclecountbyexecutingsomeoftheseoperationsinparallel. (1)and(2),respectively,resultinginafour-cycleimplementation.InSection5, cuted;ontheother,calledtheclosepath,theleftshiftisperformedinstead.as paths:ononepath,calledthefarpath,therightshiftisdeterminedandexetion.consequently,steps(4)and(5)maybeexecutedconcurrentlywithsteps notedinsection2,theleftshiftmaybedeterminedinadvanceofthesubtrac- weshallexaminethecodecorrespondingtoeachcycleindetail. terminedbyagivensetofvaluescorrespondingtotheinputs.weadoptthe conventionofitalicizingthenameofeachsignaltodenoteitsvalueforthese inputs.thus,rdenotestheoutputvaluedeterminedbytheinputsa,b,op,rc, andpc. Inthesubsequentdiscussion,weshallassumeaxedexecutionofAde- recorded.whilealleightclassesarehandledbytheactualrtl,weconsiderhere signicandelds,accordingtotheamdathloninternal(68;18)format.the bits,includingathree-bitencodingofitsclass,alongwithsign,exponent,and eldsofaareassignedtoclassa,signa,expa,andmana;thoseofbaresimilarly Theinputvaluesaandbaretheoperands.Eachoperandisavectorofninety onlythecaseclassa=classb=normal,andassumethataandbarenormal thatallcomputedexponenteldsarerepresentableintheallotted18bits(see, (68;18)-encodings,i.e.,mana[67]=manb[67]=1.Further,inordertoensure

20 forexample,theproofoflemma14(a)),weassumethatexpaandexpbareboth assumetobeoneofthe11-bitopcodeslistedinfigure1.thisopcodemayindicateeitheradditionorsubtraction,asreectedbythe1-bitsignalsub(figure2). LetEdenotetheexactresultofthisoperation,i.e., Theoperationtobeperformedisencodedastheinputop,whichweshall intherangefrom69to218?3. Forsimplicity,weshallassumethatE6=0. E=^a+^bifsub=0 values,exactlyoneofthebitsrc_near,rc_minf,rc_inf,andrc_truncis1, Roundingcontrolisdeterminedbyrcalongwithop.Accordingtothesetwo ^a?^bifsub=1. pc_80,andpc_87isset.wedenetobethecorrespondingdegreeofprecision: asshowninfigure2.weshallintroduceavariablem,whichwedenetobe 24,53,64,or68,respectively. andrc=rc_rz,thenrc_trunc=1andm=trunc. correspondingroundingmode.forexample,ifopisneitherfaddt68norfsubt68 TheresultprescribedbytheIEEEstandardwillbedenotedasP,i.e., Similarly,pcandoptogetherdeterminewhichoneofthebitspc_32,pc_64, Ourgoalmaynowbestatedasfollows: Theorem1.Supposethata[89:77]andb[89:87]arebothNORMALandthat P=rnd(E;M;): NORMAL,r[86:0]isanormal(68;18)-encoding,and^r=P. a[86:0]andb[86:0]arenormal(68;18)-encodingssuchthat69a[85:68] 218?3and69b[85:68]218?3.AssumethatE6=0.Thenr[89:87]= descriptionacontainsaconstructofthertllanguagethatwasnotdescribed in[8],namely,theforloop(fig.3): BeforeproceedingwiththeproofofTheorem1,wemustnotethatthecircuit for(i=68;i>=0;i=i-1) found=1'b0; if(lop[i]&~found) begin found=1'b1; computedbyarecursivefunctiondeterminedbytheloop.inthisexample,the Ifanassignmenttoasignalsoccurswithinaforloop,thenitsvaluesis end lsa[6:0]=7'h44-i[6:0]; recursivefunctionforthesignallsaisdenedby (lsa;found;lop;i)=8<:lsa (68?i;1;i?1;lop)iflop[i]=1andfound=0 (lsa;found;i?1;lop)otherwise; ifi<0

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