Simplified Instructional Computer (SIC)
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1 Simplified Instructional Computer (SIC) A hypothetical computer that includes the hardware features most often found on real machines SIC standard model SIC/XE Upward compatible Programs for SIC can run on SIC/XE
2 SIC machine architecture Memory 8-bit bytes 3 consecutive bytes form a word Addressed by the lowest number byte 2 5 (32768) bytes in the computer memory A word (3 bytes) = 2 5 bytes
3 SIC machine architecture Registers (5 registers / each 24-bits) Mnemonic A X L PC SW Number Special use Accumulator; used for arithmetic operations Index register; used for addressing Linkage register; the Jump to Subroutine (JSUB) instruction stores the return address in this register Program counter; contains the address of the next instruction to be fetched for execution Status word; contains a variety of information, including a Condition Code (CC) SIC does not have any stack It uses the linkage register to store the return address It is difficult to write the recursive program A programmer has to maintain memory for return addresses when he write more than one layer of function call
4 SIC machine architecture Data formats Characters 8-bit ASCII codes Integers 24-bit binary numbers 2 s complement for negative values -N 2 n N eg, if n = 4, = () 2 No floating-point numbers (exist in SIC/XE)
5 SIC machine architecture Instruction formats 24-bits format opcode (8) x address (5) Note that the memory size of SIC is 2 5 bytes X is to indicate index-address mode Addressing modes Mode Direct Indexed Indication x= x= Target address calculation TA = address TA = address + (X)
6 SIC machine architecture Instruction set Load and store instruction LDA, LDX, STA, STX Ex: LDA ALPHA (A) (ALPHA) STA ALPHA (ALPHA) (A) Arithmetic instruction involve register A and a word in memory ADD, SUB, MUL, DIV Ex: ADD ALPHA (A) (A) + (ALPHA) Comparison instruction involves register A and a word in memory save result in the condition code (CC) of SW COMP Ex: COMP ALPHA CC (<,+,>) of (A)?(ALPHA)
7 SIC machine architecture Instruction set (Cont) Conditional jump instructions according to CC JLE, JEQ, JGT test CC and jump accordingly Subroutine linkage instructions JSUB jumps and places the return address in register L RSUB returns to the address in L
8 SIC machine architecture Input and output Input and output are performed by transferring byte at a time to or from the rightmost 8 bits of register A Each device is assigned a unique 8-bits code Three I/O instructions The Test Device (TD) instruction tests whether the addressed device is ready to send or receive a byte of data CC : < CC : = : ready : busy Read Data (RD) Write Data (WD)
9 Simple I/O example for SIC Page 9, Figure 6 INLOOP OUTLP TD JEQ RD STCH TD JEQ LDCH WD INDEV INLOOP INDEV DATA OUTDEV OUTLP DATA OUTDEV TEST INPUT DEVICE LOOP UNTIL DEVICE IS READY READ ONE BYTE INTO REGISTER A STORE BYTE THAT WAS READ TEST OUTPUT DEVICE LOOP UNTIL DEVICE IS READY LOAD DATA BYTE INTO REGISTER A WRITE ONE BYTE TO OUTPUT DEVICE INDEV BYTE X F INPUT DEVICE NUMBER OUTDEV BYTE X 5 OUTPOUT DEVICE NUMBER DATA RESB ONE-BYTE VARIABLE
10 Programming examples - Data movement Page 3, Figure 2 (a) LDA STA LDCH STCH FIVE ALPHA CHARZ C LOAD CONSTANT 5 INTO REGISTER A STORE IN ALPHA LOAD CHARACTER Z INTO REGISTER A STORE IN CHARACTER VARIABLE C ALPHA ONE-WORD VARIABLE FIVE WORD 5 ONE-WORD CONSTANT CHARZ BYTE C Z ONE-BYTE CONSTANT C RESB ONE-BYTE VARIABLE
11 Programming examples - Arithmetic Page 5, Figure 3 (a) ONE ALPHA BETA GAMMA DELTA INCR LDA ADD SUB STA LDA ADD SUB STA WORD ALPHA INCR ONE BETA GAMMA INCR ONE DELTA LOAD ALPHA INTO REGISTER A ADD THE VALUE OF INCR SUBTRACT STORE IN BETA LOAD GAMMA INTO REGISTER A ADD THE VALUE OF INCR SUBTRACT STORE IN DELTA ONE-WORD CONSTANT ONE-WORD VARIABLES
12 Programming examples -Looping and indexing Page 6, Figure 4 (a) MOVECH LDX LDCH STCH TIX JLT ZERO STR,X STR2,X ELEVEN MOVECH INITIALIZE INDEX REGISTER TO LOAD CHARACTER FROM STR INTO REG A STORE CHARACTER INTO STR2 ADD TO INDEX, COMPARE RESULT TO LOOP IF INDEX IS LESS THAN STR STR2 ZERO ELEVEN BYTE RESB WORD WORD C TEST STRING -BYTE STRING CONSTANT -BYTE VARIABLE ONE-WORD CONSTANTS
13 Programming examples - Indexing and looping Page 7, Figure 5 (a) ADDLP LDA STA LDX LDA ADD STA LDA ADD STA COMP JLT ZERO INDEX INDEX ALPHA,X BETA,X GAMMA,X INDEX THREE INDEX K3 ADDLP INITIALIZE INDEX VALUE TO LOAD INDEX VALUE INTO REGISTER X LOAD WORD FROM ALPHA INTO REGISTER A ADD WORD FROM BETA STORE THE RESULT IN A WORD IN GAMMA ADD 3 TO INDEX VALUE COMPARE NEW INDEX VALUE TO 3 LOOP IF INDEX IS LESS THAN 3 INDEX ALPHA BETA GAMMA ZERO K3 THREE WORD WORD WORD 3 3 ONE-WORD VARIABLE FOR INDEX VALUE ARRAY VARIABLES WORDS EACH ONE-WORD CONSTANTS
14 Programming examples - Subroutine call and record input READ RLOOP INDEV RECORD ZERO K Page 2, Figure 7 (a) JSUB LDX TD JEQ RD STCH TIX JLT RSUB BYTE RESB WORD WORD READ ZERO INDEV RLOOP INDEV RECORD,X K RLOOP X F CALL READ SUBROUTINE SUBROUTINE TO READ -BYTE RCORD INITAILIZE INDEX REGISTER TO TEST INPUT DEVICE LOOP IF DEVICE IS BUSY READ ONE BYTE INTO REGISTER A STORE DATA BYTE INTO RECORD ADD TO INDEX AND COMPARE TO LOOP IF INDEX IS LESS THAN EXIT FROM SUBROUTINE INPUT DEVICE NUMBER -BYTE BUFFER FOR INPUT RECORD ONE-WORD CONSTANTS
15 Define storage WORD/BYTE Reserve one word/byte of storage /RESB Reserve one or more words/bytes of storage Example ALPHA FIVE WORD 5 CHARZ BYTE C`Z C RESB
16 Special symbols (SIC & SIC/XE) : immediate addressing : indirect addressing + : format 4 * : the current value of PC C` : character string op m, x : x denotes the index addressing
17 SIC/XE machine architecture Memory Maximum memory available on a SIC/XE system is megabyte (2 2 bytes) Instruction format and addressing modes are changed Register (Additional registers) Mnemonic B S T F Number Special use Base register; used for addressing General working register-no special use General working register-no special use Floating-point accumulator (48bits) Registers S and T are only for storing data They can not use for accumulator Ex: ADDR S, A A A+S COMPR X, T
18 SIC/XE machine architecture Data formats There is a 48-bit floating-point data type s exponent 36 fraction sign bit s (: +, : -) fraction f: a value between and exponent e: unsigned binary number between and 247 value: s * f * 2 (e-24) Ex: 5 = =( )*2 3 = ( )* ,,
19 SIC/XE machine architecture Instruction formats Since the memory used by SIC/XE may be 2 2 bytes, the instruction format of SIC is not enough Solutions 8 5 Use relative addressing Extend the address field to 2 bits SIC/XE instruction formats opcode x address!" #!"!" #!"!"!"!" #!" $# #!"!" #!" $#!" % &%
20 SIC/XE machine architecture Addressing modes New relative addressing modes for format 3 Mode Indication Target address calculation Base relative Program-counter relative b=,p= b=,p= TA=(B)+disp ( disp 495) TA=(B)+disp (-248 disp 247) When base relative mode is used, disp is a 2-bits unsigned integer When program-counter relative mode is used, disp is a 2-bits signed integer 2 s complement Direct addressing for formats 3 and 4 if b=p= These two addressing mode can combine with index addressing if x=
21 SIC/XE machine architecture Addressing modes Bits x,b,p,e: how to calculate the target address relative, direct, and indexed addressing modes Bits i and n: how to use the target address (TA) Mode Immediate addressing Indirect addressing Simple addressing Indication i=, n= i=, n= i=, n= i=, n= Operand value TA: TA is used as the operand value, no memory reference ((TA)): The word at the TA is fetched Value of TA is taken as the address of the operand value Standard SIC (TA):TA is taken as the address of the operand value
22 Addressing mode example C C33 33 (B)=6 (PC)=3 (X)=9
23 Addressing mode example Hex op n Machine instruction Binary i x b p e disp/address Target address Value loaded into register A C3 639 C C33 C33 33
24 Addressing mode summary Addressing type Flag bits n i x b p e Assembler lenguage notation Calculation of target address TA Operand Notes Simple op c +op m +op m +op m +op c,x +op m,x +op m,x +op m,x +op m +op m,x disp addr (PC)+disp (B)+disp disp+(x) addr+(x) (PC)+disp+(X) (B)+disp+(X) b/p/e/disp b/p/e/disp+(x) (TA) (TA) (TA) (TA) (TA) (TA) (TA) (TA) (TA) (TA) 4 D 4 D 4 D A 4 D A 4 D 4 D 4 D A 4 D A 4 D A S 4 D A S Indirect disp addr (PC)+disp (B)+disp ((TA)) ((TA)) ((TA)) ((TA)) 4 D 4 D 4 D A 4 D A Immediate +op #c +op #m +op #m +op #m disp addr (PC)+disp (B)+disp TA TA TA TA 4 D 4 D 4 D A 4 D A
25 SIC/XE machine architecture Instruction set Standard SIC s instruction Load and store registers (B, S, T, F) LDB, STB, Floating-point arithmetic operations ADDF, SUBF, MULF, DIVF Register-register arithmetic operations ADDR, SUBR, MULR, DIVR Register move operations RMO Supervisor call (SVC) generates an interrupt for OS (Chap 6) Input/Output SIO, TIO, HIO: start, test, halt the operation of I/O device
26 SIC/XE machine architecture Instruction set Refer to Appendix A for all instructions (Page 496) Notations for appendix A (mm+2): move word begin at m to A P: privileged instruction X: instruction available only in SIC/XE C: condition code CC
27 Programming examples (SIC/XE) - Data movement Page 3, Figure 2 (b) LDA STA LDA STCH #5 ALPHA #9 C LOAD VALUE 5 INTO REGISTER A STORE IN ALPHA LOAD ASCII CODE FOR Z INTO REG A STORE IN CHARACTER VARIABLE C ALPHA C RESB ONE-WORD VARIABLE ONE-BYTE VARIABLE
28 Programming examples (SIC/XE) - Arithmetic Page 5, Figure 3 (b) LDS LDA ADDR SUB STA LDA ADDR SUB STA INCR ALPHA S,A # BETA GAMMA S,A # DELTA LOAD VALUE OF INCR INTO REGISTER S LOAD ALPHA INTO REGISTER A ADD THE VALUE OF INCR SUBTRACT STORE IN BETA LOAD GAMMA INTO REGISTER A ADD THE VALUE OF INCR SUBTRACT STORE IN DELTA ALPHA BETA GAMMA DELTA INCR ONE WORD VARIABLES
29 Programming examples (SIC/XE) -Looping and indexing Page 6, Figure 4 (b) MOVECH LDT LDX LDCH STCH TIXR JLT # # STR,X STR2,X T MOVECH INITIALIZE REGISTER T TO INITIALIZE INDEX REGISTER TO LOAD CHARACTER FROM STR INTO REG A SOTRE CHARACTER INTO STR2 ADD TO INDEX, COMPARE RESULT TO LOOP IF INDEX IS LESS THAN STR STR2 BYTE RESB C TEST STRING -BYTE STRING CONSTANT -BYTE VARIABLE
30 Programming examples (SIC/XE) - Indexing and looping Page 7, Figure 5 (b) ADDLP LDS LDT LDX LDA ADD STA ADDR COMPR JLT #3 #3 # ALPHA,X BETA,X GAMMA,X S,X X,T ADDLP INITIALIZE REGISTER S TO 3 INITIALIZE REGISTER T TO 3 INITIALIZE INDEX REGISTER TO LOAD WORD FROM ALPHA INTO REGISTER A ADD WORD FROM BETA STORE THE RESULT IN A WORD IN GAMMA ADD 3 TO INDEX VALUE COMPARE NEW INDEX VALUE TO 3 LOOP IF INDEX VALUE IS LESS THAN 3 ALPHA BETA GAMMA ARRAY VARIABLES WORDS EACH
31 Programming examples (SIC/XE) - Subroutine call and record input READ RLOOP INDEV RECORD Page 2, Figure 7 (a) JSUB LDX LDT TD JEQ RD STCH TIXR JLT RSUB BYTE RESB READ # # INDEV RLOOP INDEV RECORD,X T RLOOP X F CALL READ SUBROUTINE SUBROUTINE TO READ -BYTE RECORD INITIALIZE INDEX REGISTER TO INITIALIZE REGISTER T TO TEST INPUT DEVICE LOOP IF DEVICE IS BUSY READ ONE BYTE INTO REGISTER A STORE DATA BYTE INTO RECORD ADD TO INDEX AND COMPARE TO LOOP IF INDEX IS LESS THAN EXIT FROM SUBROUTINE INPUT DEVICE NUMBER -BYTE BUFFER FOR INPUT RECORD
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