Advanced transformer construction techniques for electromagnetic interference reduction in switch mode power supplies

Transcription

1 Title Advanced transformer construction techniques for electromagnetic interference reduction in switch mode power supplies Advisor(s) Pong, MH Author(s) Chan, Yick-po.; 陳奕寶. Citation Chan, Y. [ 陳奕寶 ]. (2011). Advanced transformer construction techniques for electromagnetic interference reduction in switch mode power supplies. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from Issued Date 2011 URL Rights The author retains all proprietary rights, (such as patent rights) and the right to use in future works.

2 Advanced Transformer Construction Techniques for Electromagnetic Interference Reduction in Switch Mode Power Supplies by Yick Po CHAN A thesis submitted in partial fulfillment of the requirement for the degree of Doctor of Philosophy In the Department of Electrical and Electronic Engineering The University of Hong Kong August 2011

3 CERTIFICATE OF ORIGINALITY I hereby declare that this thesis is my own work and that, to the best of my knowledge and belief, it reproduces no material previously published or written, nor material which has been accepted for the award of any degree or diploma, except where due acknowledgement has been made in the text. (Signed) (Name of Student)

4 Abstract of the thesis entitled Advanced Transformer Construction Techniques for Electromagnetic Interference Reduction in Switch Mode Power Supplies submitted by Yick Po Chan for the degree of Doctor of Philosophy at The University of Hong Kong in August 2011 The electromagnetic interference (EMI) problem is a significant challenge in the design of high efficiency switch mode power supply (SMPS). This thesis addresses one of the important parameters in a transformer, the leakage inductance, and proposed a leakage inductance transformer modelling technique of a complex structured multiple-winding transformer based on Kirchhoff s node law with a generalized transformer construction technique for EMI reduction in SMPS. In an isolated SMPS, the common mode (CM) noise often flows from the primary to the secondary and earth ground via the coupling capacitor of the windings. We proposed a silent transformer construction technique based on antinoise generation and applied it to cancel the original CM noise. Experimental results verified the effectiveness of the model and we developed a systematic approach to deduce the zero equipotential line (ZEPL) condition with quiet node analysis that can accommodate different topologies and winding constructions.

5 The specific contributions of this thesis include: I) a systematic approach to predict leakage inductances in a complex form multiple-winding transformer based on Maxwell s equations with a twocoil inductor model without the need of actual construction. II) a silent transformer construction technique that effectively reduces the CM noise current flowing across the isolated primary and secondary windings. This technique is based on the zero equipotential line (ZEPL) theory where a substantial CM noise attenuation can be achieved. III) a theory established on electromagnetic (EM) analysis between wire wound transformer and planar transformer CM EMI performances and proposed the solution can achieve CM noise cancellation much more efficiently in planar transformer construction. The results confirmed this theory and demonstrated the superiority of planar transformer over the wire wound transformer EM attenuation performance. IV) an analysis on transformer CM EMI performance with more than one primary winding layer and provided generalized silent transformer construction rules to achieve CM noise cancellation in different transformer constructions. Index Terms: silent transformer, common mode noise, transformer, anti-phase winding, leakage inductance, shield effect.

6 Acknowledgements I would like to express my sincere thanks to my supervisor Dr. Bryan M. H. Pong, who has assisted me throughout the research and provided valuable guidance and supports. I have been constantly inspired during our meetings and discussions and he made this study a pleasure to work on. His in-depth knowledge has benefited me to think much more deeply into problems. I gratefully acknowledge my past colleagues Dr. Joe C. P. Liu and Dr. Franki N. K. Poon for their visions and ideas and I am honoured to be given a chance to work with them where I have learnt a lot. I want to thank other colleagues at work Dr. Dylan D. C. Lu, Ms. May Sit, Mr. Gary Chow and Mr. William Tse for helping me whenever I had problems. This Ph.D. thesis is devoted to my beloved family and my dearest wife Novia. All praise be to God, whom all things obey. He makes all things possible and provides all we need. God is Love.

7 Contents Chapter 1 Introduction Highlights of the SMPS Development Motivations & Objectives Outline of the Thesis Summary of Achievements Chapter 2 Identification of Noise Paths and EMI Conformity Introduction EM Noise Types and Classifications Modes of conducted EMI and Measurement Setup Major Common Mode Noise Paths Importance of Suppressing Path B CM noise CM EMI Suppression Methods Use of CM Choke Filter Minimization of Coupling Capacitance of Transformer Primary Secondary Bypass Capacitor (Y capacitor) Faraday Shielding Alternative EMI Reduction Methods Wheatstone Based Impedance Balance Method Anti-Phase Noise Generation Concluding Remarks... 42

8 Chapter 3 EMI Aspects of Transformer Design Introduction Leakage Inductance Interleaved Windings Configuration Leakage Inductance Estimation Methods Direct Measurement Grover Tabular Method MagNet Electromagnetic Field Simulation - Finite Element Analysis Summary Chapter 4 Leakage Inductance Estimation in Multiple-Winding Transformers Introduction Definition of a Winding Element in a Transformer Two-coil Concentric Inductor Model Mutual Inductance of Two Solenoidal Windings Winding Element Matrix Model Series and Parallel Reduction Techniques Experimental Verification Transformer with relative permeability > Practical Considerations and Limitations Conclusion Chapter 5 EMI Cancellation Wire Wound Silent Transformer Construction Techniques Introduction Artificial Noise Generation... 69

9 5.3 Proposed Silent Transformer Construction Voltage Reference Connection Point - Quiet Node Zero Equipotential Potential Line Theory Effects with Wrong Connection Node Winding Width Anti-Phase Winding Turns Secondary Noise Source Winding Arrangements Winding Layer Electric Shielding Effect Power Loss Issues Resistive Loss in Anti-Phase Winding Eddy Current Loss in Anti-Phase Winding Skin and Proximity Effect in Anti-Phase Winding Experimental Verification Primary-Secondary CM Noise Stabilization Measurement Method Winding Construction Techniques in Different Converter Topologies Half Bridge Converters Push-Pull Converters Summary Chapter 6 EMI Cancellation Planar Silent Transformer Construction Techniques Introduction Planar Transformer Characteristics Zero Equipotential Plane Theory Constant Voltage Gradient Overlapped Junction Approximations Overlapped Winding Plane Areas Voltage Contours CM Noise Cancellation Performance Differences in Wire and Planar Silent Transformers

10 6.4.1 Wire wound transformer Planar Transformer Experimental Verifications Multiple Primary Layers CM Noise Analysis First Attempt Solution Experimental Results with p-s-p-a Configuration Alternative Proposed Transformer Construction Experimental Results with p-s-a-p Configuration Silent Transformer Design Considerations Summary Chapter 7 Conclusion Summary of Contributions Determination of Leakage Inductance in a Multiple-Winding Transformer Silent Transformer Construction Techniques Enhanced Silent Transformer Solution Future Work Investigation on a combined solution with path A CM noise cancellation ZEPL Condition on other topologies and transformer configurations ZEPL Condition with Step Up (Boost) Converter Application of Anti-Noise Generation in Differential Mode (DM) Cancellation Publications Bibliography

11 List of Figures Figure 2.1: Three types of noise coupling mechanism Figure 2.2: DM and CM mode noise propagation paths Figure 2.3: DM noise signal definition Figure 2.4: Line stabilization impedance network (LISN) in place for noise measurement Figure 2.5: CM noise circulates via the heatsink (drain) of the primary switch Figure 2.6: SMPS with isolated transformer and opto-coupler, CM noise flows via the secondary side either from C se or directly to the earth ground Figure 2.7: A CM noise measurement setup for path B Figure 2.8: CM choke filter placement Figure 2.9: Inductor placed at the output of the SMPS Figure 2.10: Bypass capacitor (Y) connection between the primary and secondary ground Figure 2.11: Faraday shield attenuates the way of CM noise propagation from primary to secondary Figure 2.12: (a) Coupling capacitance exists between primary and secondary windings. (b) effect on coupling capacitance with a Faraday shield Figure 2.13: Faraday shield incorporated with Eddy current

12 Figure 2.14: (a) Circle patterned Faraday shield and (b) Lattice patterned Faraday shield Figure.2.15: Wheatstone bridge noise model in SMPS Figure 2.16: Circuit model with anti-phase noise v a Figure 3.1: Leakage inductance model on a schematic Figure 3.2: Typical primary FET drain voltage spike seen from an oscilloscope that contains high frequency components, (a) without snubber and (b) with snubber Figure 3.3: A typical RC snubber circuit Figure 3.4: p-s-p interleaved winding structure Figure 3.5: Leakage inductance L k1 measurement with a short-circuited winding Figure 4.1: A four-layer multiple-winding transformer with (a) schematic diagram, (b) physical connections with winding elements and (c) transformer construction Figure 4.2: Two winding elements and their relative parameters to solve the elliptical integrals Figure 4.3: Leakage inductance model Figure 5.1: Anti-phase noise source cancels the CM noise from the primary FET Figure 5.2: Anti-noise cancellation equivalent circuit Figure 5.3: Anti-phase winding generates a reverse waveform with an amplitude reversely proportional to v p Figure 5.4: Possible quiet node selections (I), (II) or (III)

13 Figure 5.5: (a) Connection to node (III) during FET turn on, (b) connection to node (III) during FET turn off, (c) connection to node (I) during FET turn on and (d) connection to node (I) during FET turn off Figure 5.6: A p-s-a winding configuration with W a and W p wound in different direction Figure 5.7: Secondary winding W s sees a zero voltage changes along the bobbin due to the cancellation of primary W p and anti-phase winding W a, (a) during FET turn on and (b) during FET turn off Figure 5.8: Equivalent circuit with anti-phase winding Figure 5.9: The other end of W a node β connected to the quiet node (I), (a) during FET turn on and (b) during FET turn off Figure 5.10: Secondary winding W s sees a zero voltage changes along the bobbin due to the cancellation of primary W p and anti-phase winding W a, (a) during FET turn on and (b) during FET turn off Figure 5.11: (a) Resultant amplitude during FET turn on time t on and turn off time t off with Fig. 5.5(c) and (d), (b) resultant amplitude during FET turn on time t on and turn off time t off with Fig. 5.9(a) and (b) Figure 5.12: Mismatch anti-phase winding width causes the resultant field cannot reach zero Figure 5.13: (a) the number of turns is proportional to the switching amplitude across the bobbin, (b) original waveform, (c) anti-phase waveform with k = 1, (d) anti-phase waveform with k < 1 and (e) anti-phase waveform with k > Figure 5.14: Anti-phase winding is constructed so that it matches the winding width of the primary winding, (a) k < 1, (b) k = 1, (c) k > Figure 5.15: Equivalent circuit with secondary noise source Figure 5.16: (a) winding arrangements p-s-a with W s wound with same phase as W a, (b) winding arrangements p-s-a with W s wound with same phase as W p, (c) winding arrangements s-p-a with W s wound with same phase as W a and (d) winding arrangements s-p-a with W s wound with same phase as W p

14 Figure 5.17: Two ways of constructing the phase of the windings, (a) winding arrangements p-s-a with W s wound with same phase as W a, (b) W s wound with same phase as W p, (c) winding arrangements s-p-a with W s wound with same phase as W a and (d) W s wound with same phase as W p Figure 5.18: When turns ratio N ps = 1, no CM current flows through C ps Figure 5.19: s-p-a winding configuration with parasitic capacitances Figure 5.20: p-s-a configuration parasitic capacitance model Figure 5.21: Anti-phase winding with inherent laminated effect Figure 5.22: Direction of power current and CM current Figure 5.23: Flyback converter with our proposed transformer construction Figure 5.24: (a) original transformer with and (b) with anti-phase winding added Figure 5.25: Comparison in EMI performance between Tx1 (original) and Tx2 (with the anti-phase winding) Figure 5.26: Comparison in EMI performance between Tx1 (original) and Tx1 (with 82mH CM choke) Figure 5.27: Primary-secondary CM noise stabilization measurement setup Figure 5.28: (a) Measurement from an isolated oscilloscope showing the noise measured at 230 V AC with Tx1 (original) installed and (b) with Tx2 (with the proposed silent transformer) installed Figure 5.29: A common half bridge configuration Figure 5.30: Typical interleaved winding configuration in a half bridge converter Figure 5.31: Different W s1 and W s2 phase configuration, (a) in different phase and (b) in same phase

15 Figure 5.32: Different W s1 and W s2 phase configuration, (a) in different phase and (b) in same phase Figure 5.33: A proposed silent transformer with two anti-phase winding added as shown in Fig. 5.32(a) applied to a half bridge converter Figure 5.34: Push-pull converter Figure 5.35: Four different winding configurations Figure 5.36: p-s-a-p-s-a configuration Figure 5.37: p-s-p-s-a configuration Figure 5.38: Proposed anti-phase winding solution to achieve ZEPL condition on both secondary windings Figure 5.39: p-s-a-s-p configuration with a problem in determining the phase of winding W a Figure 6.1: Cross section of a planar transformer Figure 6.2: An anti-phase winding plane W a matched with the primary winding plane W p in p-s-a formation Figure 6.3: Any one complete turn on a plane corresponds to δv in winding plane (a) W p, (b) W s and (c) W a Figure 6.4: (a) A winding turn from plane W p and plane W a showing the mismatch component and (b) voltage gradient changes along the outer turn with length l Figure 6.5: Noise voltage potential model for rectangular winding planes W p, W s and W a Figure 6.6: (a) rectangular winding plane W p, (b) equivalent contour model Figure 6.7: Cross section of a wire wound transformer with winding W p and W s

16 Figure 6.8: Cross section of a wire wound transformer with winding W p, W s and W a Figure 6.9: Winding planes W p, W s and W a on PCBs Figure 6.10: CM EMI cancellation performance with our proposed anti-phase winding cancellation solution with planar transformer structure Figure 6.11: interleaved p-s-p configuration Figure 6.12: First attempt to cancel the CM noise flowed to winding plane W s with an additional winding W a Figure 6.13: Flyback converter Test circuit with p-s-p-a configuration Figure 6.14: Counteracting CM noise from winding plane W a unable to reach winding plane W s Figure 6.15: CM EMI comparison between Tx5 (original with p-s-p configuration) and Tx6 (p-s-p-a configuration) Figure 6.16: Modified planar anti-phase winding solution in p-s-a-p configuration Figure 6.17: Flyback converter test circuit with modified p-s-a-p configuration Figure 6.18: Test planar PCBs with N p1 = N p2 = N a = 6 and N s = Figure 6.19: Rearrangement of winding plane W p2 and W a showing a significant improvement on CM noise attenuation performance at secondary ground Figure 7.1: A possible combined silent transformer solution to tackle both major CM paths Figure 7.2: A typical two-switch forward converter Figure 7.3: A typical two-switch flyback converter

17 Figure 7.4: A typical full-bridge converter

18 List of Tables Table 4.1: Comparison of self and leakage inductances on different windings shown in Fig. 4.1(a) Table 5.1: CM EMI performances measured with Tx1 (original) and Tx2 (with the anti-phase winding) and their differences Table 5.2: EMI performances measured with Tx1 (original) and Tx1 (with 82mH CM choke) and their differences Table 6.1: CM EMI cancellation performance comparison between planar transformer Tx3 and Tx4 at different frequency points Table 6.2: CM EMI cancellation performance comparison between planar transformer Tx5 and Tx7 at different frequency points

19 18 Chapter 1 Introduction Since the invention of the switch mode power supply (SMPS) in the early 1970 s, linear power supplies have become obsolete due to the many improvements gained from SMPS, such as size, efficiency and controllability. However, due to its switching characteristics, the current being switched on and off abruptly, an electrical noise is produced that causes a commonly known phenomenon, called the electromagnetic interference (EMI). This thesis provides a new angle to a well-known problem with solutions that significantly improve the design and SMPS convertor performance. This chapter highlights SMPS development and the design problems faced throughout the industry. We then present our motivation and objectives. After this we will present an outline of the thesis and summarize the main findings and achievements. 1.1 Highlights of the SMPS Development At present SMPS is widely employed in all kinds of electrical equipment. Its popularity supersedes linear power supplies due to its many advantages. A SMPS first rectifies the AC input voltage to a DC voltage, and then converts to a desirable output DC voltage with feedback regulation by a repetitive switching

20 19 action from an electronic switch, namely a field effect transistor (FET). The turn on time of the FET controls the amount of power current that flows to the output. This action causes the original AC input voltage frequency to be converted to a much higher switching frequency. The result is that the main transformer and other reactive components size can be significantly reduced. Also, since the transistor is switched fully on or off, the resistive loss is minimal compared to linear power supplies. Efficiency hence improved typically from 30% to 70% or above. However, all SMPS switching action creates unwanted distortion to the AC input voltage line via the earth ground and we classify this as noise. One concern is the EMI performance because it directly affects the final size and efficiency of the SMPS converter. Electromagnetic (EM) noise originates from the high frequency, high voltage switching action from a converter and this noise is circulated via the earth ground through the parasitic components, where other devices are connected. Since the AC input mains supply is shared by the public and the EM frequency spectrum is a natural limited resource, therefore strict controls to EMI performance and compliance are necessary to avoid unacceptable interference to other electronic devices that are connected to the same AC mains supply. 1.2 Motivations & Objectives Due to necessity of EMI compliance, a SMPS usually has components that specifically deal with the EM noise, for example input noise filters, bypass capacitors and EM metal shields. All of these components will cause a deficiency on the size and the overall efficiency that hampers the true performance of the

21 20 converter. Another disadvantage is that the SMPS will cost more due to its increase in component count. Dealing with the EMI usually comes at a later stage before a product s pilot production, when the converter is literally being produced on a printed circuit board (PCB). However, an EMI filter designed on the PCB often fails to do what it is supposed to do. One reason is because there are many parasitic components and paths not visible on a schematic. Also, reactive EMI related components like inductors or capacitors at high frequencies may not behave the same way as designed. These factors lead engineers to make wrong decisions about the components used for EMI suppression. Many projects are usually delayed because of this. Intuitively, one may think that to deal with EMI, adding so many EMI suppression related components are not effective on size, cost and efficiency. There must be a better way to deal with EMI. Past researches [5]-[11] suggested so and presented different forms of solutions. There are extensive reviews on ways to solve this problem, but most of them required expect knowledge of the circuit, including the likely parasitic components that are invisible on the schematic. These parasitic components usually have very small values that are difficult to obtain accurately. Besides, this form of solutions may not be repeatable. Therefore, we believe the research on EMI problems is far from complete. In particular, SMPS with common mode (CM) noise coupling from the primary to secondary earth ground provided an easy path for CM noise to travel. This has caused problems to meet the EMI standards when a designer at the same time wants to meet the target converter size, cost and efficiency. Surprisingly, researches on this path are limited.

22 21 For the reasons presented above, we see the importance of providing generalized, simple solutions to solve the EMI problem in SMPSs. Our objectives aim at solving EMI in SMPSs, together with a lower cost, smaller size, higher efficiency and using less design time to achieve it. 1.3 Outline of the Thesis Chapter 2 outlines the standards of the EMI conformity of electrical equipment with an introduction of different types of EM noise present in a typical SMPS. CM noise is discussed in detail with traditional approaches to suppress it. In particular, we will provide a literature review on the state-of-the-art EMI suppression techniques. This chapter reveals the shortcomings of present solutions and explores further promising developments on EMI suppression in a SMPS. Chapter 3 covers some of the EMI aspects of main transformer design. Leakage inductance is one important factor that affects both the transformer conversion efficiency and EMI. Its connection with the parasitic capacitance between the transformer windings caused switching spikes that are harmful to the switching devices and induce EMI, but engineers often failed to minimize the leakage inductance in general. We will present a few common methods in estimating leakage inductance between two windings and call attention to that these methods are insufficient or ineffective to estimate leakage inductance with more than two windings. In chapter 4, we propose a method to deduce a multiple-winding complex structured transformer leakage inductance based on a simple two coil inductor coil model. Our proposed operations are explained in detail. This method can provide an insight into a transformer design before it is actually constructed for testing.

23 22 Engineers can have information in advance and made adjustment to minimize the unwanted leakage inductance to shorten design time with less prototypes. In chapter 5, we propose an EM noise cancelling technique based on a synthetic anti-noise generation with the zero equipotential theory. By using an anti-phased winding in a wire wound transformer with a correct configuration, the original CM noise that passes across the transformer can be cancelled effectively. The so-called silent transformer is presented with results and detailed analysis, where a generalized silent transformer configuration is deduced that can be employed in different topologies. In chapter 6, we further investigate the proposed anti-phased noise cancellation technique and apply it to another type of transformer, namely the planar transformer. We compare the CM EMI attenuation performance between the wire-wound silent transformer and the planar silent transformer. The unique features of the planar silent transformer, its frequency range and the magnitude of EMI attenuation performance is far superior to its wire-wound counterpart. A CM EMI analysis with multiple-layered planar transformer is then conducted with a proposed general silent transformer construction approach to minimize the CM noise flowing to the earth ground. Chapter 7 gives the conclusion by summarizing the important results that have been established from the transformer design and analysis. We also provide suggestions on future work studies that can potentially expand from the basis of our theories.

24 Summary of Achievements The main contributions can be summarized as follow: 1) A model is established to predict the leakage inductance in a complex structured transformer. The model is easy to apply and work systematically. It is being implemented with a transformer modelling program in [12]. 2) A wire wound silent transformer construction technique is developed based on our proposed ZEPL theory that does not increase component count to reduce the CM noise significantly across the primary secondary part in SMPS. The p-s-a winding layer configuration is proposed as the basis of the solution. An addition of anti-phase winding contributes minute Eddy current loss when it is applied as a shield in the transformer. This result is particularly useful to tackle the medical equipment CM noise problem. 3) The ZEPL theory is extended to planar silent transformers and showed that our solution works much better in planar transformer than the wire wound counterpart. The results confirmed this theory and demonstrated the superiority of planar silent transformer over the wire wound silent transformer EM cancellation performance. 4) Based on the ZEPL condition with p-s-a winding layer configuration, an effective winding configuration to solve the CM noise problem is derived when there is more than one primary winding layer.

25 24 Chapter 2 Identification of Noise Paths and EMI Conformity 2.1 Introduction In this chapter, we provide an overview of the EM noise types and a literature survey on common ways of suppressing EM noise, together with the state-of-the-art methods and EM compliance is also discussed. Next, we will identify major noise paths that cause the EMI problem as our basis of research problems. 2.2 EM Noise Types and Classifications EM noise can be transferred via conduction and/or radiation. Conducted EMI is transferred by physical contact of conductors, whereas the radiated EMI is caused by long range induction, when the frequency of the EM noise is high enough to radiate away from its conductive medium. Different standards exist between countries [28]. United States FCC Part 15 Subpart B and European Union EN both defines the conductive EMI, is ranged from 150 khz up to 30 MHz, and radiated EMI continues from 30 MHz up to 10 GHz. Since the EM

26 25 noise behaviour is dependent on frequency and radiated EM noise is uncontrollable where it can radiate from anywhere within a circuit, a detailed discussion of the radiated EMI is beyond the scope of this thesis. In conducted EMI, there are three types of three noise coupling mechanisms [32]: 1) Conductive - between the source and the receptor via direct contact with a conductor medium, for example, wire, printed circuit board (PCB) trace or metal enclosures. 2) Capacitive - via near field electrical induction (E Field) with a short distance between the source and the receptor. 3) Inductive - via near field magnetic induction (H Field) with a short distance between the source and the receptor. Fig. 2.1 shows three ways of propagation in conducted EMI. Figure 2.1: Three types of noise coupling mechanism.

27 Modes of conducted EMI and Measurement Setup EM noises are normally classified in two modes for easier analyses, as shown in Fig. 2.2: 1) Differential Mode (DM) Noise 2) Common Mode (CM) Noise Figure 2.2: DM and CM mode noise propagation paths. DM noise is conducted and circulated between the live and neutral lines in a balanced asymmetrical way. DM noise current of a SMPS is well defined with visible components on the path and therefore the emission level can be determined. Hence, the estimation on DM noise level is usually easier than CM noise as suggested by Montrose et al [2]. The DM noise signal is shown as two voltage sources in Fig. 2.3 and it is defined in equation (2.1).

28 27 Figure 2.3: DM noise signal definition. v le = v ne (2.1) v le and v ne are the DM noise voltages of live line and neural line to the earth ground respectively. Given that the phase difference between v le and v ne is 180 o, the resultant DM noise current does not flow to earth ground. On the other hand, CM noise current takes the path between both power lines and the earth ground, where the live and the neutral lines have the same magnitude of the noise travelling in the same phase. The CM noise signal is therefore defined as v le = v ne (2.2) Since v le and v ne have the same magnitude and phase, there is no CM noise current circulating between the live and neutral lines, but flowing in the earth ground instead. CM noise is more harmful than DM noise because the CM noise affects the reference of a SMPS to the earth ground, where sensitive equipment can be deceived and output incorrectly to a given signal input if its reference to the earth ground is unstable. It is more difficult to predict due to the invisible parasitic components between the SMPS to the earth ground. Also, it usually cannot be

29 28 removed with simple techniques or inexpensive methods. Furthermore, it can occur at low frequencies in the kilohertz (khz) region with a significant magnitude that we must pay attention to. Hence, the size of CM choke will usually be larger than its DM counterpart. We shall restrict our discussion to CM noise only from this point to the interest of our research problems. In order to measure the EMI performance of a SMPS, a line impedance stabilization network (LISN) is employed. Connections for EMI measurements are shown in Fig Figure 2.4: Line stabilization impedance network (LISN) in place for CM noise measurement. When a SMPS is in operation, the switching action alternatively charges and discharges the parasitic capacitances that are connected to the earth ground, the CM noise current will circulate via the earth ground and show up at the two 50 Ω resistors as a voltage measurement. But a LISN is only able to record both DM and CM mode noise. There exists a method to separate DM and CM noise [29] so they can be measured individually. We can also measure the CM noise on a major CM noise path with an isolated current probe. This will be discussed in the next section.

30 Major Common Mode Noise Paths One commonly known CM noise path in a SMPS is formed by the parasitic capacitance of the primary switching FET drain C pe to the earth ground, usually via the heatsink of the FET. This CM current is then returned back to the AC mains via the parasitic capacitances C ne and C le between the earth ground with the live and neutral line. We denote this as path A, as shown in Fig Another major CM path is also present because the secondary ground is either connected to the earth ground via a parasitic capacitor C se, or directly connected to the earth ground. This is shown in Fig With the safety regulation executed by the International Electrical Commission (IEC) standard with appliance class I, a SMPS chassis accessible to the user should be connected to the electrical earth ground. When a fault occurs with a live conductor connected to the chassis, the current will flow directly to the earth ground that should trip a circuit breaker and stop its operation. It is also required that the device should be isolated to the primary supply source, therefore in a regulated SMPS, isolation is normally done with a main isolated transformer with a closed loop feedback via an opto-coupler. In both cases, this forms a low impedance path for CM noise to travel to the earth ground, via the transformer coupling capacitance C ps. We denote this as path B.

31 30 Figure 2.5: CM noise circulates via the heatsink (drain) of the primary switch. Figure 2.6: SMPS with isolated transformer and opto-coupler, CM noise flows via the secondary side either from C se or directly to the earth ground.

32 31 We can measure the CM EMI of path B by placing a capacitor C x between the secondary ground to the earth ground which is relatively large compared to C se, so most CM noise flows through this capacitor, or it can be measured directly if the secondary ground and the earth ground is shorted, as described in class I product. A current transformer is employed as shown in Fig Figure 2.7: A CM noise measurement setup for path B. 2.5 Importance of Suppressing Path B CM noise Medical equipment often connect the secondary isolated part directly to patient internal organs, thus the leakage current that is allowed is very strict with a much lower limit, according to IEC-601 (Europe) or UL-2601 (USA). Therefore the CM leakage current that flows in path B is crucial and it must be dealt with to avoid heart defibrillation. However, it can be difficult to attenuate because there could be many parasitic capacitances from the circuit or the chassis linked to path B. In chapter 5, we will demonstrate our proposed noise suppression method is particularly favourable to medical equipment.

33 CM EMI Suppression Methods Conventionally, there are four types of CM EMI suppression methods that are usually employed either separately or as a combination Use of CM Choke Filter In Fig. 2.8, CM choke with inductance L c can be placed at the input of the SMPS and formed a basic CM filtering circuit with the parasitic capacitors C le1, C le2, C ne1 and C ne2. Figure 2.8: CM choke filter placement. In order to specifically tackle path B, another approach is to add a CM choke inductor at the output of the SMPS, demonstrated in Fig. 2.9.

34 33 Figure 2.9: Inductor placed at the output of the SMPS. To obtain satisfactory EMI suppression throughout the conducted EMI range, a bulky CM noise suppression filter is usually required, especially at the low frequency range up to 1 MHz. Large filters are undesirable due to increasing demand for smaller size SMPS. When the required inductance is high, more winding turns are needed. This will inevitably lead to unwanted resistive loss on the winding because the chokes are laid on the power paths. Lai et al [30] proposed to combine the CM choke with a DM choke to shrink the size of the input filtering circuits, this is achievable but not easy to design. Damnjanovic et al [13]-[15] pointed out the importance of CM choke filter size and proposed surface mount device (SMD) CM choke designs in 2006 [13]. Although SMD CM chokes are small, they are typically only effective above 1 MHz, leaving noise below 1 MHz unsuppressed. This frequency limitation is purely due to the ability of the low frequency filtering performance. Roc h et al [16][17] also emphasized the importance of CM choke filter design because it is often difficult to design a low power loss, minimal size filter. Active CM filter solutions are proposed by Chen et al [31] and Biela et al [33], followed by Mortensen [18] and Heldwein et al [19] in 2010 with a very detailed analysis. While in an active filter design, engineers have greater flexibility to fine tune the CM filter beyond a passive design. But

35 34 they are not easily modeled and the gain-bandwidth product is severely limited by the slew rate of the active components, therefore it is only useful in some cases and it is likely to cost a lot more than the passive filtering equivalent to trade for a smaller size filtering solution Minimization of Coupling Capacitance of Transformer From Fig. 2.7 we can see that the main transformer coupling capacitance in path B is a critical component that we can adjust by lowering it between the primary and secondary windings, but this method is not desirable because the result will lead to a high leakage inductance and produces new EMI problems. Herbert [20] proposed the use of two or more transformers in series to reduce the overall parasitic capacitance between the primary and secondary windings thereby minimizing coupling between windings. This option can relax any intermediate transformer requirements during the conversion stages, but it also requires additional magnetic components and tedious designs. Another drawback may involve the increase in the transformers area of occupation in a PCB that lead to a higher transmission or reception of radiated EM noise. Moreover, multiple magnetic components in series can easily lead to multiple resonant points in the frequency spectrum that are very difficult to predict and analyze Primary Secondary Bypass Capacitor (Y capacitor) A bypass capacitor (Y capacitor) is often employed in between the primary and secondary ground as an alternative route for the CM noise to travel, instead of travelling to the earth ground. Fig shows the placement of this capacitor.

36 35 Figure 2.10: Bypass capacitor (Y) connection between the primary and secondary ground. Chen et al [45] have discussed the effects of this Y-Capacitor on CM noise performance, but the applicable capacitance is limited by safety standards, which is determined by the amount of leakage current flowing in between the primary and secondary ground. This method alone usually cannot provide a low enough impedance to shunt most of the CM noise current that originally flows from the secondary ground to the earth ground Faraday Shielding Faraday shielding is another common way to reduce the amount of CM noise travelling across the transformer. A Faraday shield is an addition of electrostatic shield close to the primary side with a tied potential. It provides a return path so that the switching noise, mainly DM type, from the primary source is confined. As a result, the overall CM noise is reduced. An example of a Faraday shield constructed in a transformer is demonstrated in Fig

37 36 Figure 2.11: Faraday shield attenuates the way of CM noise propagation from primary to secondary. Although noise can be diverted away from the secondary side so that the load can be isolated to this CM noise that results with a quieter side, it also creates two new parasitic capacitances C pf and C fs, as shown in Fig Figure 2.12: (a) Coupling capacitance exists between primary and secondary windings. (b) effect on coupling capacitance with a Faraday shield. The shield needs to be connected to a signal ground so that the two capacitances C pf and C fs in series cannot act as a coupling path between the primary and secondary side. Also, this can avoid the shield from becoming a floating

38 37 conductor that can radiate harmful noise. There are strict requirements on the isolations between the windings and the shield, therefore extra isolation is necessary, usually C pf C fs C pf +C fs < C ps (2.3) This implies the coupling between primary and secondary windings will not be as good as before, the leakage inductance of the transformer will increase as a result. This is a similar EMI concern when we try to reduce the coupling capacitance of a transformer discussed in section While the shield helps to reduce the electrical coupling of noise, it cannot avoid the magnetic couplings from the leakage flux of the transformer. Although a Faraday shield can be made as thin as possible to avoid Eddy current flowing along the thickness of the shield, Eddy current will be present along the surface of the shield due to leakage flux that cuts perpendicular to the shield. This is shown in Fig The shield inevitably contributes resistive loss that can be substantial because the Eddy current can circulate freely anywhere on the shield in any direction. Chen et al [42] and Tang et al [46] have made detailed studies in Eddy current loss on a Faraday shield in transformers and showed that it can be very significant when compared to DC resistive loss.

39 38 Figure 2.13: Faraday shield incorporated with Eddy current. In 2002, Redilla [4] proposed Faraday shields with lattice patterns in an attempt to provide low conductivity areas in all directions so that Eddy current loop cannot form easily on the shield. This idea by analogy is similar to a laminated iron core. Figure 2.14: (a) Circle patterned Faraday shield and (b) Lattice patterned Faraday shield. This method requires a very careful design as the size of the holes on a shield may significantly affect its resistive loss and the effectiveness of acting as a shield to isolate the primary and secondary windings.

40 Alternative EMI Reduction Methods Apart from suppressing the noise that is created by the SMPS, there are two other ways that have come into the spotlight in recent researches. These methods use circuit theories to balance the internal SMPS circuitry so that ideally no CM current is detected outside the circuit of interest Wheatstone Based Impedance Balance Method The idea of this approach makes use of the Wheatstone theory and applies to the noise sources in a SMPS circuit. The Wheatstone bridge is named after an English physicist, Sir Charles Wheatstone ( ). Figure.2.15: Wheatstone bridge noise model in SMPS. Assume v p is the noise source of a SMPS and i cm is the CM noise current, in order to have i cm = 0, the balance condition is Z 1 Z 2 = Z 3 Z 4 (2.4) where Z 1, Z 2, Z 3 and Z 4 represent the impedances between the noise source v p to the earth ground.

41 40 In recent years, there have been extensive researches [5]-[8] on this method which have been applied to the front end power factor correction (PFC) circuit. This theory is simple, but involves the accurate measurement of smallvalue parasitic impedances around the circuit, which is difficult and not easily repeatable. Also, it involves relocations and/or separations of the boost inductor, which is necessary to achieve the balancing effect as a Wheatstone bridge. Very small values of capacitors (in several pico farads) are sometimes needed to substantially aid the solution where the authors also suggested a cut-and-try approach is necessary to tune the boost inductor to a balanced circuit. Since the components in a circuit are not ideal, this solution also requires an addition of compensation components and the need to reduce the effective series inductance (ESL) and effective series resistance (ESR) to various places in the circuit so as to reduce the actual magnitude of various identified EM noises, but this complicates the original circuit and increases the possibility of error. To conclude, this method is very constrained with a lot of consideration and remains a challenge for improvement Anti-Phase Noise Generation Rather than trying to balance the circuit components and confine the noise flow within the SMPS, an artificial creation of noise that is exactly out of phase to the original noise is put into practice to cancel this original noise. The circuit model is demonstrated in Fig

42 41 Figure 2.16: Circuit model with anti-phase noise v. Assume there is an anti-phase noise source v that exists with the same magnitude as v s v = v p (2.5) Z 1 = Z 2 (2.6) Then i cm = 0 (2.7) The immediate advantage seen is that it directly tackles the problem by locally cancelling the origin of the noise. This concept was first implemented by Xin et al [1][41] in They employed a winding that can generate a reflection of the noise that is originally created by the switching action of a boost converter. This idea is further developed in 2003 by Cochrane et al [3], a compensation capacitor with an anti-phase winding is used to passively cancel the noise current flowing through the primary FET parasitic capacitor C pe to the earth ground, as shown before in Fig. 2.5 noise path A. However, this simple addition of the capacitor cannot stop the significant part of the noise current

43 42 flowing through the secondary side and returning via the earth ground path, as seen in Fig. 2.6 noise path B. One obvious question we will ask is how to make sure the generated antiphase noise can fully apply on the original noise source and locally cancel it. This noise creation approach contradicts the conventional methods but it fits our beliefs because if we can cancel the noise at the point of the source, then any path around the circuit, including parasitic paths that cannot be seen will become insignificant. As a result, the EM noise analysis of a SMPS can be locally confined in different areas of the circuit board. 2.8 Concluding Remarks CM noise current coupled from the PFC or primary FET heatsink to the earth ground via C pe are often the focus of many researchers. However, this is not the only path that CM current can flow. When the coupling parasitic capacitance between the secondary side to the earth ground C se shown in Fig. 2.6 is comparable to C pe, the parasitic capacitance from the primary FET heatsink to ground in Fig. 2.5, or directly connected to earth ground, which is the case for Class I products, this presents a path with comparable or lower impedance. CM current can flow through the capacitance between the primary and the secondary windings to the earth ground and violates the EMI regulations. In chapter 5, we will demonstrate our proposed solution to cancel the CM noise along this route and show its effectiveness compared to conventional solutions with CM choke.

44 43 Chapter 3 EMI Aspects of Transformer Design In this chapter, we will review the aspects of the main transformer design that are linked to our proposed EMI solutions. One of the most important factors, the leakage inductance is discussed in detail. 3.1 Introduction The main transformer in a SMPS is one of the most critical parts to decide the overall conversion and EMI performance. It facilitates several functions: 1) To accommodate a wide range of voltage levels between the primary and secondary. 2) Be able to provide multiple secondary outputs for a given primary input. 3) Provide isolations between primary and secondary terminals. A particular transformer design in a SMPS may want to achieve several goals within its given specification, such as the points listed above, with size and efficiency requirement. When there are already many factors affecting the conversion performance of the transformer, EMI is often placed as a lower priority because it is not a trivial task to predict in the first place. At the end there

45 44 are many transformer designs that produce excessive EM noise and lead to overdesign of EM filters, consequently degrading the overall SMPS performance. 3.2 Leakage Inductance Ideally, a transformer transfers all the energy from the primary winding W 1 to the secondary winding W 2 instantaneously (apart from topologies for example, flyback), but there is some undesired energy stored during the switching cycles, due to the magnetization of the core and the imperfection of winding coupling. Figure 3.1: Leakage inductance model on a schematic. There is flux not linked to the two windings, this is expressed as the leakage inductance as shown in Fig The leakage energy of W 1 is proportional to the square of the load current and is stored at the places between windings. They appear in series to the transformer windings as L k1 and L k2. Leakage inductance is one parameter that engineers have to watch closely because it creates a few problems. First, when it combines with parasitic capacitances in the transformer, they cause a ringing effect with a time constant δt and generate voltage spikes across the primary winding W 1 during the time when the primary FET is switching off. It is a rich source of EMI since it contains high frequency

46 45 components in the FET drain voltage waveform. This effect is shown in Fig Second, the value of leakage inductance indicates how good the couplings are within a transformer between the windings. A lower leakage inductance means a better coupling between the windings. Figure 3.2: Typical primary FET drain voltage spike seen from an oscilloscope that contains high frequency components, (a) without snubber and (b) with snubber. Usually, a snubber circuit is employed to solve both issues, as shown in Figure 3.3. A snubber circuit can function as a peak voltage clamping circuit, and decrease the rate of change dv dt in the transformer voltage waveform. But energy dissipated at the snubber resistor cannot be recovered. This is often a significant factor that causes the efficiency of the SMPS to be degraded.