LTC6362 Precision, Low Power Rail-to-Rail Input/Output Differential Op Amp/SAR ADC Driver APPLICATIONS TYPICAL APPLICATION

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1 FEATURES n ma Suppy Current n Singe.8 to 5. suppy n Fuy Differentia Input and Output n μ Max Offset otage n 6 Max Input Bias Current n Fast Setting: 55ns to 8-Bit, 8 P-P Output n Low Distortion: 6dBc at Hz, 8 P-P n Rai-to-Rai Inputs and Outputs n 3.9n/ Hz Input-Referred Noise n 8MHz Gain-Bandwidth Product n 34MHz 3dB Bandwidth n Low Power Shutdown: 7µA n 8-Lead MSOP and 3mm 3mm 8-Lead DFN Packages APPLICATIONS n 6-Bit and 8-Bit SAR ADC Drivers n Singe-Ended-to-Differentia Conversion n Low Power Pipeine ADC Driver n Differentia Line Drivers n Battery-Powered Instrumentation L, LT, LTC, LTM, Linear Technoogy and the Linear ogo are registered trademarks of Linear Technoogy Corporation. A other trademarks are the property of their respective owners. LTC636 Precision, Low Power Rai-to-Rai Input/Output Differentia Op Amp/SAR ADC Driver DESCRIPTION The LTC 636 is a ow power, ow noise differentia op amp with rai-to-rai input and output swing that has been optimized to drive ow power SAR ADCs. The LTC636 draws ony ma of suppy current in active operation, and features a shutdown mode in which the current consumption is reduced to 7μA. The ampifier may be configured to convert a singeended input signa to a differentia output signa, and is capabe of being operated in an inverting or noninverting configuration. Low offset votage, ow input bias current, and a stabe high impedance configuration make this ampifier suitabe for use not ony as an ADC driver but aso earier in the signa chain, to convert a precision sensor signa to a baanced (differentia) signa for processing in noisy industria environments. The LTC636 is avaiabe in an 8-ead MSOP package and aso in a compact 3mm 3mm 8-pin eadess DFN package, and operates with guaranteed specifications over a 4 C to 5 C temperature range. TYPICAL APPLICATION IN.µF DC-Couped Interface from a Ground-Referenced Singe-Ended Input to an LTC379-8 SAR ADC SHDN OCM LTC Ω 35.7Ω REF LTC379-8 SAR ADC GND. DD 636 TAa 8-BIT.6Msps AMPLITUDE (dbfs) LTC636 Driving LTC379-8 f IN = khz, dbfs, 6384-Point FFT S =, OUTDIFF = 8.9 P-P HD = 6.dBc HD3 = 4.9dBc SFDR =.db THD = 8.dB SNR =.db SINAD = 99.9dB FREQUENCY (khz) 636 TAb

2 LTC636 ABSOLUTE MAXIMUM RATINGS (Note ) Tota Suppy otage ( )...5. Input Current (IN, IN, OCM, SHDN) (Note )... ±ma Output Short-Circuit Duration (Note 3)... Indefinite Operating Temperature Range (Note 4) LTC636C/LTC636I...4 C to 85 C LTC636H... 4 C to 5 C Specified Temperature Range (Note 5) LTC636C... C to 7 C LTC636I...4 C to 85 C LTC636H... 4 C to 5 C Maximum Junction Temperature... 5 C Storage Temperature Range C to 5 C PIN CONFIGURATION TOP IEW IN OCM OUT 3 4 TOP IEW 8 IN 7 SHDN 6 5 OUT MS8 PACKAGE 8-LEAD PLASTIC MSOP T JMAX = 5 C, θ JA = 73 C/W, θ JC = 45 C/W IN OCM OUT DD PACKAGE 8-LEAD (3mm 3mm) PLASTIC DFN T JMAX = 5 C, θ JA = 39.7 C/W, θ JC = 45 C/W EXPOSED PAD (PIN 9) IS, MUST BE SOLDERED TO PCB IN SHDN OUT ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LTC636CMS8#PBF LTC636CMS8#TRPBF LTGCN 8-Lead Pastic MSOP C to 7 C LTC636IMS8#PBF LTC636IMS8#TRPBF LTGCN 8-Lead Pastic MSOP 4 C to 85 C LTC636HMS8#PBF LTC636HMS8#TRPBF LTGCN 8-Lead Pastic MSOP 4 C to 5 C LTC636CDD#PBF LTC636CDD#TRPBF LGCM 8-Lead (3mm 3mm) Pastic DFN C to 7 C LTC636IDD#PBF LTC636IDD#TRPBF LGCM 8-Lead (3mm 3mm) Pastic DFN 4 C to 85 C LTC636HDD#PBF LTC636HDD#TRPBF LGCM 8-Lead (3mm 3mm) Pastic DFN 4 C to 5 C Consut LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a abe on the shipping container. Consut LTC Marketing for information on non-standard ead based finish parts. For more information on ead free part marking, go to: For more information on tape and ree specifications, go to:

3 LTC636 ELECTRICAL CHARACTERISTICS The denotes the specifications which appy over the fu operating temperature range, otherwise specifications are at T A = 5 C. =, =, CM = OCM = ICM =., SHDN = open. S is defined as ( ). OUTCM is defined as ( OUT OUT )/. ICM is defined as ( IN IN )/. OUTDIFF is defined as ( OUT OUT ). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS OSDIFF (Note 6) Differentia Offset otage (Input Referred) S = 3 ICM =. ICM =.7 S = ICM =. ICM = 4. OSDIFF / T (Note 7) Differentia Offset otage Drift (Input Referred) S = 3 S = I B (Note 8) Input Bias Current S = 3 ICM =. ICM =. S = ICM =. ICM = 4. I B / T Input Bias Current Drift S = 3 S = I OS (Note 8) Input Offset Current S = 3 ICM =. ICM =. S = ICM =. ICM = 4. R IN Input Resistance Common Mode Differentia Mode C IN Input Capacitance Differentia Mode pf e n Differentia Input Noise otage Density f = Hz, Not Incuding R I /R F Noise 3.9 n/ Hz i n Input Noise Current Density f = Hz, Not Incuding R I /R F Noise.8 pa/ Hz e nvocm Common Mode Noise otage Density f = Hz 4.3 n/ Hz ICMR (Note 9) Input Common Mode Range S = 3 S = CMRRI (Note ) CMRRIO (Note ) PSRR (Note ) PSRRCM (Note ) Input Common Mode Rejection Ratio (Input Referred) ICM / OSDIFF S = 3, ICM from to 3 S =, ICM from to Output Common Mode Rejection Ratio S = 3, OCM from. to. (Input Referred) OCM / OSDIFF S =, OCM from. to 4. Differentia Power Suppy Rejection ( S / OSDIFF ) Output Common Mode Power Suppy Rejection ( S / OSCM ) ± ±75 ±75 ±75..9 ±75 ±5 ±75 ± ±35 ±5 ±35 ±85 ±6 ±46 ±35 ±85 ±35 ±65 ±45 ± ±35 ±5 ±45 ± 3 5 µ µ µ µ µ µ µ µ µ/ C µ/ C / C / C MΩ kω S =.8 to db db db db db S =.8 to db 3

4 LTC636 ELECTRICAL CHARACTERISTICS The denotes the specifications which appy over the fu operating temperature range, otherwise specifications are at T A = 5 C. =, =, CM = OCM = ICM =., SHDN = open. S is defined as ( ). OUTCM is defined as ( OUT OUT )/. ICM is defined as ( IN IN )/. OUTDIFF is defined as ( OUT OUT ). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS GCM Common Mode Gain ( OUTCM / OCM ) S = 3, OCM from. to. S =, OCM from. to 4. GCM Common Mode Gain Error (GCM ) S = 3, OCM from. to. S =, OCM from. to 4. BAL Output Baance ( OUTCM / OUTDIFF ) OUTDIFF = Singe-Ended Input Differentia Input ±.7 ±.7 A OL Open-Loop otage Gain 95 db OSCM Common Mode Offset otage ( OUTCM OCM ) S = 3 S = ±6 ±6 ±3 ±3 m m OSCM / T Common Mode Offset otage Drift 45 μ/ C OUTCMR (Note 9) Output Signa Common Mode Range (otage Range for the OCM Pin) OCM Driven Externay, S = 3 OCM Driven Externay, S = OCM Sef-Biased otage at the OCM Pin OCM Not Connected, S = 3 OCM Not Connected, S = ±.6 ± R INOCM Input Resistance, OCM Pin 7 3 kω OUT Output otage, High, Either Output Pin I L = ma, S = 3 I L = 5mA, S = 3 I L = ma, S = I L = 5mA, S = Output otage, Low, Either Output Pin I L = ma, S = 3 I L = 5mA, S = 3 I L = ma, S = I L = 5mA, S = I SC Output Short-Circuit Current, Either Output Pin S = 3 S = SR Sew Rate Differentia 8 P-P Output 45 /μs GBWP Gain-Bandwidth Product f TEST = khz 45 8 MHz 9 MHz f 3dB 3dB Bandwidth R I = R F = 34 MHz HD/HD3 nd/3rd Order Harmonic Distortion Singe-Ended Input f = Hz, OUT = 8 P-P f = Hz, OUT = 8 P-P f = Hz, OUT = 8 P-P t s Setting Time to a P-P Output Step.%.%.5% (6-Bit) 4ppm (8-Bit) Setting Time to a 8 P-P Output Step.%.%.5% (6-Bit) 4ppm (8-Bit) /6 6/3 84/76 S (Note ) Suppy otage Range I S Suppy Current S = 3, Active.9.96 ma.5 ma S = 3, Shutdown 55 3 µa S =, Active.6.8 ma ma S =, Shutdown 7 4 µa / / % % db db ma ma dbc dbc dbc ns ns ns ns ns ns ns ns 4

5 LTC636 ELECTRICAL CHARACTERISTICS The denotes the specifications which appy over the fu operating temperature range, otherwise specifications are at T A = 5 C. =, =, CM = OCM = ICM =., SHDN = open. S is defined as ( ). OUTCM is defined as ( OUT OUT )/. ICM is defined as ( IN IN )/. OUTDIFF is defined as ( OUT OUT ). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS IL SHDN Input Logic Low.8 IH SHDN Input Logic High t ON Turn-On Time μs t OFF Turn-Off Time μs Note : Stresses beyond those isted under Absoute Maximum Ratings may cause permanent damage to the device. Exposure to any Absoute Maximum Rating condition for extended periods may affect device reiabiity and ifetime. Note : Input pins (IN, IN, OCM and SHDN) are protected by steering diodes to either suppy. If the inputs shoud exceed either suppy votage, the input current shoud be imited to ess than ma. In addition, the inputs IN, IN are protected by a pair of back-to-back diodes. If the differentia input votage exceeds.4, the input current shoud be imited to ess than ma. Note 3: A heat sink may be required to keep the junction temperature beow the absoute maximum rating when the output is shorted indefinitey. Note 4: The LTC636C and LTC636I are guaranteed functiona over the operating temperature range of 4 C to 85 C. The LTC636H is guaranteed functiona over the operating temperature range of 4 C to 5 C. Note 5: The LTC636C is guaranteed to meet specified performance from C to 7 C.The LTC636I is guaranteed to meet specified performance from 4 C to 85 C. The LTC636C is designed, characterized and expected to meet specified performance from 4 C to 85 C, but is not tested or QA samped at these temperatures. The LTC636H is guaranteed to meet specified performance from 4 C to 5 C. Note 6: Differentia input referred offset votage incudes offset due to input offset current across source resistance. Note 7: Maximum differentia input referred offset votage drift is determined by a arge samping of typica parts. Drift is not guaranteed by test or QA samped at this vaue. Note 8: Input bias current is defined as the maximum of the input currents fowing into either of the input pins (IN and IN). Input Offset current is defined as the difference between the input currents (I OS = I B I B ). Note 9: Input common mode range is tested by verifying that at the imits stated in the Eectrica Characteristics tabe, the differentia offset ( OSDIFF ) and common mode offset ( OSCM ) have not deviated by more than ±m and ±35m respectivey compared to the ICM =. (at S = ) and ICM =. (at S = 3) cases. Output common mode range is tested by verifying that at the imits stated in the Eectrica Characteristics tabe, the common mode offset ( OSCM ) has not deviated by more than ±5m compared to the OCM =. (at S = ) and OCM =. (at S = 3) cases. Note : Input CMRR is defined as the ratio of the change in the input common mode votage at the pins IN or IN to the change in differentia input referred offset votage. Output CMRR is defined as the ratio of the change in the votage at the OCM pin to the change in differentia input referred offset votage. This specification is strongy dependent on feedback ratio matching between the two outputs and their respective inputs and it is difficut to measure actua ampifier performance (see Effects of Resistor Pair Mismatch in the Appications Information section of this data sheet). For a better indicator of actua ampifier performance independent of feedback component matching, refer to the PSRR specification. Note : Differentia power suppy rejection (PSRR) is defined as the ratio of the change in suppy votage to the change in differentia input referred offset votage. Common mode power suppy rejection (PSRRCM) is defined as the ratio of the change in suppy votage to the change in the common mode offset votage. Note : Suppy votage range is guaranteed by power suppy rejection ratio test. 5

6 LTC636 TYPICAL PERFORMANCE CHARACTERISTICS DIFFERENTIAL INPUT OFFSET OLTAGE (µ) Differentia Input Offset otage vs Temperature S = ±. ICM = OCM = FIE TYPICAL UNITS TEMPERATURE ( C) 636 G INPUT OFFSET CURRENT () Input Offset Current vs Temperature S = ±. ICM = OCM = FIE TYPICAL UNITS TEMPERATURE ( C) G DIFFERENTIAL INPUT OFFSET OLTAGE (µ) Differentia Input Offset otage vs Input Common Mode otage S =, OCM =. TYPICAL UNIT T A = 5 C T A = 5 C T A = 4 C INPUT COMMON MODE OLTAGE () 636 G3 COMMON MODE OFFSET OLTAGE (m) Common Mode Offset otage vs Temperature S = ±. ICM = OCM = FIE TYPICAL UNITS TEMPERATURE ( C) 636 G4 INPUT BIAS CURRENT () Input Bias Current vs Input Common Mode otage 8 S = INPUT COMMON MODE OLTAGE () 636 G5 SUPPLY CURRENT (ma) Suppy Current vs Temperature S = S = TEMPERATURE ( C) 636 G6 SUPPLY CURRENT (ma) Suppy Current vs Suppy otage SUPPLY OLTAGE () T A = 5 C T A = 5 C T A = 4 C SUPPLY CURRENT (ma) Suppy Current vs SHDN otage S = SHDN OLTAGE () T A = 5 C T A = 5 C T A = 4 C SUPPLY CURRENT (µa) Shutdown Suppy Current vs Suppy otage SHDN = T A = 5 C T A = 5 C T A = 4 C SUPPLY OLTAGE () 636 G7 636 G8 636 G9 6

7 TYPICAL PERFORMANCE CHARACTERISTICS LTC636 /DI Turn-On and Turn-Off Transient Response OUTDIFF SHDN INPUT OLTAGE NOISE DENSITY (n/ Hz) Input Noise Density vs Frequency e n i n S = ±. ICM = OCM = INPUT CURRENT NOISE DENSITY (pa/ Hz) OUTPUT IMPEDANCE (Ω) Differentia Output Impedance vs Frequency S = ±. R I = R F = 5µs/DI 636 G. M FREQUENCY (Hz). M M M M G FREQUENCY (Hz) 636 G 636 G COMMON MODE REJECTION RATIO (db) Common Mode Rejection Ratio vs Frequency M M M G FREQUENCY (Hz) S = ±. POWER SUPPLY REJECTION RATIO (db) Differentia Power Suppy Rejection Ratio vs Frequency S = ±. PSRR PSRR M M M G FREQUENCY (Hz) SLEW RATE (/µs) Sew Rate vs Temperature S = ±. R I = R F = OUTDIFF = 8 P-P DIFFERENTIAL INPUT SLEW MEASURED % TO 9% RISING FALLING TEMPERATURE ( C) 636 G3 636 G4 636 G5 Sma-Signa Step Response Large-Signa Step Response Overdriven Output Transient Response INDIFF OUT OUT m/di 5m/DI /DI OUT OUT OUTDIFF S = ±. ns/di INDIFF = m P-P R I = R F = R LOAD = 636 G6 S = ±. INDIFF = 8 P-P R LOAD = ns/di 636 G7 S = ±. INDIFF = 3 P-P R LOAD = µs/di 636 G8 7

8 LTC636 TYPICAL PERFORMANCE CHARACTERISTICS GAIN (db) Frequency Response vs Cosed-Loop Gain S = ±. ICM = OCM = R LOAD = M M M G FREQUENCY (Hz) 636 G9 A =, R I =, R F = A =, R I = 5Ω, R F = A = 5, R I = 4Ω, R F = k A =, R I = Ω, R F = k A =, R I = Ω, R F = k A =, R I = Ω, R F = k FREQUENCY PEAKING (db) Frequency Peaking vs Load Capacitance CAPACITOR ALUES ARE FROM EACH OUTPUT TO GROUND THROUGH 35Ω SERIES RESISTANCE CAPACITIE LOAD (pf) S = ±. ICM = OCM = R I = R F = R LOAD = 636 G SETTLING TIME (ns) Setting Time vs Output Step S =, R I = R F = 6-BIT 8-BIT DIFFERENTIAL OUTPUT STEP ( P-P ) DIFFERENTIAL OUTPUT OLTAGE () Setting Time to 8 P-P Output Step ERROR OUTDIFF.5µs/DI S =, R I = R F = 636 G ERROR (µ) DI = 8-BIT ERROR DIFFERENTIAL OUTPUT ERROR FROM LINEAR FIT (µ) DC Linearity S = ±. ICM = OCM = 6 R I = R F = 8 NO LOAD LINEAR FIT FOR 4 < INDIFF < INDIFF () 636 G 636 G3 DISTORTION (dbc) Harmonic Distortion vs Frequency 7 S =, OCM =. 8 R I = R F = OUTDIFF = 8 P-P SINGLE-ENDED INPUT, 9 GROUND REFERENCED HD3 HD DISTORTION (dbc) Harmonic Distortion vs Input Common Mode otage S =, OCM =. R I = R F = OUTDIFF = 8 P-P f IN = khz DIFFERENTIAL INPUTS HD3 HD DISTORTION (dbc) 8 9 Harmonic Distortion vs Output Ampitude S =, OCM =. R I = R F = f IN = khz SINGLE-ENDED INPUT, GROUND REFERENCED HD3 HD 3 FREQUENCY (khz) INPUT COMMON MODE OLTAGE () OUTDIFF ( P-P ) 636 G4 636 G5 636 G6 8

9 LTC636 PIN FUNCTIONS IN (Pin ): Inverting Input of Ampifier. aid input range is from to. OCM (Pin ): Output Common Mode Reference otage. The votage on this pin sets the output common mode votage eve. If eft foating, an interna resistor divider deveops a defaut votage of. with a suppy. (Pin 3): Positive Power Suppy. Operationa suppy range is.8 to 5. when =. OUT (Pin 4): Positive Output Pin. Output capabe of swinging rai-to-rai. (Pin 6/Exposed Pad Pin 9): Negative Power Suppy, Typicay. Negative suppy can be negative as ong as.8 ( ) 5. sti hods. SHDN (Pin 7): When SHDN is foating or directy tied to the LTC636 is in the norma (active) operating mode. When the SHDN pin is connected to, the part is disabed and draws approximatey 7µA of suppy current. IN (Pin 8): Noninverting Input of Ampifier. aid input range is from to. OUT (Pin 5): Negative Output Pin. Output capabe of swinging rai-to-rai. BLOCK DIAGRAM IN SHDN OUT OCM 34k 34k IN OCM OUT BD 9

10 LTC636 APPLICATIONS INFORMATION Functiona Description The LTC636 is a ow power, ow noise, high DC accuracy fuy differentia operationa ampifier/adc driver. The ampifier is optimized to convert a fuy differentia or singe-ended signa to a ow impedance, baanced differentia output suitabe for driving high performance, ow power differentia successive approximation register (SAR) ADCs. The baanced differentia nature of the ampifier aso provides even-order harmonic distortion canceation, and ow susceptibiity to common mode noise (ike power suppy noise). The outputs of the LTC636 are capabe of swinging raito-rai and can source or sink up to 35mA of current. The LTC636 is optimized for high bandwidth and ow power appications. Load capacitances above pf to ground or 5pF differentiay shoud be decouped with Ω to Ω of series resistance from each output to prevent osciation or ringing. Feedback shoud be taken directy from the ampifier output. Higher votage gain configurations tend to have better capacitive drive capabiity than ower gain configurations due to ower cosed-oop bandwidth. Input Pin Protection The LTC636 input stage is protected against differentia input votages which exceed.4 by two pairs of series diodes connected back-to-back between IN and IN. Moreover, a pins have camping diodes to both power suppies. If any pin is driven to votages which exceed either suppy, the current shoud be imited to under ma to prevent damage to the IC. SHDN Pin The LTC636 has a SHDN pin which when driven to within.8 above the negative rai, wi shut down ampifier operation such that ony 7µA is drawn from the suppies. Pu-down circuitry shoud be capabe of sinking at east 4µA to guarantee compete shutdown across a conditions. For norma operation, the SHDN pin shoud be eft foating or tied to the positive rai. Genera Ampifier Appications In Figure, the gain to OUTDIFF from INP and INM is given by: OUTDIFF = OUT OUT R F INP INM R I ( ) Note from the previous equation, the differentia output votage ( OUT OUT ) is competey independent of input and output common mode votages, or the votage at the common mode pin. This makes the LTC636 ideay suited for pre-ampification, eve shifting and conversion of singe-ended signas to differentia output signas for driving differentia input ADCs. Output Common Mode and OCM Pin The output common mode votage is defined as the average of the two outputs: OUTCM = OCM = OUT OUT As the equation shows, the output common mode votage is independent of the input common mode votage, and is instead determined by the votage on the OCM pin, by means of an interna common mode feedback oop. If the OCM pin is eft open, an interna resistor divider deveops a defaut votage of. with a suppy. The OCM pin can be overdriven to another votage if desired. For exampe, when driving an ADC, if the ADC makes a reference avaiabe for setting the common mode votage, it can be directy tied to the OCM pin, as ong as the ADC is capabe of driving the 7k input resistance presented by the OCM pin. The Eectrica Characteristics tabe specifies the vaid range that can be appied to the OCM pin ( OUTCMR ).

11 APPLICATIONS INFORMATION Input Common Mode otage Range The LTC636 s input common mode votage ( ICM ) is defined as the average of the two input pins, IN and IN. The inputs of the LTC636 are capabe of swinging rai-to-rai and as such the vaid range that can be used for ICM is to. However, due to externa resistive divider action of the gain and feedback resistors, the effective range of signas that can be processed is even wider. The input common mode range at the op amp inputs depends on the circuit configuration (gain), OCM and CM (refer to Figure ). For fuy differentia input appications, where INP = INM, the common mode input is approximatey: ICM = IN IN R I R F OCM R I R CM F R I R F With singe-ended inputs, there is an input signa component to the input common mode votage. Appying ony INP (setting INM to zero), the input common votage is approximatey: ICM = IN IN R I OCM R I R CM INP F R I R F R F R I R F This means that if, for exampe, the input signa ( INP ) is a sine, an attenuated version of that sine signa aso appears at the op amp inputs. CM INP INM Input Bias Current R I OCM R I IN IN R F Figure. Definitions and Terminoogy R F OCM OUT 636 F OUT Input bias current varies according to ICM. For common mode votages ranging from. above the negative suppy to. beow the positive suppy, input bias R F LTC636 current foows I B / ICM = 75/, with I B at ICM =. typicay beow 75 on a suppy. For common mode votages ranging from. beow the positive suppy to. beow the positive suppy, input bias current foows I B / ICM = 5/, with I B at ICM = 4. typicay beow 75 on a suppy. Operating within these ranges aows the ampifier to be used in appications with high source resistances where errors due to votage drops must be minimized. For appications where ICM is within. of either rai, input bias current may reach vaues over µa. Input Impedance and Loading Effects The ow frequency input impedance ooking into the INP or INM input of Figure depends on how the inputs are driven. For fuy differentia input sources ( INP = INM ), the input impedance seen at either input is simpy: R INP = R INM = R I For singe-ended inputs, because of the signa imbaance at the input, the input impedance actuay increases over the baanced differentia case. The input impedance ooking into either input is: R I R INP =R INM = R F R I R F Input signa sources with non-zero output impedances can aso cause feedback imbaance between the pair of feedback networks. For the best performance, it is recommended that the input source output impedance be compensated. If input impedance matching is required by the source, a termination resistor R shoud be chosen (see Figure ) such that: R= R INM R S R INM R S According to Figure, the input impedance ooking into the differentia amp (R INM ) refects the singe-ended source case, given above. Aso, R is chosen as: R=R R S = R R S RR S

12 LTC636 APPLICATIONS INFORMATION R S R INM R I R F R I IN R F OUT S R INP R CHOSEN SO THAT R R INM = R S R CHOSEN TO BALANCE R R S R I R F CM INM OCM R I IN OCM R F 636 F3 OUT R = R S R 645 F4 Figure 3. Rea-Word Appication with Feedback Resistor Pair Mismatch Figure. Optima Compensation for Signa Source Impedance Effects of Resistor Pair Mismatch Figure 3 shows a circuit diagram which takes into consideration that rea word resistors wi not match perfecty. Assuming infinite open-oop gain, the differentia output reationship is given by the equation: OUT(DIFF) = OUT OUT INDIFF R F β β CM OCM R I β AG β AG where R F is the average of R F and R F, and R I is the average of R I and R I. β AG is defined as the average feedback factor from the outputs to their respective inputs: β AG = R I R I R I R F R I R F β is defined as the difference in the feedback factors: R I R I β = R I R F R I R F Here, CM and INDIFF are defined as the average and the difference of the two input votages INP and INM, respectivey: CM = INP INM INDIFF = INP INM When the feedback ratios mismatch (Δβ), common mode to differentia conversion occurs. Setting the differentia input to zero ( INDIFF = ), the degree of common mode to differentia conversion is given by the equation: OUTDIFF ( CM OCM ) β/β AG In genera, the degree of feedback pair mismatch is a source of common mode to differentia conversion of both signas and noise. Using.% resistors or better wi mitigate most probems. A ow impedance ground pane shoud be used as a reference for both the input signa source and the OCM pin. Noise The LTC636 s differentia input referred votage and current noise densities are 3.9n/ Hz and.8pa/ Hz, respectivey. In addition to the noise generated by the ampifier, the surrounding feedback resistors aso contribute noise. A simpified noise mode is shown in Figure 4. The output noise generated by both the ampifier and the feedback components is given by the equation: e no = e ni R F R I e nri R F R I ( i n R F ) e nrf For exampe, if R F = R I =, the output noise of the circuit e no = n/ Hz. If the circuits surrounding the ampifier are we baanced, common mode noise (e nvocm ) does not appear in the differentia output noise equation given above.

13 LTC636 APPLICATIONS INFORMATION e nri e nri R I i n i n e ni R I R F R F e nrf e nrf 636 F4 Figure 4. Simpified Noise Mode The LTC636 s input referred votage noise contributes the equivaent noise of a 9Ω resistor. When the feedback network is comprised of resistors whose vaues are arger than this, the output noise is resistor noise and ampifier current noise dominant. For feedback networks consisting of resistors with vaues smaer than 9Ω, the output noise is votage noise dominant. Lower resistor vaues aways resut in ower noise at the penaty of increased distortion due to increased oading of the feedback network on the output. Higher resistor vaues wi resut in higher output noise, but typicay improved distortion due to ess oading on the output. For this reason, when LTC636 is configured in a differentia gain of, using feedback resistors of at east is recommended. GBW vs f 3dB Gain-bandwidth product (GBW) and 3dB frequency (f 3dB ) have been specified in the Eectrica Characteristics tabe as two different metrics for the speed of the LTC636. GBW is obtained by measuring the open-oop gain of the ampifier at a specific frequency (f TEST ), then cacuating gain f TEST. GBW is a parameter that depends ony on the interna design and compensation of the ampifier and is a suitabe metric to specify the inherent speed capabiity of the ampifier. f 3dB, on the other hand, is a parameter of more practica interest in different appications and is by definition the frequency at which the cosed-oop gain is 3dB ower than its ow frequency vaue. The vaue of f 3dB depends on the e no speed of the ampifier as we as the feedback factor. Since the LTC636 is designed to be stabe in a differentia signa gain of (where R I = R F or β = /), the maximum f 3dB is obtained and measured in this gain setting, as reported in the Eectrica Characteristics tabe. In most ampifiers, the open-oop gain response exhibits a conventiona singe-poe ro-off for most of the frequencies before the unity-gain crossover frequency, and the GBW and unity-gain frequency are cose to each other. However, the LTC636 is intentionay compensated in such a way that its GBW is significanty arger than its f 3dB. This means that at ower frequencies where the ampifier inputs generay operate, the ampifier s gain and thus the feedback oop gain is arger. This has the important advantage of further inearizing the ampifier and improving distortion at those frequencies. Feedback Capacitors In cases where the LTC636 is connected such that the combination of parasitic capacitances (device PCB) at the inverting input forms a poe whose frequency ies within the cosed-oop bandwidth of the ampifier, a capacitor (C F ) can be added in parae with the feedback resistor (R F ) to cance the degradation on stabiity. C F shoud be chosen such that it generates a zero at a frequency cose to the frequency of the poe. In genera, a arger vaue for C F reduces the peaking (overshoot) of the ampifier in both frequency and time domains, but aso decreases the cosed-oop bandwidth (f 3dB ). Board Layout and Bypass Capacitors For singe suppy appications, it is recommended that high quaity.µf ceramic bypass capacitors be paced directy between the and the pin with short connections. The pins (incuding the exposed pad in the DD8 package) shoud be tied directy to a ow impedance ground pane with minima routing. For dua (spit) power suppies, it is recommended that additiona high quaity.µf ceramic capacitors be used to bypass to ground and to ground, again with minima routing. Sma geometry (e.g., 63) surface mount ceramic capacitors have a much higher sef-resonant frequency than eaded capacitors, and perform best with LTC636. 3

14 LTC636 APPLICATIONS INFORMATION To prevent degradation in stabiity response, it is highy recommended that any stray capacitance at the input pins, IN and IN, be kept to an absoute minimum by keeping printed circuit connections as short as possibe. At the output, aways keep in mind the differentia nature of the LTC636, because it is critica that the oad impedances seen by both outputs (stray or intended), be as baanced and symmetric as possibe. This wi hep preserve the baanced operation of the LTC636 that minimizes the generation of even-order harmonics and maximizes the rejection of common mode signas and noise. The OCM pin shoud be bypassed to the ground pane with a high quaity.µf ceramic capacitor. This wi prevent common mode signas and noise on this pin from being inadvertenty converted to differentia signas and noise by impedance mismatches both externay and internay to the IC. Interfacing to ADCs When driving an ADC, an additiona passive fiter shoud be used between the outputs of the LTC636 and the inputs of the ADC. Depending on the appication, a singe-poe RC fiter wi often be sufficient. The samping process of ADCs creates a charge transient that is caused by the switching in of the ADC samping capacitor. This momentariy shorts the output of the ampifier as charge is transferred between ampifier and samping capacitor. The ampifier must recover and sette from this oad transient before the acquisition period has ended, for a vaid representation of the input signa. The RC network between the outputs of the driver and the inputs of the ADC decoupes the samping transient of the ADC (see Figure 5). The capacitance serves to provide the buk of the charge during the samping process, whie the two resistors at the outputs of the LTC636 are used to dampen and attenuate any charge injected by the ADC. The RC fiter gives the additiona benefit of band imiting broadband output noise. The seection of an appropriate fiter depends on the specific ADC, however the foowing procedure is suggested for choosing fiter component vaues. Begin by seecting an appropriate RC time constant for the input signa. Generay, onger time constants improve SNR at the expense of setting time. Output transient setting to 8-bit accuracy wi typicay require over tweve RC time constants. To seect the resistor vaue, remember the resistors in the decouping network shoud be at east Ω. Keep in mind that these resistors aso serve to decoupe the LTC636 outputs from oad capacitance. Too arge of a resistor wi eave insufficient setting time. Too sma of a resistor wi not propery dampen the oad transient of the samping process, proonging the time required for setting. For owest distortion, choose capacitors with ow dieectric absorption (such as a CG mutiayer ceramic capacitor). In genera, arge capacitor vaues attenuate the fixed noninear charge kickback, however very arge capacitor vaues wi detrimentay oad the driver at the desired input frequency and thus cause driver distortion. Smaer input swings wi in genera aow for arger fiter capacitor vaues due to decreased oading demands on the driver. This property however may be imited by the particuar input ampitude dependence of differentia noninear charge kickback for the specific ADC used. In some appications, pacing series resistors at the inputs of the ADC may further improve distortion performance. These series resistors function with the ADC samping capacitor to fiter potentia ground bounce or other high speed samping disturbances. Additionay the resistors imit the rise time of residua fiter gitches that manage to propagate to the driver outputs. Restricting possibe gitch propagation rise time to within the sma signa bandwidth of the driver enabes ess disturbed output setting. For the specific appication of LTC636 driving the LTC379 8 SAR ADC in a gain of A = configuration, the recommended component vaues of the RC fiter for varying fiter bandwidths are provided in Figure 5. These component vaues are chosen for optima distortion performance. Broadband output noise wi vary with fiter bandwidth. 4

15 APPLICATIONS INFORMATION LTC636 R FILT IN SHDN OUT C CM LTC636. OCM 34k 34k R S C DIFF R S A IN REF LTC379-8 SAR ADC GND DD IN IN OCM 3 4.µF.µF OUT R FILT C CM 636 F5 FILTER BW (Hz) 38k.M 3.M M 9M R FILT (Ω) C CM (pf) C DIFF (pf) R S (Ω) Figure 5. Recommended Interface Soutions for Driving the LTC379-8 SAR ADC TYPICAL APPLICATIONS Singe-Ended-to-Differentia Conversion of a P-P Ground-Referenced Input with Gain of A =.4 to Drive an ADC 4. IN k IN.µF SHDN k OCM OUT 86Ω. LTC636 86Ω 35.7Ω Ω 35.7Ω Ω REF LTC379-8 SAR ADC GND. DD 636 TA 4. OUT. 5

16 LTC636 TYPICAL APPLICATIONS Singe-Ended-to-Differentia Conversion of a P-P,. Referenced Input with Gain of A =.6 to Drive an ADC 4. OUT.. IN 69Ω.µF SHDN 69Ω OCM LTC Ω 35.7Ω Ω Ω REF LTC379-8 SAR ADC GND DD 636 TA3 CM. OUT 4.. Differentiay Driving an ADC with IN = 8 P-P and Gain of A = OCM INM.µF SHDN. OUT. LTC Ω 35.7Ω INP. OUT. Ω Ω REF LTC379-8 SAR ADC GND. DD 636 TA4 Singe-Ended-to-Differentia Conversion of a 4 P-P Input with Gain of A = to Drive an ADC for Appications Where the Importance of High Input Impedance Justifies Some Degradation in Distortion, Noise, and DC Accuracy. Input Is True High Impedance, However Common Mode Noise and Offset Are Present on the Output. Additionay, When the Input Signa Exceeds.8 P-P, a Step in Input Offset Wi Occur That Wi Degrade Distortion Performance OUT 4....µF OCM SHDN 4. LTC Ω 35.7Ω Ω Ω REF LTC379-8 SAR ADC GND DD IN TA5 OUT. 6

17 TYPICAL APPLICATIONS Differentiay Driving a Pipeine ADC with A = LTC636 CM =.9 Ω OUT.µF 3.3.5nF.8 INPUT BW =.MHz FULL SCALE = P-P.µF SHDN OCM LTC636 3Ω 3Ω 5Ω.5nF 5Ω.5nF DD CM A IN LTC6 PIPELINE ADC GND 636 TA8 6 BIT 5Msps IN OUT MEASURED PERFORMANCE FOR LTC636 DRIING LTC6: INPUT: f IN = khz, dbfs SNR: 77.dB HD: 98.9dBc HD3:.3dBc THD: 96.3dB Differentia Line Driver Connected in Gain of A = 3 IN IN.µF SHDN OCM LTC636 OUT 49.9Ω 49.9Ω 636 TA6 Ω 3 OUT 7

18 LTC636 TYPICAL APPLICATIONS LTC636 Used as Lowpass Fiter/Driver with P-P Singed-Ended Input, Driving a SAR ADC.8nF k CM 4-POLE FILTER f 3dB = 5kHz IN CM.7k.7k.7k.8nF.8nF.7k.7k.µF.7k k.8nf.µf LTC636.8nF.8nF 4.. Ω.8nF Ω 4...8nF.8nF REF LTC38-6 SAR ADC GND. DD 636 TA9 6 BIT Msps Differentia A = Configuration Using an LT 54 Quad-Matched Resistor Network 4.. INM 4. INP. 3 4 LT54 R R R3 R µF OCM SHDN LTC OUT. 4. OUT. 636 TAa CMRR Comparison Using the LT54 and % 4 Resistors CMRR (db) S =, USING LT54 MATCHED RESISTORS USING % 4 RESISTORS FREQUENCY (Hz) 636 TAb 8

19 PACKAGE DESCRIPTION Pease refer to for the most recent package drawings. LTC636 MS8 Package 8-Lead Pastic MSOP (Reference LTC DWG # Rev F).889 ±.7 (.35 ±.5) 5.3 (.6) MIN (.6.36).4 ±.38 (.65 ±.5) TYP.65 (.56) BSC 3. ±. (.8 ±.4) (NOTE 3) (.5) REF RECOMMENDED SOLDER PAD LAYOUT GAUGE PLANE.8 (.7).54 (.) DETAIL A NOTE:. DIMENSIONS IN MILLIMETER/(INCH). DRAWING NOT TO SCALE 6 TYP.53 ±.5 (. ±.6) DETAIL A SEATING PLANE 4.9 ±.5 (.93 ±.6). (.43) MAX..38 (.9.5) TYP.65 (.56) BSC DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED.5mm (.6") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED.5mm (.6") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE.mm (.4") MAX 3. ±. (.8 ±.4) (NOTE 4).86 (.34) REF.6 ±.58 (.4 ±.) MSOP (MS8) 37 RE F 9

20 LTC636 PACKAGE DESCRIPTION Pease refer to for the most recent package drawings. DD Package 8-Lead Pastic DFN (3mm 3mm) (Reference LTC DWG # Rev C).7 ± ±.5. ±.5.65 ±.5 ( SIDES) PACKAGE OUTLINE.5 ±.5.5 BSC.38 ±.5 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R =.5 TYP ±. PIN TOP MARK (NOTE 6). REF 3. ±. (4 SIDES).75 ± ±. ( SIDES) 4.5 ±.5.5 BSC.38 ±. BOTTOM IEW EXPOSED PAD (DD8) DFN 59 RE C NOTE:. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M-9 ARIATION OF (WEED-). DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED.5mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN LOCATION ON TOP AND BOTTOM OF PACKAGE

21 LTC636 REISION HISTORY RE DATE DESCRIPTION PAGE NUMBER A 5/ Added DFN package,, 9, 3, Added typica spec for P-P t S 4 Information furnished by Linear Technoogy Corporation is beieved to be accurate and reiabe. However, no responsibiity is assumed for its use. Linear Technoogy Corporation makes no representation that the interconnection of its circuits as described herein wi not infringe on existing patent rights.

22 LTC636 TYPICAL APPLICATION Singe-Ended-to-Differentia Conversion of a P-P Ground-Referenced Input with Gain of A =.8 to Drive a Reference SAR ADC 4. IN.4k IN.µF OCM SHDN LTC636.4k OUT. 35.7Ω 35.7Ω Ω Ω REF LTC379-8 SAR ADC GND. DD 636 TA7 8 BIT.6Msps 4. OUT. RELATED PARTS PART NUMBER DESCRIPTION COMMENTS Operationa Ampifiers LT635 LTC646/LTC647/ LTC648 LTC636 LTC99/LTC99-X LT994 Low Noise, Singe-Ended to Differentia Converter/ ADC Driver Singe/Dua/Quad 8MHz Rai-to-Rai Low Power Op Amps GHz ery Low Noise Singe-Ended SAR ADC Driver with True Zero Output 3MHz to 4MHz Fuy Differentia Input/Output Ampifiers 7MHz Low Noise, Low Distortion Fuy Differentia Input/Output Ampifier/Driver 4.8mA, 97dBc Distortion at Hz, 4 PP Output ma/ampifier, 4.n/ Hz 3.6mA, HD/HD3 = 3dBc/9dBc at 4kHz, 4 P-P Output Interna Feedback Resistors Avaiabe (G =,, 5,) 3mA, 94dBc Distortion at MHz, P-P Output ADCs LTC379-8/LTC378-8 LTC377-8/LTC Bit,.6Msps/Msps/5ksps/5ksps Seria, Low Power ADC. Suppy, Differentia Input,.dB SNR, ± Input Range, DGC, Pin Compatibe Famiy in MSOP-6 and 4mm 3mm DFN-6 Packages LTC38-6/LTC378-6 LTC377-6/LTC Bit, Msps/Msps/5ksps/5ksps Seria, Low Power ADC. Suppy, Differentia Input, 96.dB SNR, ± Input Range, DGC, Pin Compatibe Famiy in MSOP-6 and 4mm 3mm DFN-6 Packages LTC383-6/LTC38-6/ LTC Bit, Msps/5ksps/5ksps Seria, Low Power ADC. Suppy, Differentia Input, 9dB SNR, ±. Input Range, Pin Compatibe Famiy in MSOP-6 and 4mm 3mm DFN-6 Packages LTC393-6/LTC39-6/ LTC Bit, Msps/5ksps/5ksps Parae/Seria ADC Suppy, Differentia Input, 94dB SNR, ±4.96 Input Range, Pin Compatibe Famiy in 7mm 7mm LQFP-48 and QFN-48 Packages LTC355-4/LTC Bit, 3.5Msps Seria ADC 3.3 Suppy, -Channe, Unipoar/Bipoar, 8mW, MSOP- Package LTC366 -Bit, 3Msps Seria ADC.3 to 3.6 Suppy 6- and 8-Lead TSOT-3 Packages LTC6/LTC6/ LTC6 6-Bit, 65/4/5Msps Low Power ADC.8 Suppy, Differentia Input, 77dB SNR, P-P Input Range, Pipeine Converter in 7mm 7mm QFN-48 Package LT 6 RE A PRINTED IN USA Linear Technoogy Corporation 63 McCarthy Bvd., Mipitas, CA (48) 43-9 FAX: (48) LINEAR TECHNOLOGY CORPORATION