LT1722/LT1723/LT1724 Single, Dual, Quad 200MHz Low Noise Precision Op Amps FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION
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- Dwight Harmon
- 7 years ago
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1 FEATURES DESCRIPTION n 3.n/ Hz Input Noise otage n 3.7mA Suppy Current n 2MHz Gain Bandwidth n Low Tota Harmonic Distortion: dbc at MHz n 7/μs Sew Rate n 4μ Maximum Input Offset otage n 3nA Maximum Input Bias Current n Unity-Gain Stabe n Capacitive Load Stabe Up to pf n 23mA Minimum Output Current n Specifi ed at ± and Singe n Low Profi e (mm) SOT-23 (ThinSot ) Package APPLICATIONS n ideo and RF Ampifi cation n ADSL, HDSL II, DSL Receivers n Active Fiters n Wideband Ampifi ers n Buffers n Data Acquisition Systems L, LT, LTC, LTM, Linear Technoogy and the Linear ogo are registered trademarks of Linear Technoogy Corporation. ThinSOT is a trademark of Linear Technoogy Corporation. A other trademarks are the property of their respective owners. LT722/LT723/LT724 Singe, Dua, Quad 2MHz Low Noise Precision Op Amps The LT 722/LT723/LT724 are singe/dua/quad, ow noise, ow power, high speed operationa ampifi ers. These products feature ower input offset votage, ower input bias current and higher DC gain than devices with comparabe bandwidth. The 2MHz gain bandwidth ensures high open-oop gain at video frequencies. The ow input noise votage is achieved with reduced suppy current. The tota noise is optimized for a source resistance between.k and 2k. Due to the input bias current canceation technique used, the resistance seen by each input does not need to be baanced. The output drives a Ω oad to ±3 with ± suppies. On a singe suppy the output swings from. to 3. with a Ω oad connected to 2.. The ampifier is unity-gain stabe (C LOAD pf). The LT722/LT723/LT724 are manufactured on Linear Technoogy s advanced ow votage compementary bipoar process. The LT722 is avaiabe in the SO- and -pin SOT-23 packages. The LT723 is avaiabe in the SO- and MS packages. The LT724 is avaiabe in the 4-ead SO package. TYPICAL APPLICATION Differentia ideo Line Driver R3 7Ω R 2k C pf Line Driver Muitburst ideo Signa IN 7Ω SOURCE R2 2k R 7Ω /2 LT723 R4 2k /2 LT723 C2 pf IN R7 62.Ω R6 62.Ω IN 723 TA 2Ω CAT- TWISTED PAIR IN /2 62.Ω OUT LOAD OUT 62.Ω IN /2 LOAD OUT./DI IN /DI OUT./DI 723 TA2
2 LT722/LT723/LT724 ABSOLUTE MAXIMUM RATINGS (Note ) Tota Suppy otage ( to ) Input otage... ± S Differentia Input otage (Note 2)...±.7 Input Current (Note 2)... ±ma Output Short-Circuit Duration (Note 3)... Indefinite Operating Temperature Range (Note 4)...4 C to C Specifi ed Temperature Range (Note )...4 C to C Maximum Junction Temperature... C Storage Temperature Range... 6 C to C Lead Temperature (Sodering, sec)...3 C PIN CONFIGURATION LT722 TOP IEW LT722 TOP IEW LT723 TOP IEW NC IN 2 IN S PACKAGE -LEAD PLASTIC SO T JMAX = C, θ JA = C/W NC OUT NC OUT 2 IN 3 4 IN S PACKAGE -LEAD PLASTIC TSOT-23 T JMAX = C, θ JA = 2 C/W OUT A IN A 2 IN A 3 4 A 7 6 S PACKAGE -LEAD PLASTIC SO T JMAX = C, θ JA = 9 C/W B OUT B IN B IN B LT723 OUT A IN A IN A TOP IEW A 7 OUT B 6 IN B IN B MS PACKAGE -LEAD PLASTIC MSOP T JMAX = C, θ JA = 2 C/W B LT724 OUT A IN A IN A IN B IN B TOP IEW A D B C OUT D IN D IN D IN C IN C OUT B 7 OUT C S PACKAGE 4-LEAD PLASTIC SO T JMAX = C, θ JA = C/W 2
3 LT722/LT723/LT724 ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LT722CS#PBF LT722CS#TRPBF 722 -Lead Pastic SO C to 7 C LT722IS#PBF LT722IS#TRPBF 722I -Lead Pastic SO 4 C to C LT722CS#PBF LT722CS#TRPBF LTZB -Lead Pastic TSOT-23 C to 7 C LT722IS#PBF LT722IS#TRPBF LTZB -Lead Pastic TSOT-23 4 C to C LT723CS#PBF LT723CS#TRPBF 723 -Lead Pastic SO C to 7 C LT723IS#PBF LT723IS#TRPBF 723I -Lead Pastic SO 4 C to C LT723CMS#PBF LT723CMS#TRPBF LTYC -Lead Pastic MSOP C to 7 C LT723IMS#PBF LT723IMS#TRPBF LTZA -Lead Pastic MSOP 4 C to C LT724CS#PBF LT724CS#TRPBF LT724CS 4-Lead Pastic SO C to 7 C LT724IS#PBF LT724IS#TRPBF LT724IS 4-Lead Pastic SO 4 C to C Consut LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a abe on the shipping container. Consut LTC Marketing for information on non-standard ead based fi nish parts. For more information on ead free part marking, go to: For more information on tape and ree specifications, go to: 3
4 LT722/LT723/LT724 ELECTRICAL CHARACTERISTICS, S = ±, CM =, uness otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS OS Input Offset otage (Note 6) LT722 SOT-23 and LT723 MS I OS Input Offset Current 4 3 na I B Input Bias Current 4 3 na e n Input Noise otage f = khz 3. n/ Hz i n Input Noise Current f = khz.2 pa/ Hz R IN Input Resistance CM = ±3. Differentia 3 C IN Input Capacitance 2 pf Input otage Range Input otage Range CMRR Common Mode Rejection Ratio CM = ±3. db PSRR Power Suppy Rejection Ratio S = ±2.3 to ±. 7 9 db A OL Large-Signa otage Gain OUT = ±3, R L = Ω OUT = ±3, R L = Ω OUT Output Swing R L = Ω, IN = ±m R L = Ω, IN = ±m I OUT Output Current OUT = ±3, m Overdrive 23 ma I SC Short-Circuit Current OUT =, IN = ± 3 9 ma SR Sew Rate A =, (Note 7) 4 7 /μs Fu Power Bandwidth 3 Peak, (Note ) 3.7 MHz GBW Gain Bandwidth f = 2kHz 2 MHz t S Setting Time A =, 2,.% A =, 2,.% t r, t f Rise Time, Fa Time A =, % to 9%, IN =.2 P-P, R L = Ω 6 ns Overshoot A =, IN =.2 P-P, R L = Ω, R F = Ω % Propagation Deay % IN to % OUT =.2 P-P, R L = Ω 3 ns R O Output Resistance A =, f = MHz. Ω Channe Separation OUT = ±3, R L = Ω 2 9 db I S Suppy Current Per Ampifi er ma. S =, CM = 2., R L to 2., uness otherwise noted. OS Input Offset otage (Note 6) LT722 SOT-23 and LT723 MS 2 3 μ μ I OS Input Offset Current 2 3 na I B Input Bias Current 2 3 na e n Input Noise otage f = khz 4 n/ Hz i n Input Noise Current f = khz. pa/ Hz R IN Input Resistance CM =. to 3. Differentia 7 ±3.2 ± ±3. ± C IN Input Capacitance 2 pf Input otage Range Input otage Range μ μ MΩ kω /m /m ns ns MΩ kω 4
5 LT722/LT723/LT724 ELECTRICAL CHARACTERISTICS. S =, CM = 2., R L to 2., uness otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS CMRR Common Mode Rejection Ratio CM =. to 3. db A OL Large-Signa otage Gain OUT =. to 3., R L = Ω 4 /m OUT Output Swing Output Swing R L = Ω, IN = ±m R L = Ω, IN = ±m I OUT Output Current OUT = 3. or., m Overdrive 2 ma I SC Short-Circuit Current OUT = 2., IN = ± 22 ma SR Sew Rate A =, (Note 7) 4 7 /µs Fu Power Bandwidth Peak, (Note ).7 MHz GBW Gain Bandwidth (Note ) f = 2kHz MHz t r, t f Rise Time, Fa Time A =, % to 9%, IN =.2 P-P, R L = Ω ns Overshoot A =, IN =.2 P-P, R L = Ω 6 % Propagation Deay % IN to % OUT,., R L = Ω 3 ns R O Output Resistance A =, f = MHz.9 Ω Channe Separation OUT =. to 3., R L = Ω 2 9 db I S Suppy Current Per Ampifi er 3. ma The denotes the specifi cations which appy over the temperature range of C T A 7 C. S = ±, CM =, uness otherwise noted. (Note ) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS OS Input Offset otage (Note 6) LT722 SOT-23 and LT723 MS Input OS Drift (Note 9) 3 7 μ/ C I OS Input Offset Current 3 na I B Input Bias Current 3 na Input otage Range 3. Input otage Range 3. CMRR Common Mode Rejection Ratio CM = ±3. 7 db PSRR Power Suppy Rejection Ratio S = ±2.3 to ±. 76 db A OL Large-Signa otage Gain OUT = ±3, R L = Ω OUT = ±3, R L = Ω OUT Output Swing R L = Ω, IN = ±m R L = Ω, IN = ±m 9 6 ±3. ±3. I OUT Output Current OUT = ±3, m Overdrive 22 ma I SC Short-Circuit Current OUT =, IN = ± 3 ma SR Sew Rate A =, (Note 7) 3 /μs GBW Gain Bandwidth f = 2kHz MHz Channe Separation OUT = ±3, R L = Ω db I S Suppy Current Per Ampifi er.4 ma 7 μ μ /m /m
6 LT722/LT723/LT724 ELECTRICAL CHARACTERISTICS The denotes the specifi cations which appy over the temperature range of C T A 7 C. S =, CM = 2., R L to 2., uness otherwise noted. (Note ) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS OS Input Offset otage (Note 6) LT722 SOT-23 and LT723 MS Input OS Drift (Note 9) 3 7 μ/ C I OS Input Offset Current 3 na I B Input Bias Current 3 na Input otage Range 3. Input otage Range. CMRR Common Mode Rejection Ratio CM =. to 3. 7 db A OL Large-Signa otage Gain OUT =. to 3., R L = Ω 3 /m OUT Output Swing R L = Ω, IN = ±m 3. Output Swing R L = Ω, IN = ±m.4 I OUT Output Current OUT = 3., or., m Overdrive 9 ma I SC Short-Circuit Current OUT = 2., IN = ± ma SR Sew Rate A =, (Note 7) 3 /μs GBW Gain Bandwidth (Note ) f = 2kHz MHz Channe Separation OUT =. to 3., R L = Ω db I S Suppy Current.9 ma The denotes the specifi cations which appy over the temperature range of 4 C T A C. S = ±, CM =, uness otherwise noted. (Note ) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS OS Input Offset otage (Note 6) LT722 SOT-23 and LT723 MS Input OS Drift (Note 9) 3 μ/ C I OS Input Offset Current 4 na I B Input Bias Current 4 na Input otage Range 3. Input otage Range 3. CMRR Common Mode Rejection Ratio CM = ±3. 7 db PSRR Power Suppy Rejection Ratio S = ±2. to ±. 7 db A OL Large-Signa otage Gain OUT = ±3, R L = Ω OUT = ±3, R L = Ω OUT Output Swing R L = Ω, IN = ±m R L = Ω, IN = ±m I OUT Output Current OUT = ±3, m Overdrive 2 ma I SC Short-Circuit Current OUT =, IN = ± 2 ma SR Sew Rate A =, (Note 7) 2 /μs GBW Gain Bandwidth f = 2kHz 9 MHz Channe Separation OUT = ±3, R L = Ω db I S Suppy Current.9 ma ±3. ± μ μ μ μ /m /m 6
7 LT722/LT723/LT724 ELECTRICAL CHARACTERISTICS The denotes the specifi cations which appy over the temperature range of 4 C T A C. S =, CM = 2., R L to 2., uness otherwise noted. (Note ) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS OS Input Offset otage (Note 6) LT722 SOT-23 and LT723 MS Input OS Drift (Note 9) 3 μ/ C I OS Input Offset Current 4 na I B Input Bias Current 4 na Input otage Range 3. Input otage Range. CMRR Common Mode Rejection Ratio CM =. to 3. 7 db A OL Large-Signa otage Gain OUT =. to 3., R L = Ω 2 /m OUT Output Swing R L = Ω, IN = ±m 3. Output Swing R L = Ω, IN = ±m. I OUT Output Current OUT = 3. or., 3m Overdrive ma I SC Short-Circuit Current OUT = 2., IN = ± ma SR Sew Rate A =, (Note 7) 2 /μs GBW Gain Bandwidth (Note ) f = 2kHz 9 MHz Channe Separation OUT =. to 3., R L = Ω db I S Suppy Current 6.4 ma 2 µ µ Note : Stresses beyond those isted under Absoute Maximum Ratings may cause permanent damage to the device. Exposure to any Absoute Maximum Rating condition for extended periods may affect device reiabiity and ifetime. Note 2: The inputs are protected by back-to-back diodes. If the differentia input votage exceeds.7, the input current shoud be imited to ess than ma. Note 3: A heat sink may be required to keep the junction temperature beow the absoute maximum rating when the output is shorted indefinitey. Note 4: The LT722C/LT722I, LT723C/LT723I, LT724C/LT724I are guaranteed functiona over the operating temperature range of 4 C to C. Note : The LT722C/LT723C/LT724C are guaranteed to meet specifi ed performance from C to 7 C. The LT722C/LT723C/LT724C are designed, characterized and expected to meet specifi ed performance from 4 C to C but are not tested or QA samped at these temperatures. The LT722I/LT723I/LT724I are guaranteed to meet specified performance from 4 C to C. Note 6: Input offset votage is puse tested and is excusive of warm-up drift. Note 7: Sew rate is measured between ±2 on the output with ±3 input for ± suppies and ± on the output with ±. input for singe suppy. (For suppy, the votage eves are 2. referred.) Note : Fu power bandwidth is cacuated from the sew rate: FPBW = SR/2π P Note 9 : This parameter is not % tested. Note : This parameter is guaranteed through correation with sew rate. 7
8 LT722/LT723/LT724 TYPICAL PERFORMANCE CHARACTERISTICS SUPPLY CURRENT (ma) Suppy Current vs Temperature. PER AMPLIFIER S = S = ± TEMPERATURE ( C) INPUT COMMON MODE RANGE () Input Common Mode Range vs Suppy otage ( OS ) < μ SUPPLY OLTAGE (±) INPUT BIAS CURRENT (na) Input Bias Current vs Common Mode otage S = ± T A = 4 C T A = C T A = 2 C INPUT COMMON MODE OLTAGE () 723 G 723 G2 723 G3 6 Input Bias Current vs Temperature Input Noise Spectra Density 9. Open-Loop Gain vs Resistive Load INPUT BIAS CURRENT (na) S = I B I B I B I B S = ± INPUT OLTAGE NOISE (n/ Hz) i n e n INPUT CURRENT NOISE (pa/ Hz) OPEN-LOOP GAIN (db) S = ±, O = ±3 S = ±2., O = ± TEMPERATURE ( C) 2... FREQUENCY (khz) 74. LOAD RESISTANCE (Ω) 723 G4 723 G 723 G6 TOTAL NOISE OLTAGE (n/ Hz) Tota Noise vs Unmatched Source Resistance Warm-Up Drift vs Time OS Shift vs CM and S S = ± f = khz TOTAL NOISE RESISTOR NOISE... SOURCE RESISTANCE, R S (kω) R S OFFSET OLTAGE DRIFT (μ) LT722S TYPICAL DATA S = ± S = ± TIME AFTER POWER-UP (SEC) OS SHIFT (μ) S = ± S = ±6.3 S = ±4 S = ±3 S = ±6 S = ±2. TYPICAL PART COMMON MODE OLTAGE () 723 G7 723 G 723 G9
9 TYPICAL PERFORMANCE CHARACTERISTICS LT722/LT723/LT724 OFFSET OLTAGE (μ) OS vs Temperature S = ±2. TYPICAL PART S = ± TEMPERATURE ( C) OUTPUT OLTAGE ( P-P ) Undistorted Output Swing vs Frequency. A =, R F = Ω, R IN = Ω A =, R F = Ω S = ± R L = Ω 2% MAX DISTORTION OUTPUT OLTAGE ( P-P ) Undistorted Output Swing vs Frequency S = R L = Ω 2% MAX DISTORTION A =, R F = Ω, R IN = Ω A =, R F = Ω 723 G 723 G 723 G2 OPEN-LOOP GAIN (db) Open-Loop Gain vs Temperature S = ±, O = ±3 R L = Ω R L = Ω S =, O = ± R L = Ω OUTPUT OLTAGE SWING () Output otage Swing vs Suppy otage IN = m R L = Ω R L = Ω R L = Ω R L = Ω OUTPUT SHORT-CIRCIUT CURRENT (ma) Output Short-Circuit Current vs Temperature S = ± S = SOURCE SINK SINK SOURCE TEMPERATURE ( C) SUPPLY OLTAGE (±) TEMPERATURE ( C) 723 G3 723 G 723 G GAIN (db) Gain and Phase vs Frequency Overshoot vs Capacitive Load Output Impedance vs Frequency ± GAIN PHASE ± A = R F = R G = Ω G PHASE (DEG) OERSHOOT (%) S = ± R L = Ω IN = 2 P-P f = MHz A =, R F = Ω, R S = Ω A =, R F = Ω, R S = Ω A =, R F = Ω, R S = Ω CAPACITIE LOAD (pf) 723 G7 OUTPUT IMPEDANCE (Ω)... S = ± A = A = A = G 9
10 LT722/LT723/LT724 TYPICAL PERFORMANCE CHARACTERISTICS GAIN (db) Gain vs Frequency, A = Gain vs Frequency, A = Gain vs Frequency, A = A = R F = Ω NO R L± C L = pf C L = pf C L = pf 723 G9 GAIN (db) A = NO R L NO C L ± R F = Ω R F = Ω R F = k 723 G2 GAIN (db) A = R F = R G = Ω NO R L± C L = pf C L = pf C L = pf 723 G2 CROSSTALK (db) Channe Separation vs Frequency O = 6 P-P R L = Ω 723 G22 POWER SUPPLY REJECTION RATIO (db) Power Suppy Rejection Ratio vs Frequency PSRR PSRR S = ± A = G23 COMMON MODE REJECTION RATIO (db) Common Mode Rejection Ratio vs Frequency S = ± G24 SLEW RATE (/μs) Sew Rate vs Temperature S = ±2., SR A = R G = R F = Ω S = ±, SR S = ±, SR S = ±2., SR TEMPERATURE ( C) 723 G4 PHASE MARGIN (DEG) Phase Margin vs Suppy otage A = IN = 2dBm R G = R F = Ω C L = pf C L = 2pF C L = pf R L = Ω R L = Ω R L = Ω R L = Ω R L = Ω R L = Ω SUPPLY OLTAGE (±) 723 G4 GAIN BANDWIDTH (MHz) Gain Bandwidth vs Suppy otage R L = Ω C L = pf C L = 2pF C L = pf R L = Ω A = IN = 2dBm R G = R F = Ω C L = pf C L = 2pF C L = pf SUPPLY OLTAGE (±) 723 G42
11 TYPICAL PERFORMANCE CHARACTERISTICS LT722/LT723/LT724 SLEW RATE (/μs) Sew Rate vs Suppy otage IN_P-P = S, OUT_MES AT 2/3 OF IN_P-P A = R F = R G = R L = Ω SR SR SR SR IN = ±., OUT_MES AT ± SUPPLY OLTAGE (±) HARMONIC DISTORTION (dbc) Harmonic Distortion vs Frequency A =, O =.2 P-P S = ± A = R F = Ω R IN = Ω O =.2 P-P R L = Ω, 2ND R L = Ω, 3RD R L = Ω, 3RD R L = Ω, 2ND HARMONIC DISTORTION (dbc) Harmonic Distortion vs Frequency A =, O =.2 P-P S = A = R F = Ω R IN = Ω O =.2 P-P R L = Ω, 2ND R L = Ω, 3RD R L = Ω, 3RD R L = Ω, 2ND 723 G2 723 G G27 HARMONIC DISTORTION (dbc) Harmonic Distortion vs Frequency A = 2, O =.2 P-P S = ± A = 2 R F = Ω O =.2 P-P R L = Ω, 3RD R L = Ω, 2ND R L = Ω, 3RD HARMONIC DISTORTION (dbc) Harmonic Distortion vs Frequency A = 2, O =.2 P-P S = A = 2 R F = Ω O =.2 P-P R L = Ω, 3RD R L = Ω, 2ND R L = Ω, 3RD HARMONIC DISTORTION (dbc) Harmonic Distortion vs Frequency A =, O = 2 P-P S = ± A = R F = Ω R IN = Ω O = 2 P-P R L = Ω, 2ND R L = Ω, 3RD R L = Ω, 3RD R L = Ω, 2ND. R L = Ω, 2ND. R L = Ω, 2ND. 723 G2 723 G G3 HARMONIC DISTORTION (dbc) Harmonic Distortion vs Frequency A =, O = 2 P-P S = A = R F = Ω R IN = Ω O = 2 P-P R L = Ω, 2ND R L = Ω, 3RD R L = Ω, 3RD R L = Ω, 2ND 723 G3 HARMONIC DISTORTION (dbc) Harmonic Distortion vs Frequency A = 2, O = 2 P-P S = ± A = 2 R F = Ω O = 2 P-P R L = Ω, 2ND R L = Ω, 3RD R L = Ω, 3RD R L = Ω, 2ND 723 G32
12 LT722/LT723/LT724 TYPICAL PERFORMANCE CHARACTERISTICS HARMONIC DISTORTION (dbc) Harmonic Distortion vs Frequency A = 2, O = 2 P-P S = A = 2 R F = Ω O = 2 P-P R L = Ω, 3RD R L = Ω, 2ND R L = Ω, 3RD R L = Ω, 2ND 723 G33 OUTPUT STEP () Setting Time vs Output Step.% SETTLING.% SETTLING.% SETTLING S = ± A = R F = Ω C F = pf.% SETTLING SETTLING TIME (ns) 723 G43 Large-Signa Transient, A = Sma-Signa Transient, A = Sma-Signa Transient, A = /DI m/di m/di A = R S = Ω R F = Ω ns/di 723 G34 A = R S = Ω R F = Ω C L = pf ns/di 723 G3 A = R S = Ω R F = Ω C L = pf ns/di 723 G36 Large-Signa Transient, A = Sma-Signa Transient, A = Sma-Signa Transient, A = /DI m/di m/di A = R G = Ω R F = Ω ns/di 723 G37 A = R G = Ω R F = Ω C L = pf ns/di 723 G3 A = R G = Ω R F = Ω C L = pf ns/di 723 G39 2
13 APPLICATIONS INFORMATION The LT722/LT723/LT724 may be inserted directy into many operationa ampifier appications improving both DC and AC performance, as we as noise and distortion. IN LT722/LT723/LT724 S D3 D D R EXT IN IN R Q Q2 EXT IN Layout and Passive Components The LT722/LT723/LT724 ampifi ers are more toerant of ess than idea ayouts than other high speed ampifi ers. For maximum performance (for exampe, fast setting time) use a ground pane, short ead engths and RF quaity bypass capacitors (.μf to.μf). For high drive current appications, use ow ESR suppy bypass capacitors (μf to μf tantaum). The output/input parasitic couping shoud be minimized when high frequency performance is required. The parae combination of the feedback resistor and gain setting resistor on the inverting input combine with the input capacitance to form a poe that can cause peaking or even osciations. In parae with the feedback resistor, a capacitor of vaue: C F > R G C IN /R F shoud be used to cance the input poe and optimize dynamic performance. For unity-gain appications where a feedback resistor is used, such as an I-to- converter, C F shoud be five times greater than C IN ; an optimum vaue for C F is pf. Input Considerations Each of the LT722/LT723/LT724 inputs is protected with back-to-back diodes across the bases of the NPN input devices. If greater than.7 differentia input votages are anticipated, the input current must be imited to ess than ma with an externa series resistor. Each input aso has two ESD camp diodes one to each suppy. If an input is driven beyond the suppy, imit the current with an externa resistor to ess than ma. The input stage protection circuit is shown in Figure. The input currents of the LT722/LT723/LT724 are typicay in the tens of na range due to the bias current canceation technique used at the input. As the input offset current can be greater than either input current, S D4 D2 R I I 2 Figure. Input Stage Protection adding resistance to baance source resistance is not recommended. The vaue of the source resistor shoud be beow 2k as it actuay degrades DC accuracy and aso increases noise. Tota Input Noise The tota input noise of the LT722/LT723/LT724 is optimized for a source resistance between.k and 2k. Within this range, the tota input noise is dominated by the noise of the source resistance itsef. When the source resistance is beow.k, votage noise of the ampifi er dominates. When the source resistance is above 2k, the input noise current is the dominant contributor. Capacitive Loading The LT722/LT723/LT724 drive capacitive oads up to pf with unity gain. As the capacitive oad increases, both the bandwidth and the phase margin decrease causing peaking in the frequency response and overshoot in the transient response. When there is a need to drive a arger capacitive oad, a 2Ω series resistance assures stabiity with any vaue of oad capacitor. A feedback capacitor aso heps to reduce any peaking. Power Dissipation The LT722/LT723/LT724 combine high speed and arge output drive in a sma package. Maximum junction temperature (T J ) is cacuated from the ambient temperature (T A ), power dissipation per ampifier (P D ) and number of ampifiers (n) as foows: T J = T A (n P D θ JA ) D6 723 F 3
14 LT722/LT723/LT724 APPLICATIONS INFORMATION Power dissipation is composed of two parts. The first is due to the quiescent suppy current and the second is due to on-chip dissipation caused by the oad current. Worst-case instantaneous power dissipation for a given resistive oad in one ampifier occurs at the maximum suppy current and when the output votage is at haf of either suppy votage (or the maximum swing if ess than haf suppy votage). Therefore P D(MAX) in one ampifi er is: P D(MAX) = ( )(I S(MAX) ) ( /2) 2 /R L or P D(MAX) = ( )(I S(MAX) ) ( O(MAX) )( O(MAX) /R L ) Exampe. Worst-case conditions are: both op amps in the LT723IS are at T A = C, S = ±, R L = Ω, OUT = 2.. P D(MAX) = 2 [()(.9mA) (2.) 2 /Ω] = 23mW T J(MAX) = C (23mW)(9 C/W) = 24 C which is ess than the absoute maximum rating at C. Circuit Operation The LT722/LT723/LT724 circuit topoogy is a votage feedback ampifi er. The operation of the circuit can be understood by referring to the Simpifi ed Schematic. The fi rst stage is a foded cascode formed by the transistors Q through Q4. A degeneration resistor, R, is used in the input stage. The current mirror Q, Q6 is bootstrapped by Q7. The capacitor, C, assures the bandwidth and the sew rate performance. The output stage is formed by compementary emitter foowers, Q through Q. The diodes D and D2 protect against input reversed biasing. The remaining part of the circuit assures optimum votage and current biases for a stages. Low noise, reduced current suppy, high speed and DC accurate parameters are distinctive features of the LT722/LT723/LT724. SIMPLIFIED SCHEMATIC S R R2 I IN Q D D2 R Q2?IN Q3 Q Q4 Q6 BIAS C Q7 Q Q9 Q Q OUT I I 2 I 3 I SS S 4
15 PACKAGE DESCRIPTION S Package -Lead Pastic TSOT-23 (Reference LTC DWG # --63) LT722/LT723/LT MAX.9 REF 2.9 BSC (NOTE 4).22 REF 3. MAX 2.62 REF.4 MIN 2. BSC..7 (NOTE 4) PIN ONE RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR.9 BSC.3.4 TYP PLCS (NOTE 3)..9.2 BSC DATUM A. MAX...3. REF.9.2 NOTE: (NOTE 3). DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIE OF PLATING 4. DIMENSIONS ARE EXCLUSIE OF MOLD FLASH AND METAL BURR. MOLD FLASH SHALL NOT EXCEED.24mm 6. JEDEC PACKAGE REFERENCE IS MO-93.9 BSC S TSOT RE B
16 LT722/LT723/LT724 PACKAGE DESCRIPTION S Package -Lead Pastic Sma Outine (Narrow. Inch) (Reference LTC DWG # --6). BSC.4 ± (4..4) NOTE MIN.6 ± ( )..7 (3. 3.9) NOTE 3.3 ±. TYP RECOMMENDED SOLDER PAD LAYOUT (.23.24)..2 (.24.) 4 TYP.3.69 ( ).4. (..24).6. (.46.27) NOTE: INCHES. DIMENSIONS IN (MILLIMETERS).4.9 (.3.43) TYP 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED.6" (.mm). (.27) BSC SO 33 MS Package -Lead Pastic MSOP (Reference LTC DWG # --66 Rev F).9 ±.27 (.3 ±.) 3. ±.2 (. ±.4) (NOTE 3) (.2) REF 6.23 (.26) MIN.42 ±.3 (.6 ±.) TYP (.26.36).6 (.26) BSC RECOMMENDED SOLDER PAD LAYOUT GAUGE PLANE.24 (.) DETAIL A 6 TYP.3 ±.2 (.2 ±.6) DETAIL A. (.7) SEATING PLANE NOTE:. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED.2mm (.6") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED.2mm (.6") PER SIDE. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE.2mm (.4") MAX 4.9 ±.2 (.93 ±.6). (.43) MAX.22.3 (.9.) TYP.6 (.26) BSC ±.2 (. ±.4) (NOTE 4).6 (.34) REF.6 ±. (.4 ±.2) MSOP (MS) 37 RE F
17 PACKAGE DESCRIPTION S Package 4-Lead Pastic Sma Outine (Narrow. Inch) (Reference LTC DWG # --6) LT722/LT723/LT724. BSC.4 ± (.6.73) NOTE 3 N MIN 2 3 N/2.6 ± ( ) N N/2..7 (3. 3.9) NOTE 3.3 ±. TYP RECOMMENDED SOLDER PAD LAYOUT (.23.24)..2 (.24.) 4 TYP.3.69 ( ).4. (..24).6. (.46.27) NOTE: INCHES. DIMENSIONS IN (MILLIMETERS).4.9 (.3.43) TYP 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED.6" (.mm). (.27) BSC S4 2 Information furnished by Linear Technoogy Corporation is beieved to be accurate and reiabe. However, no responsibiity is assumed for its use. Linear Technoogy Corporation makes no representation that the interconnection of its circuits as described herein wi not infringe on existing patent rights. 7
18 LT722/LT723/LT724 TYPICAL APPLICATION 4- to 2-Wire Loca Echo Canceation Differentia Receiver Ampifi er 2k pf /2 LT739 Ω k k D LINE DRIER L Ω LINE (n = ) n: R L n 2 /2 LT723 R LINE RECEIER /2 LT739 Ω k 2k /2 LT723 k pf 723 TA3 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT677 Singe, Low Noise Rai-to-Rai Ampifi er 3 Operation, 2.mA Suppy Current, 4.n/ Hz Max e n, 6µ Max OS LT/LT/LT2 Singe/Dua/Quad, Low Power, MHz Rai-to-Rai.6mA Suppy Current, 3µ OS, 2.3 Operation Precision Ampifi er LT6/LT7 Singe/Dua, Low Noise 32MHz Rai-to-Rai Ampifi ers 2. Operation, µ MAX OS, 3.n/ Hz LT9/LT Singe/Dua, Low Distortion MHz Rai-to-Rai Ampifi ers 2. Operation, 9dBc at MHz Distortion LT2/LT3/LT4 Singe/Dua/Quad, 3mA, 7/µs Ampifi ers Operation, 3.6mA Suppy Current, 4mA Min Output Current LT622/LT623/LT624 Singe/Dua/Quad, MHz, Low Noise Rai-to-Rai Op Amps 2n/ Hz, 2.mA on Singe 3 Suppy LT 99 RE B PRINTED IN USA Linear Technoogy Corporation 63 McCarthy Bvd., Mipitas, CA (4) FAX: (4) LINEAR TECHNOLOGY CORPORATION 22
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