Do You Trust Your Chip? Battling Hardware Trojans and Defects by Design-for-Excellence in Electronics WORKSHOP PARTICIPANTS BIOGRAPHIES April 15, 2011

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1 Do You Trust Your Chip? Battling Hardware Trojans and Defects by Design-for-Excellence in Electronics WORKSHOP PARTICIPANTS BIOGRAPHIES April 15, 2011 Walid Ali Senior Manager, R&D Abu Dhabi Ecosystem Development ATIC Walid Ali is the deputy director of ATIC Semiconductor Research and Development department. He is responsible of initiating a vivid global R&D eco system, which is centered in Abu-Dhabi while also partnering with industrial leaders in manufacturing, equipment, foundries, and fabless companies. Prior to leading the R&D initiative in Abu-Dhabi, Walid lead the development of many products across his tenure with Microsoft, Redmond, WA and Intel, Santa Clara, CA, Philips, Eindhoven, the Netherlands and IBM, Cairo Egypt. Walid has 73 patents with USA patent office and more than 40 peer-reviewed technical publications. He has studied executive management at Harvard business school. He holds a Ph.D. degree in electrical and computer engineering from Drexel University, Philadelphia, PA, USA in 1999, where he also worked as an instructor. He received his M.Sc. in computer science from the Imperial College, London University, London, UK in 1994 with distinction and his B.Sc. degree in electronics and telecommunications from Cairo University, Cairo, Egypt with first honor in Vishwani D. Agrawal Auburn University Vishwani D. Agrawal is the James J. Danaher of at Auburn University, Alabama. He has over thirty years of industry and university experience most of which was at Bell Labs, Murray Hill, New Jersey. His areas of interest include VLSI testing, low-power design, and microwave antennas. He obtained his BE degree from the Indian Institute of Technology, an ME from the Indian Institute of Science, and a PhD in electrical engineering from the University of Illinois at Urbana-Champaign. He has published over 300 papers and five books, including a textbook on electronic testing. He holds thirteen United States patents. He is the founder and Editor-in-Chief of the Journal of Electronic Testing: Theory and Applications, a past Editor-in-Chief of the IEEE Design & Test of Computers magazine and a

2 past Editorial Board Member of the IEEE Transactions on VLSI Systems. During 1989 and 1990, he served on the Board of Governors of the IEEE Computer Society. He has received seven Best Paper Awards, a Lifetime Achievement Award, the Harry H. Goode Memorial Award of the IEEE Computer Society, and the Distinguished Alumnus Award of the University of Illinois at Urbana-Champaign. Dr. Agrawal is a Fellow of the IETE-India, a Fellow of the IEEE, and a Fellow of the ACM. He has served on the advisory boards of the ECE Departments at University of Illinois, New Jersey Institute of Technology, and the City College of the City University of New York. Shawn Blanton Electrical Engineering and Computer Science Carnegie Mellon University Shawn Blanton is a professor in the Department of at Carnegie Mellon University where he serves as director of the Center for Silicon System Implementation (CSSI), an organization consisting of 18 faculty members and over 80 students focused on the design and manufacture of silicon-based systems. He received the Bachelor's degree in engineering from Calvin College in 1987, a Master's degree in Electrical Engineering in 1989 from the University of Arizona, and a Ph.D. degree in Computer Science and Engineering from the University of Michigan, Ann Arbor in Blanton s research interests include the verification, test and diagnosis of integrated, heterogeneous systems. He has published over 100 papers in these areas and has several issued and pending patents in the area of IC test and diagnosis. Prof. Blanton has received the National Science Foundation Career Award for the development of a microelectromechanical systems (MEMS) testing methodology and two IBM Faculty Partnership Awards. He is a Fellow of the IEEE, and is the recipient of the 2006 Emerald Award for outstanding leadership in recruiting and mentoring minorities for advanced degrees in science and technology. Ralph Cavin Chief Scientist Semiconductor Research Corporation Ralph Cavin received his BSEE (1961) and MSEE (1962) from Mississippi State University and his Ph.D. in Electrical Engineering from Auburn University in After taking his Ph.D., Dr. Cavin joined the faculty of the Department of Electrical Engineering at Texas A. M. University and in 1983 he joined the Semiconductor Research Corporation where he served as Director of Design Sciences research programs until He became Head of the Department of Electrical and Computer Engineering at North Carolina State University from and was Dean of Engineering at North Carolina State University from He is currently Chief Scientist at the Semiconductor Research Corporation. Dr. Cavin s technical interests span VLSI circuit design, computer-aided design of microelectronic systems, control theory with applications to semiconductor manufacturing, and applications of computing and telecommunications to engineering education. He has authored or co-authored over 100 refereed technical papers and contributions to books.

3 Paul Horn Senior Vice Provost for Research New York University Paul M. Horn is the Senior Vice Provost for Research for New York University. Dr. Horn graduated from Clarkson College of Technology and received his doctoral degree in physics from the University of Rochester in Prior to joining IBM in 1979, Dr. Horn was a professor of physics in the James Franck Institute and the Physics Department at the University of Chicago. Dr. Horn is a Fellow of the American Physical Society and was an Alfred P. Sloan Research Fellow from He is a member of the National Academy of Engineering, a former Associate Editor of Physical Review Letters and has published over 85 scientific and technical papers. Dr. Horn has received numerous awards including the 2000 Distinguished Leadership award from the New York Hall of Science, the 2002 Hutchison Medal from the University of Rochester, and the 2002 Pake Prize from the American Physical Society. In 2003 Dr. Horn was named as one of the top computing business leaders in the US by Scientific American magazine. Brion Keller Sr. Architect Encounter Test Cadence Design Systems Brion Keller obtained his BS in Computer Science and Chemical Engineering from Penn State University in He has been involved in DFT and Test for over 30 years. His career includes 23 years at IBM and 8 at Cadence. His interests and 12 patents are in the areas of test compression, logic BIST, fault modeling, low Power test, diagnostics, parallel processing and DFT in general. Ramesh Karri Polytechnic Institute of New York University. Ramesh Karri is a of at Polytechnic Institute of New York University. He has a Ph.D. in Computer Science and Engineering, from the University of California at San Diego. His research interests include trusted computing platforms and trustworthy ICs; low power reliable and fault tolerant nanoscale IC architectures and systems; VLSI Design and Test; Electronic System Level Design; Interaction between security and reliability. He was the recipient of the Humboldt Fellowship and the National Science Foundation CAREER Award. He has served on the 2006 DARPA ISAT study on Trust in Integrated Circuits. He is the area director for cyber security of the NY State Center for Advanced Telecommunications Technologies at NYU-Poly; Hardware security lead of the Center for research in interdisciplinary studies in security and privacy - CRISSP ( Chair of the IEEE Computer Society Technical Committee on Nanoscale architectures; Founder and steering committee member of the IEEE/ACM Symposium on Nanoscale Architectures (NANOARCH); Member of organizing committee of the IEEE Symposium on Hardware Oriented Security and Trust (HOST); Member of several other program committees; Associate Editor of IEEE Transactions on Information Forensics and Security; Associate Editor of ACM Journal on Emerging Computing Technologies.

4 Sunil Kumar Dean of Engineering New York University Abu Dhabi Sunil Kumar is a mechanical engineer and Dean of Engineering at New York University Abu Dhabi. His scholarly focus is the transport of light and thermal radiation, specifically examining how lasers interact with material surfaces. Sunil Kumar came to NYU Abu Dhabi from the Polytechnic Institute of New York University, where he was graduate dean and former head of the department of mechanical, aerospace, and manufacturing engineering. He has also taught at the University of California Berkeley, was a scientist at the Lawrence Berkeley Laboratories, and a visiting scientist at NASA s Ames Research Center in California. Kumar s publications include approximately 50 journal articles, over 200 conference papers, one book, and research monographs: Nanotechnologies for the Lifesciences, and Modeling and Simulation-Based Life Cycle Engineering. He holds one patent and is an editor of High Temperatures High Pressures, an international journal of thermophysical properties research. Kumar holds a Ph.D. in mechanical engineering from University of California at Berkeley; he received a M.S. in mechanical engineering and a M.A. in applied mathematics from the State University of New York at Buffalo, and a B.Tech. in mechanical engineering from the Indian Institute of Technology at Kharagpur. Yiorgos Makris Associate Electrical Engineering and Computer Science Yale University Yiorgos Makris received the Diploma of Computer Engineering and Informatics from the University of Patras, Greece, in 1995, and the M.S. and Ph.D. degrees in Computer Engineering from the University of California, San Diego, in 1997 and 2001, respectively. He then joined Yale University, where he is currently an Associate of Electrical Engineering and Computer Science. His main research interests are in the application of machine learning and statistical analysis methods towards increasing trustworthiness and robustness of electronic circuits. He is also interested in test and reliability of analog/rf circuits, modern microprocessor resiliency, as well as intelligent reconfigurable computing with novel multifunctional materials and emerging technologies. His research has been supported by NSF, DARPA, SRC, IBM, LSI, Intel, and TI. Subhasish Mitra Assistant Department of EE and Department of Computer Science Stanford University Subhasish Mitra directs the Robust Systems Group in the Department of Electrical Engineering and the Department of Computer Science of Stanford University. Prior to joining Stanford, he was a Principal Engineer at Intel Corporation. Prof. Mitra's research interests include robust system design, VLSI design, CAD, validation and test, and emerging nanotechnologies. His X-Compact technique for test compression has been used in more than 50 Intel products, and has influenced major CAD tools. The IFRA technology for post-silicon validation, created jointly with his student, was characterized as a breakthrough in the Communications of the ACM. His work on the first demonstration of imperfection-immune

5 carbon nanotube VLSI circuits, jointly with his students and collaborators, was selected by NSF as a Research Highlight to the US Congress, and was highlighted as a significant breakthrough by the Semiconductor Research Corporation and the MIT Technology Review. Prof. Mitra s major honors include the Presidential Early Career Award for Scientists and Engineers from the White House, the highest US honor for early-career outstanding scientists and engineers, ACM SIGDA Outstanding New Faculty Award, IEEE CAS/CEDA Pederson Award for the IEEE Transactions on CAD Best Paper, IEEE/ACM Design Automation Conference Best Paper Award, Terman Fellowship, and the Intel Achievement Award, Intel s highest corporate honor. At Stanford, he was honored multiple times by graduating seniors for being important to them during their time at Stanford. Prof. Mitra also serves as an invited member on DARPA s Information Science and Technology Board. Alex Orailoglu Computer Science and Engineering University of California, San Diego Alex Orailoglu received his S.B. degree cum laude from Harvard College in Applied Mathematics and his M.S. and PhD degrees in Computer Science from the University of Illinois, Urbana-Champaign. Alex Orailoglu is currently a professor of Computer Science and Engineering at the University of California, San Diego, where he leads the ART (Architecture, Reliability and Test) Lab, focusing on VLSI Test and Reliability, Computer Architecture, Embedded Processors and Systems, and NanoArchitectures. He has developed a new polymorphic embedded processor architecture and has made fundamental contributions to Built-In Self Test and Fault Tolerant Architectures. He has served as both the Program Chair and General Chair of the IEEE VLSI Test Symposium, and of the IEEE/ACM/IFIP CODES/ISSS. He has been a cofounder of the IEEE Symposium on Application Specific Processors, the IEEE/ACM NanoArch Symposium, the IEEE High Level Design Validation and Test Workshop and the HiPEAC Workshop on Design for Reliability. Alex Orailoglu chairs the IEEE Computer Society Task Force on Embedded Systems and is the Vice-Chair of the IEEE Computer Society Task Force on NanoArchitectures. Alex Orailoglu cochairs the ACM SIGDA TC on Nanoelectronics/Nanotechnologies. He has published more than 200 papers and participates in the program, organizing and steering committees of major conferences in VLSI Test, Embedded Systems, and NanoArchitectures. Alex Orailoglu is an IEEE Computer Society Distinguished Lecturer. He is a Golden Core member of the IEEE Computer Society. Ozgur Sinanoglu Assistant Engineering New York University Abu Dhabi Ozgur Sinanoglu obtained his Ph.D. in Computer Science and Engineering from University of California, San Diego, in He worked for two years at Qualcomm in San Diego as a senior Design-for-Testability engineer, primarily responsible for developing cost-effective test solutions for low-power SOCs. After a 4-year academic experience at Kuwait University, where he won the Best Researcher award, he has joined in Fall 2010 New York University in Abu Dhabi. He is currently spending his integration year in New York at the ECE Department of NYU Poly. His primary field of research is the reliability of integrated circuits, mostly focusing on design-for-

6 testability. He has published around 75 papers in conferences and journals, and has 2 patents issued and several pending. Peilin Song Manager Circuit Diagnostics and Testing Technology department IBM Thomas J. Watson Research Center Peilin Song is a Research Staff Member at the IBM Thomas J. Watson Research Center, where he is a manager of the Circuit Diagnostics and Testing Technology department. He joined IBM in 1997 and has since worked in the area of design for testability, fault diagnostics, fault modeling, circuit simulation, and optical testing. He has more than fifty publications, holds twenty one U.S. patents with several patents pending. In 2004, he has won the IEEE Electron Device Society Paul Rapparport Award. Also, in 2006, he received an Outstanding Contribution Award from the IEEE Computer Society. He is an IEEE Senior Member. He received his Ph.D. in electrical engineering from the University of Rhode Island. Mohammad Tehranipoor Associate University of Connecticut Mohammad Tehranipoor is currently an Associate of Electrical and Computer Engineering at the University of Connecticut. His current research projects include: computeraided design and test for CMOS VLSI designs, design-for-testability, reliable systems design at Nano scale, hardware security and trust. Dr. Tehranipoor has published over 125 journal articles and refereed conference papers and has given more than 60 invited talks and keynote addresses. He has published two books entitled Nanometer Technology Designs High-Quality Delay Tests and Emerging Nanotechnologies Test, Defect Tolerance and Reliability in addition to seven book chapters. He is a recipient of a best paper award at the 2005 VLSI Test Symposium (VTS), best paper award at the 2008 North Atlantic Test Workshop (NATW), best paper award at NATW 2009, honorable mention for best paper award at NATW 2008, best paper candidate at the 2006 Design Automation Conference (DAC), best paper candidate at the 2005 Texas Instrument Symposium on Test, best panel award at VTS 2006, and top ten paper recognition at the 2005 International Test Conference (ITC). Dr. Tehranipoor is also a recipient of the 2008 IEEE Computer Society (CS) Meritorious Service Award, the 2010 IEEE CS Most Successful Technical Event for co-founding and chairing HOST Symposium, the 2009 NSF CAREER award, and the 2009 UConn ECE Research Excellence Award. He serves on the program committee of more than a dozen of leading conferences and workshops. Dr. Tehranipoor served as the guest editor for Journal of Electronic Testing: Theory and Applications (JETTA), IEEE Design and Test of Computers and IEEE Computer Society Computing Now. He served as Program Chair of the 2007 IEEE Defect-Based Testing (DBT) workshop, Program Chair of the 2008 IEEE Defect and Data Driven Testing (D3T), Co-program Chair of the 2008 International Defect and Fault Tolerance Symposium in VLSI Systems (DFTS), and General Chair for D3T-2009 and DFTS He co-founded a new symposium called IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) and served as HOST-2008 and HOST-2009 General Chair and Chair of Steering Committee. He is currently serving as Vice-general Chair for the 2011 IEEE North Atlantic Test Workshop (NATW), an Associate Editor for JETTA, an Associate Editor for IEEE Design and Test of Computers, an Associate Editor for Journal of Low Power Electronics (JOLPE), an IEEE Distinguished Speaker, and an ACM Distinguished Speaker. He is a term member of Graduate

7 Faculty of ECE Department at Duke University. Dr. Tehranipoor is a Senior Member of the IEEE and Member of ACM and ACM SIGDA. Nur A. Touba University of Texas at Austin. Nur A. Touba received his B.S. degree from the Univ. of Minnesota, and M.S. and Ph.D. degrees from Stanford University. He is currently professor of electrical and computer engineering at the Univ. of Texas at Austin. He received a National Science Foundation (NSF) Early Faculty CAREER Award in 1997, College of Engineering Foundation Faculty Award in 2001, Best Paper Award at the VLSI Test Symposium in 2001, Best Panel Award at the International Test Conference in 2005, General Motors Faculty Fellowship in 2006, Best Paper Award at the International Symposium on Defect and Fault Tolerance in 2008, and IEEE Fellow in His research interests are in VLSI testing and fault-tolerant computing.