NXP PN548 (65V10) Near Field Communication Module



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NXP PN548 (65V10) Module Basic Functional Analysis 1891 Robertson Road, Suite 500, Ottawa, ON K2H 5B7 Canada Tel: 613-829-0414 chipworks.com

Basic Functional Analysis 2 Some of the information in this report may be covered by patents, mask and/or copyright protection. This report should not be taken as an inducement to infringe on these rights. Chipworks Inc. 2014 all rights reserved. Chipworks and the Chipworks logo are registered trademarks of Chipworks Inc. This report is provided exclusively for the use of the purchasing organization. It can be freely copied and distributed within the purchasing organization, conditional upon the accompanying Chipworks accreditation remaining attached. Distribution of the entire report outside of the purchasing organization is strictly forbidden. The use of portions of the document for the support of the purchasing organization's corporate interest (e.g., licensing or marketing activities) is permitted, as defined by the fair use provisions of the copyright act. Accreditation to Chipworks must be attached to any portion of the reproduced information. FAR-1409-802 27609OWRKJC Revision 1.0 Published: October 30, 2014

Basic Functional Analysis 3 Table of Contents 1 Introduction 1.1 Device Naming Conventions Used in this Report 1.2 Device Samples Used for Analysis 1.3 Company Profile 1.4 Executive Summary 1.5 Observed Critical Dimensions 2 Device Identification 2.1 iphone 6 Plus Smartphone Downstream Product 2.2 65V10 Package 2.3 PN548 Die 2.4 PN548 Die Features 2.5 008 Die 2.6 008 Die Features 3 Process Analysis 3.1 PN548 Die Cross-Sectional Analysis 3.2 008 Die Cross-Sectional Analysis 4 Functional Layout Analysis 4.1 PN548 Die Functional Layout Analysis 4.2 PN548 Die Functional Block Summary 4.3 008 Die Functional Layout Analysis 4.4 008 Die Functional Block Summary 4.5 65V10 NFC package with Pin Number Annotation 4.6 PN548 Die with Pin Number Annotation 4.7 008 Die with Pin Number Annotation 5 Cost Analysis 5.1 65V10 Manufacturing Cost Analysis 6 References 7 Statement of Measurement Uncertainty and Scope Variation About Chipworks

Basic Functional Analysis 4 List of Figures Figure 2.1.1 iphone 6 Plus Smartphone Top View Figure 2.1.2 iphone 6 Plus Smartphone Bottom View Figure 2.1.3 iphone 6 Plus 16 GB Box Back Figure 2.1.4 iphone 6 and iphone 6 Plus Smartphone Main PCB Bottom Figure 2.2.1 65V10 NFC Package Photograph Top View Figure 2.2.2 65V10 NFC Package Photograph Bottom View Figure 2.2.3 65V10 NFC Package X-Ray Plan View Figure 2.2.4 65V10 Package X-Ray Side View Figure 2.3.1 PN548 Die Photograph Figure 2.3.2 PN548 Die Markings A Figure 2.3.3 PN548 Die Markings B Figure 2.3.4 PN548 Die Photograph Delayered to Polysilicon Figure 2.4.1 PN548 Die Corner Figure 2.4.2 PN548 Minimum Pitch Flip-Chip Bump Pads Figure 2.5.1 008 Die Photograph Figure 2.5.2 008 Die Markings Figure 2.5.3 008 Die Photograph Delayered to Polysilicon Figure 2.6.1 008 Die Corner Figure 2.6.2 008 Minimum Pitch Bond Pads Figure 3.1.1 PN548 General Structure Logic Figure 3.1.2 PN548 Minimum Metal 2 Pitch Figure 3.1.3 PN548 Minimum Contacted Gate Pitch Figure 3.1.4 Embedded NOR Flash Figure 3.2.1 008 General Structure Logic Figure 3.2.2 008 Minimum Metal 1 Pitch Figure 3.2.3 008 Minimum Contacted Gate Pitch Figure 3.2.4 Observed Minimum Gate Length Transistor Figure 4.1.1 PN548 Die Functional Blocks at the Polysilicon Layer Figure 4.3.1 008 Die Functional Blocks at the Polysilicon Layer Figure 4.5.1 65V10 NFC Package Photograph with Pin Number Annotation Figure 4.6.1 PN548 Die Photograph with Pin Number Annotation Figure 4.7.1 008 Die Photograph with Pin Number Annotation

Basic Functional Analysis 5 List of Tables Table 1.2.1 65V10 Component Summary Table 1.4.1 PN548 Die Summary Table 1.4.2 008 Die Summary Table 1.5.1 PN548 Die Observed Critical Dimensions Table 1.5.2 008 Die Observed Critical Dimensions Table 4.2.1 PN548 Die Functional Block Summary Table 4.4.1 008 Functional Block Summary Table 5.1.1 65V10 Manufacturing Cost Characteristics Table 5.1.2 PN548 Die Manufacturing Cost Characteristics Table 5.1.3 008 Die Manufacturing Cost Characteristics Table 5.1.4 65V10 Manufacturing Costs

Basic Functional Analysis About Chipworks Patent and Technology Partner to the World s Most Successful Companies For over 20 years, Chipworks has been a trusted patent and technology partner to the world s largest and most successful companies. Business leaders rely on us to help them identify and fully leverage their most valuable patents and provide crucial analysis of high-revenue products in the most competitive, fastest changing technology markets. By combining deep patent and market knowledge with an unmatched ability to analyze the broadest range of technology products we are able to provide the most insightful Patent Intelligence and Competitive Technical Intelligence services in the industry. Contact Chipworks To find out more information about this report, or any other reports in our library, please contact Chipworks at 1-613-829-0414. Chipworks 1891 Robertson Road, Suite 500 Ottawa, Ontario K2H 5B7 Canada T 1-613-829-0414 F 1-613-829-0515 Web site: www.chipworks.com Email: info@chipworks.com Please send any feedback to feedback@chipworks.com