MirrorBit Technology: The Foundation for Value-Added Flash Memory Solutions FLASH FORWARD

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1 MirrorBit Technology: The Foundation for Value-Added Flash Memory Solutions FLASH FORWARD

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3 MirrorBit Technology: The Future of Flash Memory is Here Today Spansion is redefining the Flash memory industry and enabling new innovative application uses with its MirrorBit technology. MirrorBit technology is Spansion s proprietary, patented technology, which forms the foundation for enabling cost-effective, smaller and more powerful Flash memory solutions optimized for both code execution and data storage. With higher performance and more flexibility than competitive floating-gate NOR technologies, MirrorBit technology can be used in a broad variety of cost-effective Flash memory solutions featuring NOR, serial peripheral (SPI) and NAND interfaces, as well as solutions with integrated logic all from the same manufacturing lines and process flows. Spansion s family of MirrorBit NOR, SPI, ORNAND, Quad and Eclipse solutions can address a wide range of code and data storage requirements and provide a flexible platform that can scale with application needs. As a result, system designers can create highly innovative, high performance, cost-effective products through the use of Spansion s proprietary charge trapping technology that is fundamentally more advanced than conventional multi-level cell (MLC) and single-level cell (SLC) floating-gate technology. MirrorBit technology has demonstrated the ability to scale to meet the needs of customers and a variety of applications such as automotive infotainment systems, cell phones, consumer electronics, and networking equipment for the home and enterprise to name a few. Within a single technology platform, MirrorBit supports 3.0-Volt and 1.8-Volt power, has scaled from 230nm to 65nm for increased performance, higher production output and lower costs; and from NOR, to ORNAND, to SoC architectures, enabling differentiated Flash memory solutions. MirrorBit Technology at a GlancE Highly flexible & adaptable technology Optimal Flash memory technology for logic integration Scalable to advanced process nodes and higher densities Total historic sales in excess of $3.5 billion and quarterly revenues now exceeding $500 million Product families optimized for wireless and embedded applications 3

4 Fundamentals of MirrorBit Technology MirrorBit technology enables system designers to create highly innovative, high performance, cost-effective products through the use of proprietary charge trapping storage technology. The MirrorBit cell doubles the density of a Flash memory array by storing two physically distinct quantities of charge on opposite sides of a memory cell a feat made possible by the non-conducting nature of the storage medium. In this two-bit cell, each bit serves as a binary unit of data (either 1 or 0) that is mapped directly to the memory array. Reading or writing a bit on one side of a memory cell occurs independently of the data that is stored on the opposite side of the cell. SOURCE/ DRAIN MIRRORBIT TECHNOLOGY CONTROL GATE ELECTRONS (1) ELECTRONS (2) INSULATED LAYER DRAIN/ SOURCE Because of its symmetrical memory cell and nonconductive storage element, MirrorBit technology has been engineered to take advantage of a simple, efficient memory array. This array design signifi cantly simplifi es a device s topography and manufacturing process. The end result is a technology that requires 40 percent fewer critical manufacturing steps than fl oating-gate NOR and consequently provides industry leading price-performance for Flash memory. TRAPS ELECTRONS ON TWO SIDES OF THE INSULATEDLAYER (2BIT/CELL) FLOATING-GATE TYPE FLASH MEMORY (NOR TYPE) CHARGE OF ELECTRONS CONTROL GATE FLOATING GATE SOURCE DRAIN CHARGE OF ELECTRONS DIFFUSES IN THE FLOATING GATE (1BIT/CELL)

5 innovative SySteM-on-chip SolutionS with support for additional logic up to one million gates MirrorBit technology can be used to build powerful System-on-chip (Soc) solutions. Spansion s MirrorBit hd-sim card chip will combine MirrorBit technology with a cpu and a cryptography engine to enable 1,000 times the storage capacity of today s SiM cards in a single die. ELECTRONS (1 & 2) SOURCE/ DRAIN MIRRORBIT QUAD TECHNOLOGY CONTROL GATE 4 THRESHOLD VOLTAGES PER REGION ELECTRONS (3 & 4) INSULATED LAYER DRAIN/ SOURCE MirrorBit Quad technology for content delivery applications A major advantage of MirrorBit technology is the ability to not only store two distinct quantities of charge, but also to vary the quantity of charge stored in each location. The combination of these two charge storage techniques enable MirrorBit technology to store more than two-bits-per-cell. Spansion s MirrorBit Quad technology stores a charge that equates to four-bits-per-cell or 16 different states, doubling the storage density compared to the two-bits-per-cell and four states implemented today. This means not only greater capacity and smaller die sizes, but also lower costs, enabling MirrorBit technology to address new applications and reduce the cost of storing significant amounts of digital content inside electronic devices. MirrorBit nor architecture for code-optimized SolutionS MirrorBit NOR Flash memories deliver fast read speeds and reliable code execution. Aimed at systems that require high-quality code storage and execution, MirrorBit NOR solutions are trusted by the top 10 automotive, consumer electronics and mobile phone manufacturers in the world. MirrorBit ornand architecture for data-optimized SolutionS MirrorBit ORNAND Flash memory supports fast read and write speeds for high-density data storage performance with high quality and reliability. At 45nm the next-generation MirrorBit ORNAND2 technology supports similar benefi ts to earlier generations but focuses on lowering the technology cost and delivering faster write and erase performance. 5

6 Revolutionary MirrorBit Eclipse Architecture MIRRORBIT ECLIPSE SOLUTION LOWERS MEMORY SUBSYSTEM COST OPTIMUM SOLUTION Memory Cost per Phone TYPICAL RATIO OF 1:1 NAND FLASH TO xram NAND DRAM MirrorBit ORNAND Solution MirrorBit NOR DRAM MirrorBit Eclipse Solution DRAM MirrorBit Eclipse Benefit TYPICAL RATIO OF 4:1 NOR FLASH TO xram Read Performance Slow Write Performance HIGH-END FEATURE PHONE PLATFORM 512 Mb to 4 Gb FLASH MEMORY the MirrorBit eclipse architecture is the result of a Multi-year Strategy to leverage a Single technology, MirrorBit, to DeVelop a BroaD range of SolutionS including nor, ornand and QuaD SolutionS to Meet customers requirements. now with the MirrorBit eclipse architecture, we will Bring together all three SolutionS on a Single Die to DeliVer a powerful combination not previously possible in the industry. BertranD cambou, president and ceo of SpanSion inc The next development of MirrorBit technology draws upon the benefits of each architecture Spansion has pioneered today. By combining MirrorBit NOR, ORNAND and Quad Flash memory on a single die with a software confi gurable (XiP) architecture, Spansion can deliver to customers a new class of solutions from the MirrorBit Eclipse architecture. By taking advantage of MirrorBit Eclipse with its NOR interface and execute-in-place approach, Spansion can reduce the amount of expensive DRAM in end systems. As a result of the MirrorBit NOR, ORNAND and Quad combination, performance improvements such as running code at blazing speeds and storing large amounts of multimedia content can be achieved. Initially targeted at wireless handsets, MirrorBit Eclipse products ease-of-use and compatibility with existing platforms provide easy migration for handset OEMs and enables them to lower handset memory subsystem bill of materials cost. The MirrorBit Eclipse architecture integrates a programmable microcontroller which replaces the conventional state machine typically used in Flash memory and also supports built-in self test (BIST). This system-on-chip (SoC) technology is designed to support a production process that is more fl exible and faster, enabling OEMs to get products to market faster. The fi rst products built upon 65nm MirrorBit Eclipse architecture will combine MirrorBit NOR and ORNAND to enable a single-die code and data storage solution for wireless handsets. In the future, designers in all of our target applications will have the ability to partition a single die with varying amounts of 2-bit and 4-bit-per-cell storage with the addition of MirrorBit Quad technology on the die. For example, a 2-bit-per-cell 2 Gb die, can be confi gured to 3 Gb of total storage (1 Gb as 2-bit-per-cell for code and 2 Gb as 4-bit-per-cell for data) or up to 4 Gb of total storage using the complete die in 4-bit-per-cell storage. This flexibility can help increase customer efficiency and potentially simplify their supply chain by servicing more products with one MirrorBit Flash memory.

7 Compelling Technology for Future Flash Memory Innovation PROLIFERATING ARCHITECTURES MirrorBit ORNAND2 Solutions MirrorBit Eclipse Solutions MirrorBit SoC Solutions MirrorBit Quad Solutions MirrorBit ORNAND Solutions Wireless MirrorBit NOR Solutions Embedded MirrorBit NOR Solutions ACCELERATING PROCESS NODES 230nm 200nm 110nm 90nm 65nm 45nm* *Spansion planned technology transitions Spansion is aggressively moving MirrorBit technology to more advanced process technology and lithography nodes. As a result, Spansion customers can continue to use a familiar Flash memory technology, while taking advantage of the advancements and cost savings of each new generation. next-generation SonoS-BaSed MirrorBit ornand family Spansion plans to continue innovating well into the future with its successful charge trapping storage technology. Its new MirrorBit ORNAND2 architecture will use a SONOS-like memory cell connected CODE IN DRAM in a NAND memory array at 45nm, featuring fast write performance XIP with high packing density delivering the performance and cost Store and Download advantages of NAND technology with the compelling cost structure of 300mm wafers. MIRRORBIT ECLIPSE ARCHITECTURE: in production For Four GREATER FLEXIBILITY WITH UP TO 30% years, LOWER giving MEMORY the BOM company PC-Type Architecture NAND CODE IN NAND a Big head Start on its Phone-Type Architecture competitors. the MIRRORBIT MirrorBit ornand2 MIRRORBIT ORNAND ECLIPSE architecture, a nand array CODE IN BaSeD on a SonoS-liKe INTEGRATED MIRRORBIT NOR SINGLE DIE cell Structure, will LPDRAM SpanSion has had a charge trapping process company S next-generation Further use this leadership to expand LPDRAM SpanSion S MarKet opportunities into XIP areas currently SerVeD By nand alone. Products planned for the new architecture will primarily target data storage applications in the integrated Flash memory markets where customers value differentiated, high-value solutions. The new architecture will expand the current MirrorBit ORNAND portfolio with a new family of solutions at 45nm that require 25 percent fewer mask layers than Spansion s 65nm MirrorBit ORNAND architecture, and support superior quality over floating-gate NAND solutions. MirrorBit ORNAND2 products are expected to be available in early JiM handy, Director of objective analysis 7

8 MirrorBit Technology Performance, Reliability, Scalability Spansion MirrorBit technology pushes the boundaries of Flash memory technology forward. Today MirrorBit technology delivers industry-leading performance, reliability, and quality, along with a compelling cost structure. Looking ahead to future generations of products, the scalability and flexibility of MirrorBit technology will give customers the benefits of smaller process lithography combined with market-leading capabilities in logic integration for innovative and differentiated code and data storage solutions. More and more product designers and manufacturers are turning to Spansion MirrorBit Flash memory to build innovative electronic devices more quickly and efficiently. To learn how Spansion can help you, please visit or contact your local Spansion distributor. About Spansion Spansion { NASDAQ:SPSN } is a leading Flash memory solutions provider, dedicated to enabling, storing and protecting digital content in wireless, automotive, networking and consumer electronics applications. Spansion, previously a joint venture of AMD and Fujitsu, is the largest company in the world dedicated exclusively to developing, designing, and manufacturing Flash memory products and systems. SPANSION 915 Deguigne Drive PO Box 3453 Sunnyvale, CA , USA Tel SPANSION 2008 Spansion LLC. All rights reserved. Spansion, the Spansion logo, MirrorBit, MirrorBit Eclipse, ORNAND, ORNAND2, HD-SIM and combinations thereof, are trademarks of Spansion LLC in the U.S. and other countries. Other names used are for informational purposes only and may be trademarks of their respective owners B JAN 2008