Technical Article. Multi-phase DC-DC PMIC: the efficient, space-saving choice for today s application processors. Peter Kammerlander

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1 Technical Multi-phase DC-DC PMIC: the efficient, space-saving choice for today s application processors Peter Kammerlander

2 Multi-phase DC-DC PMIC: the efficient, space-saving choice for today s application processors Peter Kammerlander Faster, Smaller, Better : these are the goals that mobile power microelectronics designers are always aiming for. As consumers, we all want our next mobile device to have more processing power and features than our last one. We also want it to be smaller and lighter than its predecessor. This means that the crucial power management IC (PMIC) that controls the power circuit of the mobile device has to provide more output power while occupying a small area on the PCB and keeping efficiency high. Component size and height are also critical parameters in modern mobile designs. These constraints are, in fact, becoming more acute. For example, the latest generation of ARMcore applications processors for devices such as smartphones, tablets and netbooks call for up to a 20A peak current. It is obvious that an architecture based on a conventional single-phase DC/DC buck converter will not be suitable: in mobile phones, the maximum component height is 1mm, sometimes even less. In a tablet, a height of as much as 1.2mm might be acceptable; in netbooks, 1.5mm. In none of these can a single inductor for a DC/DC buck converter be used it would be far too high. So there is no alternative but split up the power stage into multiple phases of around 2.5A, using a small inductor for each phase. There is another element to the power circuit design problem, however. At these high peak currents, every milliohm of on-resistance markedly reduces system efficiency. PMICs in the past might have integrated every possible power stage, in order to reduce system component count and cost. But internal power stages suffer from relatively low efficiency because of the routing and bonding requirements when carrying high currents inside the chip. At the same time, a traditional controller-plus-external-power-transistors architecture is not suitable, because it calls for five control lines per phase. With eight phases of 2.5A in a 20A supply, the pin count and package size of the PMIC would be completely unacceptable, especially as modern mobile application processors not only the CPU cores but also GPU (graphics processing unit) cores, which require several high current rails. Now a solution is available that provides for a multi-phase power supply with power stages external to the PMIC. The AS3729 power stage from ams keeps connectivity losses to a minimum while implementing an innovative control interface which needs only 1½ lines per phase. The main PMIC Page 2 / 6

3 (the AS3721 also from ams) includes three controllers for power stages capable of delivering 5A, 10A and 20A peak currents (see Figure 1). VSUP AS372x DCDC1 0.6V-1.5V 5A TEMP1_SD1 CTRL1_SD1 CTRL2_SD1 FB_SD1 TEMP CTRL1 CTRL2 AS3729 LX1 LX2 1uH 1uH Vout DVM, 10mV step FB_SD1 PVSS Fig. 1: connection diagram showing the basic configuration for delivering 5A using two phases of 2.5A each Since the driver of the power transistors is integrated into the AS3729 power stage, a high switching frequency of 3MHz can be used: this high frequency means small, low-ohmic 0.47µH inductors are suitable (see Figure 2) Volume [mm³] Power Stages for Core Supply Power Stage for 5A CPU supply 0 5A (CSP) 10A (CSP) 15A (CSP) 10A (BGA) 15A (BGA) 20A (BGA) Core Current Supply [A] Fig. 2: PCB area required when using TFM coils in various configurations The remote power stage architecture also means that the control lines to the PMIC can be very thin, since they do not power the load. This makes it easy to route them in such a way as to avoid causing interference on sensitive PCB traces. Page 3 / 6

4 The AS3729 has a ball grid array layout, which was chosen to avoid the requirement for vias in the PCB: the crucial connections to the input/output capacitors and the coil can be made on the top layer. This leads to short connections, low resistance and small ground loops to minimise EMI (see Figure 3). The power stages also incorporate additional intelligence such as coil current measurement, a zero comparator and temperature measurement. With this approach it is possible to combine the advantages of a current-controlled DC/DC converter with the remote power generation capability of a DC/DC controller. Accurate current measurement provides for a stable control loop, as well as a well-controlled current distribution between the phases, accurate to around ±10%. Peak current delivery at the point of load Generating power at the point of load is a further advantage of the ams architecture. This helps to reduce the size and intensity of hot spots, because power dissipation is distributed around the PCB; at the same time, PCB losses are reduced because the high-current power planes are short. The ability to use a remote feedback process to sense the core voltage directly inside the processor reduces resistive losses and ensures an accurate processor supply with a static error of just ±3% at the point of load. Page 4 / 6

5 Fig.3: principal connections and layout for a 10A + 5A configuration with remote feedback Another critical requirement for modern application processors is fast load regulation. In order to save power, today s processors go into an ultra-low power idle mode whenever possible, but wake up instantly in response to any user input. These fast wake-up operations entail a rapid change in the core supply current: 10A/µs load transients are quite common. These in turn require an extremely fast response from the PMIC to avoid excessive voltage drops that would trigger an undervoltage shut-down. Using the multi-phase topology described here running on a 3MHz control loop, voltage drops can be kept to within 3% of the target output voltage. Scalable output power for cross-platform development The topology ams offers is easily scalable, as one AS3729 power stage supports only two phases. This is important for cross-platform designs intended, for instance, for phones with 10A peak current and tablets with 15A peak current. Indeed, in a netbook design, all eight phases of the AS3721 core DC/DC controller might be used, together with four power stages, to gain the maximum current of 20A. Whatever configuration the multi-phase architecture is used in, however, the combination of high power output, high efficiency, small size and distributed power dissipation meets the new, tough requirements of the latest generation of mobile devices. Page 5 / 6

6 For further information ams AG Tel: +43 (0) Page 6 / 6