MHz, V/µs Op Amp FEATRES MHz Gain-Bandwidth V/µs Slew Rate.5mA Maximum Supply Current nity Gain Stable C-Load TM Op Amp Drives All Capacitive Loads nv/ Hz Input Noise Voltage µv Maximum Input Offset Voltage na Maximum Input Bias Current 7nA Maximum Input Offset Current V/mV Minimum DC Gain, R L =k ns Settling Time to.%, V Step ns Settling Time to.%, V Step ±V Minimum Output Swing into 5Ω ±.5V Minimum Output Swing into 5Ω Specified at ±.5V, ±5V, and ±5V APPLICATIONS Wideband Amplifiers Buffers Active Filters Data Acquisition Systems Photodiode Amplifiers DESCRIPTION The LT 5 is a low power, high speed, high slew rate operational amplifier with outstanding AC and DC performance. The LT5 has much lower supply current, lower input offset voltage, lower input bias current, and higher DC gain than devices with comparable bandwidth. The circuit topology is a voltage feedback amplifier with the slewing characteristics of a current feedback amplifier. The amplifier is a single gain stage with outstanding settling characteristics which makes the circuit an ideal choice for data acquisition systems. The output drives a 5Ω load to ±V with ±5V supplies and a 5Ω load to ±.5V on ±5V supplies. The amplifier is also stable with any capacitive load which makes it useful in buffer or cable driver applications. The LT5 is a member of a family of fast, high performance amplifiers using this unique topology and employing Linear Technology Corporation s advanced bipolar complementary processing. For dual and quad amplifier versions of the LT5 see the LT55/LT5 data sheet. For higher bandwidth devices with higher supply current see the LT57 through LT5 data sheets. Singles, duals, and quads of each amplifier are available., LTC and LT are registered trademarks of Linear Technology Corporation. C-Load is a trademark of Linear Technology Corporation TYPICAL APPLICATION khz, th Order Butterworth Filter Large-Signal Response.k 5.k pf 7pF V IN.k.k pf LT5 5.k.k pf LT5 V OT 5 TA 5 TA
ABSOLTE MAXIMM RATINGS W W W Total Supply Voltage (V to V )... V Differential Input Voltage (Transient Only, Note )... ±V Input Voltage...±V S Output Short-Circuit Duration (Note )... Indefinite Operating Temperature Range... C to 5 C Specified Temperature Range (Note )... C to 5 C Maximum Junction Temperature (See Below) Plastic Package... 5 C Storage Temperature Range... 5 C to 5 C Lead Temperature (Soldering, sec)... C PACKAGE/ORDER INFORMATION NLL IN IN V TOP VIEW Consult factory for Industrial and Military grade parts. 7 5 NLL V V OT NC N PACKAGE, -LEAD PLASTIC DIP T JMAX = 5 C, θ JA = C/ W W ORDER PART NMBER LT5CN TOP VIEW NLL NLL IN IN V 7 5 V V OT NC S PACKAGE, -LEAD PLASTIC SOIC T JMAX = 5 C, θ JA = 9 C/ W ORDER PART NMBER LT5CS S PART MARKING 5 ELECTRICAL CHARACTERISTICS, V CM = V unless otherwise noted. SYMBOL PARAMETER CONDITIONS V SPPLY MIN TYP MAX NITS V OS Input Offset Voltage ±5V.. mv ±5V.. mv ±.5V.. mv I OS Input Offset Current ±.5V to ±5V 7 na I B Input Bias Current ±.5V to ±5V na e n Input Noise Voltage f = khz ±.5V to ±5V nv/ Hz i n Input Noise Current f = khz ±.5V to ±5V. pa/ Hz R IN Input Resistance V CM = ±V ±5V 7 MΩ Differential ±5V MΩ C IN Input Capacitance ±5V pf Input Voltage Range ±5V.. V ±5V.5.5 V ±.5V.5. V Input Voltage Range ±5V.. V ±5V..5 V ±.5V.9.5 V CMRR Common Mode Rejection Ratio V CM = ±V ±5V 97 db V CM = ±.5V ±5V 7 db V CM = ±.5V ±.5V 75 db PSRR Power Supply Rejection Ratio V S = ±.5V to ±5V 9 db A VOL Large-Signal Voltage Gain V OT = ±V, R L = k ±5V V/mV V OT = ±V, R L = 5Ω ±5V 5 5 V/mV V OT = ±.5V, R L = k ±5V V/mV V OT = ±.5V, R L = 5Ω ±5V 5 5 V/mV V OT = ±.5V, R L = 5Ω ±5V V/mV V OT = ±V, R L = 5Ω ±.5V 5 V/mV
ELECTRICAL CHARACTERISTICS, V CM = V unless otherwise noted. SYMBOL PARAMETER CONDITIONS V SPPLY MIN TYP MAX NITS V OT Output Swing R L = k, V IN = ±mv ±5V.. ±V R L = 5Ω, V IN = ±mv ±5V..5 ±V R L = 5Ω, V IN = ±mv ±5V.5. ±V R L = 5Ω, V IN = ±mv ±5V.5. ±V R L = 5Ω, V IN = ±mv ±.5V..7 ±V I OT Output Current V OT = ±V ±5V. ma V OT = ±.5V ±5V.7 5 ma I SC Short-Circuit Current V OT = V, V IN = ±V ±5V ma SR Slew Rate A V =, (Note ) ±5V V/µs ±5V 7 V/µs Full Power Bandwidth V Peak, (Note ) ±5V. MHz V Peak, (Note ) ±5V. MHz GBW Gain-Bandwidth f = khz, R L = k ±5V 9.. MHz ±5V 7.5.5 MHz ±.5V 9. MHz t r, t f Rise Time, Fall Time A V =, %-9%,.V ±5V ns ±5V 7 ns Overshoot A V =,.V ±5V % ±5V % Propagation Delay 5% V IN to 5% V OT,.V ±5V ns ±5V 9 ns t s Settling Time V Step,.%, ±5V ns V Step,.%, ±5V ns 5V Step,.%, ±5V ns 5V Step,.%, ±5V ns Differential Gain f =.5MHz, A V =, R L = k ±5V. % ±5V. % Differential Phase f =.5MHz, A V =, R L = k ±5V. Deg ±5V. Deg R O Output Resistance A V =, f = khz ±5V.7 Ω I S Supply Current ±5V..5 ma ±5V.9. ma C T A 7 C, V CM = V unless otherwise noted. SYMBOL PARAMETER CONDITIONS V SPPLY MIN TYP MAX NITS V OS Input Offset Voltage ±5V. mv ±5V. mv ±.5V. mv Input V OS Drift (Note 5) ±.5V to ±5V 5 µv/ C I OS Input Offset Current ±.5V to ±5V na I B Input Bias Current ±.5V to ±5V 5 na CMRR Common Mode Rejection Ratio V CM = ±V ±5V 79 db V CM = ±.5V ±5V 77 db V CM = ±.5V ±.5V 7 db PSRR Power Supply Rejection Ratio V S = ±.5V to ±5V 9 db A VOL Large-Signal Voltage Gain V OT = ±V, R L = k ±5V. V/mV V OT = ±V, R L = 5Ω ±5V. V/mV V OT = ±.5V, R L = k ±5V. V/mV V OT = ±.5V, R L = 5Ω ±5V. V/mV V OT = ±.5V, R L = 5Ω ±5V. V/mV V OT = ±V, R L = 5Ω ±.5V. V/mV
ELECTRICAL CHARACTERISTICS C T A 7 C, V CM = V unless otherwise noted. SYMBOL PARAMETER CONDITIONS V SPPLY MIN TYP MAX NITS V OT Output Swing R L = k, V IN = ±mv ±5V. ±V R L = 5Ω, V IN = ±mv ±5V.5 ±V R L = 5Ω, V IN = ±mv ±5V. ±V R L = 5Ω, V IN = ±mv ±5V. ±V R L = 5Ω, V IN = ±mv ±.5V. ±V I OT Output Current V OT = ±.5V ±5V. ma V OT = ±.V ±5V 5. ma I SC Short-Circuit Current V OT = V, V IN = ±V ±5V ma SR Slew Rate A V =, (Note ) ±5V 5 V/µs ±5V V/µs GBW Gain-Bandwidth f = khz, R L = k ±5V 7.5 MHz ±5V. MHz I S Supply Current ±5V.5 ma ±5V. ma C T A 5 C, V CM = V unless otherwise noted. (Note ) SYMBOL PARAMETER CONDITIONS V SPPLY MIN TYP MAX NITS V OS Input Offset Voltage ±5V.5 mv ±5V.5 mv ±.5V.7 mv Input V OS Drift (Note 5) ±.5V to ±5V 5 µv/ C I OS Input Offset Current ±.5V to ±5V na I B Input Bias Current ±.5V to ±5V 55 na CMRR Common Mode Rejection Ratio V CM = ±V ±5V 7 db V CM = ±.5V ±5V 7 db V CM = ±.5V ±.5V db PSRR Power Supply Rejection Ratio V S = ±.5V to ±5V 9 db A VOL Large-Signal Voltage Gain V OT = ±V, R L = k ±5V 7. V/mV V OT = ±V, R L = 5Ω ±5V.7 V/mV V OT = ±.5V, R L = k ±5V 7. V/mV V OT = ±.5V, R L = 5Ω ±5V.7 V/mV V OT = ±.5V, R L = 5Ω ±5V. V/mV V OT = ±V, R L = 5Ω ±.5V.7 V/mV V OT Output Swing R L = k, V IN = ±mv ±5V. ±V R L = 5Ω, V IN = ±mv ±5V. ±V R L = 5Ω, V IN = ±mv ±5V. ±V R L = 5Ω, V IN = ±mv ±5V. ±V R L = 5Ω, V IN = ±mv ±.5V. ±V I OT Output Current V OT = ±V ±5V ma V OT = ±.V ±5V ma I SC Short-Circuit Current V OT = V, V IN = ±V ±5V ma SR Slew Rate A V =, (Note ) ±5V V/µs ±5V 5 V/µs GBW Gain Bandwith f = khz, R L = k ±5V 7. MHz ±5V 5.5 MHz I S Supply Current ±5V.5 ma ±5V.5 ma
ELECTRICAL CHARACTERISTICS The denotes specifications that apply over the full specified temperature range. Note : Differential inputs of ±V are appropriate for transient operation only, such as during slewing. Large, sustained differential inputs will cause excessive power dissipation and may damage the part. See Input Considerations in the Applications Information section of this data sheet for more dutails. Note : A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely. Note : Slew rate is measured between ±V on the output with ±V input for ±5V supplies and ±V on the output with ±.75V input for ±5V supplies. Note : Full power bandwidth is calculated from the slew rate measurement: FPBW = SR/πV P. Note 5: This parameter is not % tested. Note : The LT5 is designed, characterized and expected to meet these extended temperature limits, but is not tested at C and at 5 C. Guaranteed I grade parts are available; consult factory. TYPICAL PERFORMANCE CHARACTERISTICS W SPPLY CRRENT (ma)..... Supply Current vs Supply Voltage and Temperature 5 C 5 C 55 C. 5 5 SPPLY VOLTAGE (±V) 5 G COMMON-MODE RANGE (V) V.5..5...5..5 Input Common-Mode Range vs Supply Voltage V OS < mv V 5 5 SPPLY VOLTAGE (±V) 5 G INPT BIAS CRRENT (na) 5 5 Input Bias Current vs Input Common-Mode Voltage I I B = B IB 5 5 5 5 5 INPT COMMON-MODE VOLTAGE (V) 5 G INPT BIAS CRRENT (na) 75 5 5 75 5 5 Input Bias Current vs Temperature I I B = B IB INPT VOLTAGE NOISE (nv/ Hz) Input Noise Spectral Density i n e n A V = R S = k INPT CRRENT NOISE (pa/ Hz) OPEN-LOOP GAIN (db) 7 Open-Loop Gain vs Resistive Load 9 5 5 5 5 75 5 TEMPERATRE ( C). k k k 5 k k LOAD RESISTANCE (Ω) 5 G 5 G5 5 G 5
TYPICAL PERFORMANCE CHARACTERISTICS W OPEN-LOOP GAIN (db) 97 9 95 9 9 9 9 9 9 Open-Loop Gain vs Temperature R L = k V O = ±V 5 5 5 5 75 5 TEMPERATRE ( C) OTPT VOLTAGE SWING (V) V Output Voltage Swing vs Supply Voltage R L = 5Ω R L = 5Ω R L = k R L = k V 5 5 SPPLY VOLTAGE (±V) V.5..5. OTPT VOLTAGE SWING (V).5.5..5. Output Voltage Swing vs Load Current V IN = mv C 5 C C 5 C 5 C 5 C V.5 5 5 OTPT CRRENT (ma) 5 G7 5 G 5 G9 OTPT SHORT-CIRCIT CRRENT (ma) 5 55 5 5 5 5 Output Short-Circuit Current vs Temperature SORCE SINK OTPT SWING (V) Settling Time vs Output Step (Noninverting) A V = mv mv mv mv OTPT SWING (V) Settling Time vs Output Step (Inverting) mv mv mv mv 5 5 5 5 75 5 TEMPERATRE ( C) 5 5 5 5 SETTLING TIME (ns) 5 5 5 5 SETTLING TIME (ns) 5 G 5 G 55/5 G OTPT IMPEDANCE (Ω) k.. k Output Impedance vs Frequency A V = A V = A V = k M M M GAIN (db) 7 5 k Gain and Phase vs Frequency GAIN R F = R G = k PHASE k M M M PHASE (DEG) GAIN-BANDWIDTH (MHz) 7 5 9 Gain-Bandwidth and Phase Margin vs Supply Voltage PHASE MARGIN GAIN-BANDWIDTH 5 5 5 SPPLY VOLTAGE (±V) PHASE MARGIN (DEG) 5 G 5 G 5 G5
TYPICAL PERFORMANCE CHARACTERISTICS W GAIN-BANDWIDTH (MHz) 7 5 9 Gain-Bandwidth and Phase Margin vs Temperature GAIN-BANDWIDTH PHASE MARGIN PHASE MARGIN GAIN-BANDWIDTH 5 5 5 5 5 5 75 5 TEMPERATRE ( C) PHASE MARGIN (DEG) GAIN (db) 5 5 k Frequency Response vs Supply Voltage (A V = ) A V = R L = k ±5V ±.5V M M ±5V M GAIN (db) 5 5 k Frequency Response vs Supply Voltage () R F = R G = k ±.5V M M ±5V ±5V M 5 G 5 G7 5 G VOLTAGE MAGNITDE (db) Frequency Response vs Capacitive Load C = pf C = 5pF C = pf C = 5pF C = k M M M 5 G9 POWER SPPLY REJECTION RATIO (db) Power Supply Rejection Ratio vs Frequency PSRR PSRR k k k M M M 5 G COMMON-MODE REJECTION RATIO (db) k Common-Mode Rejection Ratio vs Frequency k k M M 5 G M SLEW RATE (V/µs) 5 Slew Rate vs Supply Voltage R F = R G = k SR SR SR = SLEW RATE (V/µs) 5 5 5 Slew Rate vs Temperature A V = SR SR SR = SLEW RATE (V/µs) 5 Slew Rate vs Input Level R F = R G = k SR SR SR = 5 5 SPPLY VOLTAGE (±V) 5 G 5 5 5 5 5 75 5 TEMPERATRE ( C) 5 G INPT LEVEL (V P-P ) 5 G 7
TYPICAL PERFORMANCE CHARACTERISTICS W TOTAL HARMONIC DISTORTION (%).... Total Harmonic Distortion vs Frequency V O = V RMS R L = k A V = k k k OTPT VOLTAGE (VP-P) 5 5 ndistorted Output Swing vs Frequency (±5V) A V = R L = 5k A V =, 5 % MAX DISTORTION, % MAX DISTORTION k M M OTPT VOLTAGE (VP-P) ndistorted Output Swing vs Frequency (±5V) A V = R L = 5k A V =, % MAX DISTORTION, % MAX DISTORTION k M M 5 G5 55/5 G 5 G7 HARMONIC DISTORTION (db) 5 7 nd and rd Harmonic Distortion vs Frequency V O = V P-P R L = k A V = RD HARMONIC ND HARMONIC DIFFERENTIAL PHASE (DEGREES)... Differential Gain and Phase vs Supply Voltage A V = R L = k DIFFERENTIAL GAIN DIFFERENTIAL PHASE.5..5 DIFFERENTIAL PHASE (PERCENT) OVERSHOOT (%) 5 Capacitive Load Handling A V = k k k M M M M. ±5 ± ±5 SPPLY VOLTAGE (V) p p p.µ.µ CAPACITIVE LOAD (F) µ 5 G 5 G9 5 G Small-Signal Transient (A V = ) Small-Signal Transient () Small-Signal Transient (, C L = pf) 5 TA 5 TA 5 TA
TYPICAL PERFORMANCE CHARACTERISTICS W Large-Signal Transient (A V = ) Large-Signal Transient () Large-Signal Transient (A V =, C L =,pf) 5 TA 5 TA5 5 TA APPLICATIONS INFORMATION W The LT5 may be inserted directly into many high speed amplifier applications improving both DC and AC performance, provided that the nulling circuitry is removed. The suggested nulling circuit for the LT5 is shown below. Offset Nulling k V 7 LT5 V 5 AI Layout and Passive Components The LT5 amplifier is easy to apply and tolerant of less than ideal layouts. For maximum performance (for example fast settling time) use a ground plane, short lead lengths, and RF-quality bypass capacitors (.µf to.µf). For high drive current applications use low ESR bypass capacitors (µf to µf tantalum). Sockets should be avoided when maximum frequency performance is required, although low profile sockets can provide reasonable performance up to 5MHz. For more details see Design Note 5. The parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole which can cause peaking or oscillations. For feedback resistors greater than 5kΩ, a parallel capacitor of value C F > (R G C IN )/R F should be used to cancel the input pole and optimize dynamic performance. For unity-gain applications where a large feedback resistor is used, C F should be greater than or equal to C IN. Capacitive Loading The LT5 is stable with any capacitive load. This is accomplished by sensing the load induced output pole and adding compensation at the amplifier gain node. As the capacitive load increases, both the bandwidth and phase margin decrease so there will be peaking in the frequency domain and in the transient response as shown in the typical performance curves.the photo of the small-signal response with pf load shows % peaking. The large signal response with a,pf load shows the output slew rate being limited to 5V/µs by the short-circuit current. Coaxial cable can be driven directly, but for best pulse fidelity a resistor of value equal to the characteristic impedance of the cable (i.e., 75Ω) should be placed in series with the output. The other end of the cable should be terminated with the same value resistor to ground. 9
APPLICATIONS INFORMATION Input Considerations W Each of the LT5 inputs is the base of an NPN and a PNP transistor whose base currents are of opposite polarity and provide first-order bias current cancellation. Because of variation in the matching of NPN and PNP beta, the polarity of the input bias current can be positive or negative. The offset current does not depend on NPN/PNP beta matching and is well controlled. The use of balanced source resistance at each input is recommended for applications where DC accuracy must be maximized. The inputs can withstand transient differential input voltages up to V without damage and need no clamping or source resistance for protection. Differential inputs, however, generate large supply currents (tens of ma) as required for high slew rates. If the device is used with sustained differential inputs, the average supply current will increase, excessive power dissipation will result and the part may be damaged. The part should not be used as a comparator, peak detector or other open-loop application with large, sustained differential inputs. nder normal, closed-loop operation, an increase of power dissipation is only noticeable in applications with large slewing outputs and is proportional to the magnitude of the differential input voltage and the percent of the time that the inputs are apart. Measure the average supply current for the application in order to calculate the power dissipation. Power Dissipation The LT5 combines high speed and large output drive in a small package. Because of the wide supply voltage range, it is possible to exceed the maximum junction temperature under certain conditions. Maximum junction temperature (T J ) is calculated from the ambient temperature (T A ) and power dissipation (P D ) as follows: LT5CN: T J = T A (P D C/W) LT5CS: T J = T A (P D 9 C/W) Worst case power dissipation occurs at the maximum supply current and when the output voltage is at / of either supply voltage (or the maximum swing if less than / supply voltage). Therefore P DMAX is: P DMAX = (V V )(I SMAX ) (V /) /R L Example: LT5CS at 7 C,, R L = Ω (Note: the minimum short-circuit current at 7 C is ma, so the output swing is guaranteed only to.v with Ω.) P DMAX = (V.5mA) (5V.V)(mA) = mw T JMAX = 7 C (mw 9 C/W) = C Circuit Operation The LT5 circuit topology is a true voltage feedback amplifier that has the slewing behavior of a current feedback amplifier. The operation of the circuit can be understood by referring to the simplified schematic. The inputs are buffered by complementary NPN and PNP emitter followers which drive an Ω resistor. The input voltage appears across the resistor generating currents which are mirrored into the high impedance node. Complementary followers form an output stage which buffers the gain node from the load. The bandwidth is set by the input resistor and the capacitance on the high impedance node. The slew rate is determined by the current available to charge the gain node capacitance. This current is the differential input voltage divided by R, so the slew rate is proportional to the input. Highest slew rates are therefore seen in the lowest gain configurations. For example, a V output step in a gain of has only a V input step, whereas the same output step in unity gain has a times greater input step. The curve of Slew Rate vs Input Level illustrates this relationship. The LT5 is tested for slew rate in a gain of so higher slew rates can be expected in gains of and, and lower slew rates in higher gain configurations. The RC network across the output stage is bootstrapped when the amplifier is driving a light or moderate load and has no effect under normal operation. When driving a capacitive load (or a low value resistive load) the network is incompletely bootstrapped and adds to the compensation at the high impedance node. The added capacitance
APPLICATIONS INFORMATION W slows down the amplifier which improves the phase margin by moving the unity gain frequency away from the pole formed by the output impedance and the capacitive load. The zero created by the RC combination adds phase LT5 to ensure that even for very large load capacitances, the total phase lag can never exceed degrees (zero phase margin) and the amplifier remains stable. SI W PLII FED SCHE W ATIC V IN R Ω IN C R C C C OT V 5 SS PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. N Package -Lead PDIP (Narrow.) (LTC DWG # 5--5)..5 (7..55).5.5 (..5). ±.5 (. ±.7).* (.) MAX 7 5.9.5 (.9.).5.5.5.9.55. ( ).5 (.5) TYP. ±. (.5 ±.5).5 (.75) MIN. ±. (.57 ±.7). (.5) MIN.55 ±.5* (.77 ±.) N 97 *THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED. INCH (.5mm) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION.. (..5).. (.5.5) 5 TYP Dimensions in inches (millimeters) unless otherwise noted. S Package -Lead Plastic Small Outline (Narrow.5) (LTC DWG # 5--).5.9 (..75).. (..5).9.97* (. 5.) 7 5..5..7 *DIMENSION DOES NOT INCLDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED." (.5mm) PER SIDE ** DIMENSION DOES NOT INCLDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED." (.5mm) PER SIDE..9 (.55.).5 (.7) TYP.. (5.79.97).5.57** (..9) SO 99 TYPICAL APPLICATIONS Instrumentation Amplifier khz, th Order Butterworth Filter (Sallen-Key) V IN R k R k R5 Ω R k R LT5 k LT5 V OT V IN R.7k C pf R.7k LT5 C pf R.k C pf R 5.k LT5 C pf V OT 5 TA R R R R R A V = R R R R = 5 TRIM R5 FOR GAIN TRIM R FOR COMMON MODE REJECTION BW = khz 5 TA RELATED PARTS PART NMBER DESCRIPTION COMMENTS LT55/LT5 Dual/Quad ma, MHz, V/µs Op Amp Good DC Precision, Stable with All Capacitive Loads LT57 ma, 5MHz, V/µs Op Amp Good DC Precision, Stable with All Capacitive Loads LT5/LT59 Dual/Quad ma, 5MHz, V/µs Op Amp Good DC Precision, Stable with All Capacitive Loads Linear Technology Corporation McCarthy Blvd., Milpitas, CA 955-77 ()-9 FAX: () -57 www.linear-tech.com 5fa LT/TP 59 REV A K PRINTED IN SA LINEAR TECHNOLOGY CORPORATION 99