M74HC4060TTR 14 STAGE BINARY COUNTER/OSCILLATOR

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14 STAGE BINARY COUNTER/OSCILLATOR HIGH SPEED: f MAX = 65MHz (TYP.) at V CC = 6V LOW POWER DISSIPATION: I CC =4µA(MAX.) at T A =25 C HIGH NOISE IMMUNITY: V NIH = V NIL = 28 % V CC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: I OH = I OL = 4mA (MIN) BALANCED PROPAGATION DELAYS: t PLH t PHL WIDE OPERATING VOLTAGE RANGE: V CC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4060 DESCRIPTION The M74HC4060 is an high speed CMOS 14-STAGE BINARY COUNTER/OSCILLATOR fabricated with silicon gate C 2 MOS technology. The oscillator configuration allows design of either RC or crystal oscillator circuits. A high level on the CLEAR accomplishes the reset function, i.e. all counter outputs are made low and the oscillator is disabled. DIP ORDER CODES SOP TSSOP PACKAGE TUBE T & R DIP M74HC4060B1R SOP M74HC4060M1R M74HC4060RM13TR TSSOP M74HC4060TTR A negative traition on the clock input increments the counter. Ten kinds of divided output are provided; 4 to 10 and 12 to 14 stage inclusive. The maximum division available at Q12 is 1/16384 f oscillator. The Ø 1 input and the CLEAR input are equipped with protection circuits agait static discharge and traient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/12

IINPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 1, 2, 3 Q12 to Q14 Counter Outputs 7, 5, 4, 6, 14, 13, 15 Q4 to Q10 Counter Outputs 9 ØO External Capacitor Connection 10 ØO External Resistor Connection 11 ØI Clock Input / Oscillator Pin 12 CLEAR Master Reset 8 GND Ground (0V) 16 V CC Positive Supply Voltage TRUTH TABLE ØI CLEAR FUNCTION X X : Don t Care H L L COUNTER IS RESET TO ZERO STATE ØO OUTPUT GOES TO HIGH LEVEL ØO OUTPUT GOES TO LOW LEVEL COUNT UP ONE STEP NO CHANGE LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 2/12

ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit V CC Supply Voltage -0.5 to +7 V V I DC Input Voltage -0.5 to V CC + 0.5 V V O DC Output Voltage -0.5 to V CC + 0.5 V I IK DC Input Diode Current ± 20 ma I OK DC Output Diode Current ± 20 ma I O DC Output Current ± 25 ma I CC or I GND DC V CC or Ground Current ± 50 ma P D Power Dissipation 500(*) mw T stg Storage Temperature -65 to +150 C T L Lead Temperature (10 sec) 300 C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditio is not implied (*) 500mW at 65 C; derate to 300mW by 10mW/ C from 65 C to 85 C RECOMMENDED OPERATING CONDITIONS Symbol Parameter Value Unit V CC Supply Voltage 2 to 6 V V I Input Voltage 0 to V CC V V O Output Voltage 0 to V CC V T op Operating Temperature -55 to 125 C t r, t f V CC = 4.5V 0 to 500 Input Rise and Fall Time V CC = 2.0V 0 to 1000 V CC = 6.0V 0 to 400 3/12

DC SPECIFICATIONS Test Condition Value Symbol Parameter V CC (V) T A = 25 C -40 to 85 C -55 to 125 C Min. Typ. Max. Min. Max. Min. Max. Unit V IH V IL V OH V OL V OH V OL I I I CC High Level Input Voltage Low Level Input Voltage High Level Output Voltage (Q Output) Low Level Output Voltage (Q Output) High Level Output Voltage (ØO, ØO Output) Low Level Output Voltage (ØO, ØO Output) Input Leakage Current Quiescent Supply Current 2.0 1.5 1.5 1.5 4.5 3.15 3.15 3.15 6.0 4.2 4.2 4.2 2.0 0.5 0.5 0.5 4.5 1.35 1.35 1.35 6.0 1.8 1.8 1.8 2.0 I O =-20 µa 1.9 2.0 1.9 1.9 4.5 I O =-20 µa 4.4 4.5 4.4 4.4 6.0 I O =-20 µa 5.9 6.0 5.9 5.9 4.5 I O =-4.0 ma 4.18 4.31 4.13 4.10 6.0 I O =-5.2 ma 5.68 5.8 5.63 5.60 2.0 I O =20 µa 0.0 0.1 0.1 0.1 4.5 I O =20 µa 0.0 0.1 0.1 0.1 6.0 I O =20 µa 0.0 0.1 0.1 0.1 4.5 I O =4.0 ma 0.17 0.26 0.33 0.40 6.0 I O =5.2 ma 0.18 0.26 0.33 0.40 2.0 I O =-20 µa 1.8 2.0 1.8 1.8 4.5 I O =-20 µa 4.4 4.5 4.0 4.0 6.0 I O =-20 µa 5.5 5.9 5.5 5.5 2.0 I O =-20 µa 0.0 0.2 0.2 0.2 4.5 I O =-20 µa 0.0 0.5 0.5 0.5 6.0 I O =-20 µa 0.1 0.5 0.5 0.5 6.0 V I = V CC or GND ± 0.1 ± 1 ± 1 µa 6.0 V I = V CC or GND 4 40 80 µa V V V V V V 4/12

AC ELECTRICAL CHARACTERISTICS (C L = 50 pf, Input t r = t f = 6) Test Condition Value Symbol Parameter V CC (V) T A = 25 C -40 to 85 C -55 to 125 C Min. Typ. Max. Min. Max. Min. Max. Unit t TLH t THL Output Traition Time 2.0 30 75 95 110 4.5 8 15 19 22 6.0 7 13 16 19 t PLH t PHL Propagation Delay Time (ØI - Q4) 2.0 170 300 375 450 4.5 41 60 75 90 6.0 30 51 64 76 t PD Propagation Delay Time Difference (Qn - Qn+1) 2.0 32 75 95 110 4.5 7 15 19 22 6.0 5 13 16 19 t PHL Propagation Delay Time (CLEAR - Qn) 2.0 85 195 245 295 4.5 23 39 49 59 6.0 17 33 42 50 f MAX Maximum Clock Frequency 2.0 6 12 5 4 4.5 30 50 24 20 6.0 35 65 28 24 MHz t W(H) t W(L) Minimum Pulse Width (ØI) 2.0 30 75 95 110 4.5 8 15 19 22 6.0 7 13 16 19 t W(H) Minimum Pulse Width (CLEAR) 2.0 30 75 95 110 4.5 8 15 19 22 6.0 7 13 16 19 t REM Minimum Removal Time 2.0 40 100 125 150 4.5 10 20 25 30 6.0 9 17 21 26 CAPACITIVE CHARACTERISTICS Test Condition Value Symbol Parameter V CC (V) T A = 25 C -40 to 85 C -55 to 125 C Min. Typ. Max. Min. Max. Min. Max. Unit C IN Input Capacitance 5.0 5 10 10 10 pf C PD Power Dissipation Capacitance (note 1) 5.0 27 pf 1) C PD is defined as the value of the IC s internal equivalent capacitance which is calculated from the operating current coumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I CC(opr) = C PD x V CC x f IN + I CC 5/12

TEST CIRCUIT C L = 50pF or equivalent (includes jig and probe capacitance) R T = Z OUT of pulse generator (typically 50Ω) WAVEFORM 1: PROPAGATION DELAY TIMES, MINIMUM PULSE WIDTH (ØI) (f=1mhz; 50% duty cycle) 6/12

WAVEFORM 2 : PROPAGATION DELAY TIMES, MINIMUM PULSE WIDTH (CLEAR) (f=1mhz; 50% duty cycle) WAVEFORM 3 :PROPAGATION DELAY TIMES (f=1mhz; 50% duty cycle) 7/12

WAVEFORM 4 : PROPAGATION DELAY TIMES (f=1mhz; 50% duty cycle) TYPICAL CLOCK DRIVE CIRCUITS 8/12

Plastic DIP-16 (0.25) MECHANICAL DATA DIM. mm. inch MIN. TYP MAX. MIN. TYP. MAX. a1 0.51 0.020 B 0.77 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L 3.3 0.130 Z 1.27 0.050 P001C 9/12

SO-16 MECHANICAL DATA DIM. mm. inch MIN. TYP MAX. MIN. TYP. MAX. A 1.75 0.068 a1 0.1 0.2 0.003 0.007 a2 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45 (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M 0.62 0.024 S 8 (max.) PO13H 10/12

TSSOP16 MECHANICAL DATA DIM. mm. inch MIN. TYP MAX. MIN. TYP. MAX. A 1.2 0.047 A1 0.05 0.15 0.002 0.004 0.006 A2 0.8 1 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 BSC 0.0256 BSC K 0 8 0 8 L 0.45 0.60 0.75 0.018 0.024 0.030 A A2 A1 b e c K L E D E1 PIN 1 IDENTIFICATION 1 0080338D 11/12

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no respoibility for the coequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licee is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specificatio mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 12/12 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom http://www.st.com