EALUATION KIT AAILABLE HIGH CURRENT DC-TO-DC CONERTER FEATURES Pin Compatible With TC/ICL/SI High Output Current... ma No External Diodes Required Wide Operating Range... to Low Output Impedance... Ω Typ. No Low oltage Terminal Required Application Zener On Chip OSC Frequency Doubling Pin Option for Smaller Output Capacitors PIN CONFIGURATIONS (DIP and SOIC) ZENER CATHODE C GND C -Pin DIP -Pin CerDIP CPA EPA IJA MJA DD C OSC FREQ x OUT ZENER CATHODE NC C NC GND NC C NC FUNCTIONAL BLOCK DIAGRAM -Pin SOIC Wide COE DD NC C OSC NC FREQ x NC OUT 9 NC GENERAL DESCRIPTION The is an advanced version of the industrystandard high-voltage DC-to-DC converter. Using improved design techniques and CMOS construction, the can source as much as ma versus the s ma capability. As an inverter, the can put out voltages as high as and as low as without the need for external diodes. The output impedance of the device is a low Ω (with the proper capacitors), voltage conversion efficiency is 99.9%, and power conversion efficiency is 9%. The low voltage terminal (pin ) required in some applications has been eliminated. Grounding this terminal will double the oscillator frequency from khz to khz. This will allow the use of smaller capacitors for the same output current and ripple, in most applications. Only two external capacitors are required for inverter applications. In the event an external clock is needed to drive the (such as paralleling), driving this pin directly will cause the internal oscillator to sync to the external clock. ORDERING INFORMATION Part No. Package Temp. Range COE -Pin SOIC Wide C to C CPA -Pin Plastic DIP C to C EPA -Pin Plastic DIP C to C IJA -Pin CerDIP C to C MJA -Pin CerDIP C to C TCE Evaluation Kit for Charge Pump Family FREQ X OSC/C TIMING I I Q F/F C Q COMPARATOR WITH HYSTERESIS DD P SW N SW CAP C P EXTERNAL GND ZENER CATHODE. REF N SW OUT EXT CAP R L N SW OUT - 9//9 TelCom Semiconductor reserves the right to make changes in the circuitry and specifications of its devices.
Pin, which is used as a test pin on the, is a voltage reference zener on the. This zener (. at ma) has a dynamic impedance of Ω and is intended for use where the is supplying current to external regulator circuitry and a reference is needed for the regulator circuit. (See applications section.) The is compatible with the LTC, SI, and ICL. It should be used in designs that require greater power and/or less input to output voltage drop. It offers superior performance over the ICLS. ABSOLUTE MAXIMUM RATINGS* Supply oltage ( DD to GND)... Input oltage Any Pin... ( DD.) to ( SS.) Current Into Any Pin... ma ESD Protection... ± Output Short Circuit... Continuous (at. Input) Storage Temperature Range... C to C Lead Temperature (Soldering, sec)... C Operating Temperature Range CPA, COE... C to C IJA... C to C EPA... C to C MJA... C to C Package Power Dissipation SOIC...mW PDIP...mW CerDIP...mW Package Thermal Resistance CerDIP, R θj-a... 9 C/W PDIP, R θj-a... C/W *Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to Absolute Maximum Rating Conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS: DD =, T A = C (See Test Circuit), unless otherwise indicated. Symbol Parameter Test Conditions Min Typ Max Unit DD Supply oltage I S Supply Current R L = DD = T A = C µa T A C µa T A C µa DD = T A = C 9 µa T A < C µa T A C µa R O Output Source I L = ma, DD = Ω Resistance I L = ma, DD = Ω I L = ma, DD = Ω C OSC Oscillator Frequency Pin Open khz Pin GND khz P EFF Power Efficiency DD = 9 9 % R L = kω DEF oltage Efficiency DD = 99 99.9 % R L = Over Temperature Range 9 % Z Zener oltage I Z = ma... Z ZT Zener Impedance I L =.ma to.ma Ω
APPLICATIONS INFORMATION Theory of Operation The is a capacitive pump (sometimes called a switched capacitor circuit), where four MOSFET switches control the charge and discharge of a capacitor. The functional diagram (page ) shows how the switching action works. SW and SW are turned on simultaneously, charging C P to the supply voltage, IN. This assumes that the on resistance of the MOSFETs in series with the capacitor results in a charging time ( time constants) that is less than the on time provided by the oscillator frequency as shown: (R DS(ON) C P ) <C P /(. f OSC ) In the next cycle, SW and SW are turned off and after a very short interval of all switches being off (this prevents large currents from occurring due to cross conduction), SW and SW are turned on. The charge in C P is then transferred to, BUT WITH THE POLARITY IN- ERTED. In this way, a negative voltage is now derived. Page shows a functional diagram of the. An oscillator supplies pulses to a flip-flop that is then fed to a set of level shifters. These level shifters then drive each set of switches at one-half the oscillator frequency. The oscillator has two pins that control the frequency of oscillation. Pin can have a capacitor added that is returned to ground. This will lower the frequency of the oscillator by adding capacitance to the timing capacitor internal to the. Grounding pin will turn on a current source and double the frequency. This will double the charge current going into the internal capacitor, as well as any capacitor added to pin. A zener diode has been added to the for use as a reference in building external regulators. This zener runs from pin to ground. This applies to all types of capacitors, including film types (polyester, polycarbonate, etc.). Some applications information suggest that the capacitor is not critical and attribute the limiting factor of the capacitor to its reactive value. Let's examine this: where DS (duty cycle) = %. Thus, Z C.Ω at f = khz, where C = µf. For the, f =, Hz, and a typical value of C would be µf. This is a reactive impedance of.ω. If the ESR is as great as Ω, the reactive value is not as critical as it would first appear, as the ESR would predominate. The Ω value is typical of a general-purpose electrolytic capacitor. Latch Up All CMOS structures contain a parasitic SCR. Care must be taken to prevent any input from going above or below the supply rail, or latch up will occur. The result of latch up is an effective short between DD and SS. Unless the power supply input has a current limit, this latch-up phenomena will result in damage to the device. (See Application Note for additional information.) TEST CIRCUIT X C X C = and Z C =, πf C DS ESL ESR C Figure. Typical Electrolytic Capacitor Capacitors In early charge pump converters, the capacitors were not considered critical due to the high R DS(ON) of the MOS- FET switches. In order to understand this, let s look at a model of a typical electrolytic capacitor (Figure ). Note that one of its characteristics is ESR (equivalent series resistance). This parasitic resistance winds up in series with the load. Thus, both voltage conversion efficiency and power conversion efficiency are compromised if a low ESR capacitor is not used. In the test circuit, for example, just changing two capacitors, C P and, from capacitors with unspecified ESR to low ESR-type output, impedance changes from Ω to Ω, an improvement of %! NC C P 9Ω µf C OS L I S I L µf () OUT ()
TYPICAL APPLICATIONS Combined Negative Converter and Positive Multiplier Split In Half µf C P C P OUT = µf D D OUT = D µf µf C P µf = OUT Lowering Output Resistance by Paralleling Devices Positive oltage Multiplier µf C P µf C P OUT D D OUT = µf D C P C P µf µf
TYPICAL CHARACTERISTICS Supply Current vs Temperature k Oscillator Frequency vs C EXT T A = C Frequency vs Temperature SUPPLY CURRENT (µa) = = FREQUENCY (Hz) k FREQUENCY (khz) TEMPERATURE ( C), CAPACITANCE (pf) TEMPERATURE ( C) OUTPUT RESISTANCE ( Ω ) Output Resistance vs Temperature = I L = ma = I L = ma TEMPERATURE ( C) CURRENT (ma) Current vs Zener oltage T A = C...... ZENER OLTAGE () POWER CONERSION EFFICIENCY (%) Power Conversion Efficiency vs ILOAD 9 EFFICIENCY T A = C SUPPLY CURRENT LOAD CURRENT (ma) 9 SUPPLY CURRENT (ma) OUTPUT RESISTANCE ( Ω ) Output Resistance vs Input oltage T A = C 9 ma ma INPUT OLTAGE ()
PACKAGE DIMENSIONS -Pin CerDIP. (.9).9 (.9) PIN. (.). (.). (.) MAX.. (.) MIN.. (.). (9.). (.).9 (.). (.). (.). (.). (.). (.). (.). (.) MIN.. (.). (.) MIN..(.). (.). (.). (.). (.). (.) -Pin Plastic DIP PIN. (.). (.). (.). (.). (.). (.). (.). (.). (.).9 (.). (.). (.). (.). (.9). (.). (.). (.). (.) MIN.. (.9).9 (.9). (.). (.). (.). (.) Dimensions: inches (mm)
PACKAGE DIMENSIONS (CONT.) -Pin SOIC Wide PIN.99 (.9).9 (.).9 (.).9 (.). (.9).9 (.). (.) TYP..9 (.). (.). (.).9 (.). (.). (.) MAX.. (.). (.). (.).9 (.) Dimensions: inches (mm) Sales Offices TelCom Semiconductor Terra Bella Avenue P.O. Box Mountain iew, CA 99- TEL: -9-9 FAX: -9-9 E-Mail: liter@telcom-semi.com TelCom Semiconductor Austin Product Center 9 Burnet Rd. Suite Austin, TX TEL: -- FAX: -- TelCom Semiconductor H.K. Ltd. Sam Chuk Street, Ground Floor San Po Kong, Kowloon Hong Kong TEL: -- FAX: --99 Printed in the U.S.A.